Francisco Eugenio Potestad-Ordóñez

15 papers C 3Journal 7Unranked 5
YearRankTypeTitle / Venue / Authors
2025 — conf
Low Entropy Masking Protection Scheme for Ascon Cipher to Counteract Side-Channel Attacks.
DCIS
Erica Tena-Sánchez, Francisco Eugenio Potestad-Ordóñez, Miguel Martín-González, Alejandro Casado-Galán, Antonio J. Acosta
2025 — conf
TERORO - Transient Effect Ring Oscillator and Ring Oscillator Configurable Hybrid PUF.
SMACD
Alejandro Casado-Galán, J. Núñez-Martínez, Erica Tena-Sánchez, Francisco Eugenio Potestad-Ordóñez, Antonio J. Acosta
2024 — conf
Cryptographic Security Through a Hardware Root of Trust.
ARC
Luis F. Rojas-Muñoz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, Eros Camacho-Ruiz, Pablo Navarro-Torrero, Apurba Karmakar, Carlos Fernández García, Erica Tena-Sánchez, Francisco Eugenio Potestad-Ordóñez, Alejandro Casado-Galán, Pau Ortega-Castro, Antonio Acosta-Jiménez, Carlos Jesús Jiménez-Fernández, Piedad Brox
2024 C conf
Design and Evaluation of Combined Hardware FIA and SCA Countermeasures for AES Cipher.
DSD
Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, Virginia Zúñiga-González, Antonio J. Acosta
2024 — conf
Electromagnetic Fault Injection Attack Methodology against AES Hardware Implementation.
DCIS
Alejandro Casado-Galán, Francisco Eugenio Potestad-Ordóñez, Antonio J. Acosta, Erica Tena-Sánchez
2024 J jnl
Protecting FPGA-Based Cryptohardware Implementations from Fault Attacks Using ADCs.
Sensors
Francisco Eugenio Potestad-Ordóñez, Alejandro Casado-Galán, Erica Tena-Sánchez
2022 J jnl
Design and Evaluation of Countermeasures Against Fault Injection Attacks and Power Side-Channel Leakage Exploration for AES Block Cipher.
IEEE Access
Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, Antonio J. Acosta, Carlos Jesús Jiménez-Fernández, Ricardo Chaves
2021 J jnl
Experimental FIA Methodology Using Clock and Control Signal Modifications under Power Supply and Temperature Variations.
Sensors
Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, José Miguel Mora-Gutierrez, Manuel Valencia-Barrero, Carlos Jesús Jiménez-Fernández
2021 J jnl
Trivium Stream Cipher Countermeasures Against Fault Injection Attacks and DFA.
IEEE Access
Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, José Miguel Mora-Gutierrez, Manuel Valencia-Barrero, Carlos Jesús Jiménez-Fernández
2020 J jnl
An Academic Approach to FPGA Design Based on a Distance Meter Circuit.
Rev. Iberoam. de Tecnol. del Aprendiz.
Carlos Jesús Jiménez-Fernández, Carmen Baena Oliva, Pilar Parra Fernández, Francisco Eugenio Potestad-Ordóñez, Manuel Valencia-Barrero
2020 J jnl
Breaking Trivium Stream Cipher Implemented in ASIC Using Experimental Attacks and DFA.
Sensors
Francisco Eugenio Potestad-Ordóñez, Manuel Valencia-Barrero, Carmen Baena Oliva, Pilar Parra Fernández, Carlos Jesús Jiménez-Fernández
2020 C conf
Hamming-Code Based Fault Detection Design Methodology for Block Ciphers.
ISCAS
Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, Ricardo Chaves, Manuel Valencia-Barrero, Antonio Acosta-Jiménez, Carlos Jesús Jiménez-Fernández
2018 — conf
Floorplanning as a practical countermeasure against clock fault attack in Trivium stream cipher.
DCIS
Francisco Eugenio Potestad-Ordóñez, Carlos Jesús Jiménez-Fernández, Carmen Baena Oliva, Pilar Parra Fernández, Manuel Valencia-Barrero
2017 J jnl
Vulnerability Analysis of Trivium FPGA Implementations.
IEEE Trans. Very Large Scale Integr. Syst.
Francisco Eugenio Potestad-Ordóñez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero
2016 C conf
Fault attack on FPGA implementations of Trivium stream cipher.
ISCAS
Francisco Eugenio Potestad-Ordóñez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero