Francisco Barat

17 papers A 1B 2C 1Misc 1Journal 5Unranked 7
YearRankTypeTitle / Venue / Authors
2024 J jnl
AMD XDNA NPU in Ryzen AI Processors.
IEEE Micro
Alejandro Rico, Satyaprakash Pareek, Javier Cabezas, David Clarke, Baris Özgül, Francisco Barat, Yao Fu, Stephan Münz, Dylan Stuart, Patrick Schlangen, Pedro Duarte, Sneha Date, Indrani Paul, Jian Weng, Sonal Santan, Vinod Kathail, Ashish Sirasao, Juanjo Noguera
2011 — conf
A voltage-scalable biomedical signal processor running ECG using 13pJ/cycle at 1MHz and 0.4V.
ISSCC
Maryam Ashouei, Jos Hulzink, Mario Konijnenburg, Jun Zhou, Filipa Duarte, Arjan Breeschoten, Jos Huisken, Jan Stuyt, Harmke de Groot, Francisco Barat, Johan David, Johan Van Ginderdeuren
2011 J jnl
An Ultra Low Energy Biomedical Signal Processing System Operating at Near-Threshold.
IEEE Trans. Biomed. Circuits Syst.
Jos Hulzink, Mario Konijnenburg, Maryam Ashouei, Arjan Breeschoten, Torfinn Berset, Jos Huisken, Jan Stuyt, Harmke de Groot, Francisco Barat, Johan David, Johan Van Ginderdeuren
2005 J jnl
Clustered Loop Buffer Organization for Low Energy VLIW Embedded Processors.
IEEE Trans. Computers
Murali Jayapala, Francisco Barat, Tom Vander Aa, Francky Catthoor, Henk Corporaal, Geert Deconinck
2005 J jnl
Instruction buffering exploration for low energy embedded processors.
J. Embed. Comput.
Tom Vander Aa, Murali Jayapala, Francisco Barat, Geert Deconinck, Rudy Lauwereins, Henk Corporaal, Francky Catthoor
2004 A conf
Design Style Case Study for Embedded Multi Media Compute Nodes.
RTSS
Andy Lambrechts, Tom Vander Aa, Murali Jayapala, Guillermo Talavera, Anthony Leroy, Adelina Shickova, Francisco Barat, Bingfeng Mei, Francky Catthoor, Diederik Verkest, Geert Deconinck, Henk Corporaal, Frédéric Robert, Jordi Carrabina Bordoll
2004 — conf
Instruction buffering exploration for low energy VLIWs with instruction clusters.
ASP-DAC
Tom Vander Aa, Murali Jayapala, Francisco Barat, Geert Deconinck, Rudy Lauwereins, Francky Catthoor, Henk Corporaal
2004 — conf
L0 Cluster Synthesis and Operation Shuffling.
PATMOS
Murali Jayapala, Tom Vander Aa, Francisco Barat, Francky Catthoor, Henk Corporaal, Geert Deconinck
2004 Misc conf
L0 buffer energy optimization through scheduling and exploration.
SAC
Murali Jayapala, Tom Vander Aa, Francisco Barat, Geert Deconinck, Francky Catthoor, Henk Corporaal
2003 — conf
Instruction Buffering Exploration for Low Energy Embedded Processors.
PATMOS
Tom Vander Aa, Murali Jayapala, Francisco Barat, Geert Deconinck, Rudy Lauwereins, Henk Corporaal, Francky Catthoor
2003 B conf
Low Power Coarse-Grained Reconfigurable Instruction Set Processor.
FPL
Francisco Barat, Murali Jayapala, Tom Vander Aa, Rudy Lauwereins, Geert Deconinck, Henk Corporaal
2002 — conf
A Low Energy Clustered Instruction Memory Hierarchy for Long Instruction Word Processors.
PATMOS
Murali Jayapala, Francisco Barat, Pieter Op de Beeck, Francky Catthoor, Geert Deconinck, Henk Corporaal
2002 — conf
Bridging the Educational Gap in Embedded Systems Curricula: Developing an E-commerce Audio Streaming System.
ECBS
Marc Leeman, Francisco Barat, Vincenzo De Florio, Geert Deconinck
2002 J jnl
Reconfigurable Instruction Set Processors from a Hardware/Software Perspective.
IEEE Trans. Software Eng.
Francisco Barat, Rudy Lauwereins, Geert Deconinck
2002 — conf
Software Pipelining for Coarse-Grained Reconfigurable Instruction Set Processors.
ASP-DAC/VLSI Design
Francisco Barat, Murali Jayapala, Pieter Op de Beeck, Geert Deconinck
2001 B conf
CRISP: A Template for Reconfigurable Instruction Set Processors.
FPL
Pieter Op de Beeck, Francisco Barat, Murali Jayapala, Rudy Lauwereins
2000 C conf
Reconfigurable Instruction Set Processors: A Survey.
IEEE International Workshop on Rapid System Prototyping
Francisco Barat, Rudy Lauwereins