Francesco Svelto

90 papers A 2C 3Journal 43Unranked 42

Year	Rank	Type	Title / Venue / Authors
2022	J	`jnl`	Analog Front End of 50-Gb/s SiGe BiCMOS Opto-Electrical Receiver in 3-D-Integrated Silicon Photonics Technology. IEEE J. Solid State Circuits Farhad Bozorgi, Melchiorre Bruccoleri, Elham Rahimi, Matteo Repossi, Francesco Svelto, Andrea Mazzanti
2022	J	`jnl`	Overcoming the Transimpedance Limit: A Tutorial on Design of Low-Noise TIA. IEEE Trans. Circuits Syst. II Express Briefs Dan Li, Li Geng, Franco Maloberti, Francesco Svelto
2019	—	`conf`	70-90-GHz Self-Tuned Polyphase Filter for Wideband I/Q LO Generation in a 55-nm BiCMOS Transmitter. ESSCIRC Farshad Piri, Elham Rahimi, Matteo Bassi, Francesco Svelto, Andrea Mazzanti
2019	—	`conf`	A 26-Gb/s 3-D-Integrated Silicon Photonic Receiver in BiCMOS-55 nm and PIC25G With - 15.2-dBm OMA Sensitivity. ESSCIRC Farhad Bozorgi, Melchiorre Bruccoleri, Matteo Repossi, Enrico Temporiti, Andrea Mazzanti, Francesco Svelto
2019	J	`jnl`	High-Efficiency SiGe-BiCMOS $E$ -Band Power Amplifiers Exploiting Current Clamping in the Common-Base Stage. IEEE J. Solid State Circuits Elham Rahimi, Junlei Zhao, Francesco Svelto, Andrea Mazzanti
2018	—	`conf`	A >40dB IRR, 44% fractional-bandwidth ultra-wideband mm-wave quadrature LO generator for 5G networks in 55nm CMOS. ISSCC Farshad Piri, Matteo Bassi, Niccolo Lacaita, Andrea Mazzanti, Francesco Svelto
2018	J	`jnl`	A K-band low-noise bipolar class-C VCO for 5G backhaul systems in 55 nm BiCMOS technology. Integr. Niccolo Lacaita, Matteo Bassi, Andrea Mazzanti, Francesco Svelto
2018	J	`jnl`	A PVT-Tolerant >40-dB IRR, 44% Fractional-Bandwidth Ultra-Wideband mm-Wave Quadrature LO Generator for 5G Networks in 55-nm CMOS. IEEE J. Solid State Circuits Farshad Piri, Matteo Bassi, Niccolo Lacaita, Andrea Mazzanti, Francesco Svelto
2018	—	`conf`	Low phase noise K-band VCO and high efficiency E-band power amplifier for mobile network backhaul in SiGe BiCMOS. ICICDT Andrea Mazzanti, Elham Rahimi, Niccolo Lacaita, Junlei Zhao, Matteo Bassi, Francesco Svelto
2017	—	`conf`	2.6 A SiGe BiCMOS E-band power amplifier with 22% PAE at 18dBm OP1dB and 8.5% at 6dB back-off leveraging current clamping in a common-base stage. ISSCC Junlei Zhao, Elham Rahimi, Francesco Svelto, Andrea Mazzanti
2017	J	`jnl`	Design of low-power wideband frequency quadruplers based on transformer-coupled resonators for E-Band backhaul applications. Integr. Lorenzo Iotti, Matteo Bassi, Andrea Mazzanti, Francesco Svelto
2017	J	`jnl`	Insights Into Phase-Noise Scaling in Switch-Coupled Multi-Core LC VCOs for E-Band Adaptive Modulation Links. IEEE J. Solid State Circuits Lorenzo Iotti, Andrea Mazzanti, Francesco Svelto
2016	—	`conf`	23.4 A 56Gb/s 300mW silicon-photonics transmitter in 3D-integrated PIC25G and 55nm BiCMOS technologies. ISSCC Enrico Temporiti, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Andrea Ghilioni, Francesco Svelto
2016	C	`conf`	A 25Gb/s 3D-integrated silicon photonics receiver in 65nm CMOS and PIC25G for 100GbE optical links. ISCAS Dan Li, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Andrea Ghilioni, Enrico Temporiti, Francesco Svelto
2016	—	`conf`	A multi-core VCO and a frequency quadrupler for E-Band adaptive-modulation links in 55nm BiCMOS. ESSCIRC Lorenzo Iotti, Andrea Mazzanti, Francesco Svelto
2016	J	`jnl`	Insights Into Silicon Photonics Mach-Zehnder-Based Optical Transmitter Architectures. IEEE J. Solid State Circuits Enrico Temporiti, Andrea Ghilioni, Gabriele Minoia, Piero Orlandi, Matteo Repossi, Daniele Baldi, Francesco Svelto
2015	—	`conf`	22.9 A 1310nm 3D-integrated silicon photonics Mach-Zehnder-based transmitter with 275mW multistage CMOS driver achieving 6dB extinction ratio at 25Gb/s. ISSCC Marco Cignoli, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Andrea Ghilioni, Enrico Temporiti, Francesco Svelto
2015	—	`conf`	A 15 GHz-bandwidth 20dBm PSAT power amplifier with 22% PAE in 65nm CMOS. CICC Junlei Zhao, Matteo Bassi, Andrea Mazzanti, Francesco Svelto
2015	J	`jnl`	A 40-67 GHz Power Amplifier With 13 dBm ℙ IEEE J. Solid State Circuits Matteo Bassi, Junlei Zhao, Andrea Bevilacqua, Andrea Ghilioni, Andrea Mazzanti, Francesco Svelto
2014	—	`conf`	A 3D-integrated 25Gbps silicon photonics receiver in PIC25G and 65nm CMOS technologies. ESSCIRC Enrico Temporiti, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Andrea Ghilioni, Francesco Svelto
2014	—	`conf`	A 40-67GHz power amplifier with 13dBm PSAT and 16% PAE in 28 nm CMOS LP. ESSCIRC Junlei Zhao, Matteo Bassi, Andrea Bevilacqua, Andrea Ghilioni, Andrea Mazzanti, Francesco Svelto
2014	J	`jnl`	A Low-Noise Design Technique for High-Speed CMOS Optical Receivers. IEEE J. Solid State Circuits Dan Li, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Enrico Temporiti, Andrea Mazzanti, Francesco Svelto
2014	J	`jnl`	Analysis and Design of a High Voltage Integrated Class-B Amplifier for Ultra-Sound Transducers. IEEE Trans. Circuits Syst. I Regul. Pap. Dario Bianchi, Fabio Quaglia, Andrea Mazzanti, Francesco Svelto
2013	—	`conf`	A 33.6-to-46.2GHz 32nm CMOS VCO with 177.5dBc/Hz minimum noise FOM using inductor splitting for tuning extension. ISSCC Enrico Mammei, Enrico Monaco, Andrea Mazzanti, Francesco Svelto
2013	J	`jnl`	Analysis and Design of mm-Wave Frequency Dividers Based on Dynamic Latches With Load Modulation. IEEE J. Solid State Circuits Andrea Ghilioni, Andrea Mazzanti, Francesco Svelto
2013	—	`conf`	High-voltage integrated Class-B amplifier for ultrasound transducers. ICICDT Dario Bianchi, Fabio Quaglia, Andrea Mazzanti, Francesco Svelto
2012	—	`conf`	A 25Gb/s low noise 65nm CMOS receiver tailored to 100GBASE-LR4. ESSCIRC Dan Li, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Enrico Temporiti, Andrea Mazzanti, Francesco Svelto
2012	—	`conf`	A 4.8mW inductorless CMOS frequency divider-by-4 with more than 60% fractional bandwidth up to 70GHz. CICC Andrea Ghilioni, Ugo Decanis, Andrea Mazzanti, Francesco Svelto
2012	—	`conf`	A 90Vpp 720MHz GBW linear power amplifier for ultrasound imaging transmitters in BCD6-SOI. ISSCC Dario Bianchi, Fabio Quaglia, Andrea Mazzanti, Francesco Svelto
2011	J	`jnl`	A 24 GHz Subharmonic Direct Conversion Receiver in 65 nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. Andrea Mazzanti, Marco Sosio, Matteo Repossi, Francesco Svelto
2011	—	`conf`	A 6.5mW inductorless CMOS frequency divider-by-4 operating up to 70GHz. ISSCC Andrea Ghilioni, Ugo Decanis, Enrico Monaco, Andrea Mazzanti, Francesco Svelto
2011	J	`jnl`	A Low-Noise Quadrature VCO Based on Magnetically Coupled Resonators and a Wideband Frequency Divider at Millimeter Waves. IEEE J. Solid State Circuits Ugo Decanis, Andrea Ghilioni, Enrico Monaco, Andrea Mazzanti, Francesco Svelto
2011	J	`jnl`	A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOS. IEEE J. Solid State Circuits Federico Vecchi, Stefano Bozzola, Enrico Temporiti, Davide Guermandi, Massimo Pozzoni, Matteo Repossi, Marco Cusmai, Ugo Decanis, Andrea Mazzanti, Francesco Svelto
2011	—	`conf`	A mm-Wave quadrature VCO based on magnetically coupled resonators. ISSCC Ugo Decanis, Andrea Ghilioni, Enrico Monaco, Andrea Mazzanti, Francesco Svelto
2010	—	`conf`	A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization. ISSCC Massimo Pozzoni, Simone Erba, Davide Sanzogni, Marcello Ganzerli, Paolo Viola, Daniele Baldi, Matteo Repossi, Giorgio Spelgatti, Francesco Svelto
2010	—	`conf`	A 13.1% tuning range 115GHz frequency generator based on an injection-locked frequency doubler in 65nm CMOS. ISSCC Andrea Mazzanti, Enrico Monaco, Massimo Pozzoni, Francesco Svelto
2010	J	`jnl`	A 3.5 GHz Wideband ADPLL With Fractional Spur Suppression Through TDC Dithering and Feedforward Compensation. IEEE J. Solid State Circuits Enrico Temporiti, Colin Weltin-Wu, Daniele Baldi, Marco Cusmai, Francesco Svelto
2010	—	`conf`	A 3.5GHz wideband ADPLL with fractional spur suppression through TDC dithering and feedforward compensation. ISSCC Colin Weltin-Wu, Enrico Temporiti, Daniele Baldi, Marco Cusmai, Francesco Svelto
2010	J	`jnl`	A Low Phase-Noise Multi-Phase LO Generator for Wideband Demodulators Based on Reconfigurable Sub-Harmonic Mixers. IEEE J. Solid State Circuits Andrea Mazzanti, Mohammad B. Vahidfar, Marco Sosio, Francesco Svelto
2010	—	`conf`	A wideband mm-Wave CMOS receiver for Gb/s communications employing interstage coupled resonators. ISSCC Federico Vecchi, Stefano Bozzola, Massimo Pozzoni, Davide Guermandi, Enrico Temporiti, Matteo Repossi, Ugo Decanis, Andrea Mazzanti, Francesco Svelto
2010	J	`jnl`	Injection-Locked CMOS Frequency Doublers for μ -Wave and mm-Wave Applications. IEEE J. Solid State Circuits Enrico Monaco, Massimo Pozzoni, Francesco Svelto, Andrea Mazzanti
2010	J	`jnl`	Insights Into Wideband Fractional ADPLLs: Modeling and Calibration of Nonlinearity Induced Fractional Spurs. IEEE Trans. Circuits Syst. I Regul. Pap. Colin Weltin-Wu, Enrico Temporiti, Marco Cusmai, Daniele Baldi, Francesco Svelto
2009	J	`jnl`	A 3 GHz Fractional All-Digital PLL With a 1.8 MHz Bandwidth Implementing Spur Reduction Techniques. IEEE J. Solid State Circuits Enrico Temporiti, Colin Weltin-Wu, Daniele Baldi, Riccardo Tonietto, Francesco Svelto
2009	—	`conf`	A 5.2mW ku-band CMOS injection-locked frequency doubler with differential input / output. CICC Enrico Monaco, Mattia Borgarino, Francesco Svelto, Andrea Mazzanti
2009	J	`jnl`	A Multi-Standard 1.5 to 10 Gb/s Latch-Based 3-Tap DFE Receiver With a SSC Tolerant CDR for Serial Backplane Communication. IEEE J. Solid State Circuits Massimo Pozzoni, Simone Erba, Paolo Viola, Matteo Pisati, Emanuele Depaoli, Davide Sanzogni, Riccardo Brama, Daniele Baldi, Matteo Repossi, Francesco Svelto
2009	—	`conf`	A reconfigurable demodulator with 3-to-5GHz agile synthesizer for 9-band WiMedia UWB in 65nm CMOS. ISSCC Andrea Mazzanti, Mohammad B. Vahidfar, Marco Sosio, Francesco Svelto
2009	—	`conf`	A sliding IF receiver for mm-wave WLANs in 65nm CMOS. CICC Stefano Bozzola, Davide Guermandi, Federico Vecchi, Matteo Repossi, Massimo Pozzoni, Andrea Mazzanti, Francesco Svelto
2009	J	`jnl`	Design of Low-Loss Transmission Lines in Scaled CMOS by Accurate Electromagnetic Simulations. IEEE J. Solid State Circuits Federico Vecchi, Matteo Repossi, Wissam Eyssa, Paolo Arcioni, Francesco Svelto
2009	—	`conf`	Insights into wideband fractional All-Digital PLLs for RF applications. CICC Enrico Temporiti, Colin Weltin-Wu, Daniele Baldi, Riccardo Tonietto, Francesco Svelto
2008	—	`conf`	A 10Gb/s receiver with linear backplane equalization and mixer-based self-aligned CDR. CICC Simone Erba, Massimo Pozzoni, Matteo Pisati, Riccardo Brama, Davide Sanzogni, Emanuele Depaoli, Paolo Viola, Francesco Svelto
2008	—	`conf`	A 24GHz Sub-Harmonic Receiver Front-End with Integrated Multi-Phase LO Generation in 65nm CMOS. ISSCC Andrea Mazzanti, Marco Sosio, Matteo Repossi, Francesco Svelto
2008	J	`jnl`	A 30.5 dBm 48% PAE CMOS Class-E PA With Integrated Balun for RF Applications. IEEE J. Solid State Circuits Riccardo Brama, Luca Larcher, Andrea Mazzanti, Francesco Svelto
2008	—	`conf`	A 3GHz Fractional-N All-Digital PLL with Precise Time-to-Digital Converter Calibration and Mismatch Correction. ISSCC Colin Weltin-Wu, Enrico Temporiti, Daniele Baldi, Francesco Svelto
2008	—	`conf`	Architectures and Circuit Techniques for Nanoscale RF CMOS (Forum). ISSCC Stefan Heinen, Francesco Svelto, Jan Craninckx, Mototsugu Hamada, Domine Leenaerts, Chris Rudell
2007	—	`conf`	A 1.7-GHz 31dBm differential CMOS Class-E Power Amplifier with 58% PAE. CICC Riccardo Brama, Luca Larcher, Andrea Mazzanti, Francesco Svelto
2007	J	`jnl`	A 20 mW 3.24mm IEEE J. Solid State Circuits Valentina Della Torre, Matteo Conta, Ramesh Chokkalingam, Giuseppe Cusmai, Paolo Rossi, Francesco Svelto
2007	—	`conf`	A 3.2-to-7.3GHz Quadrature Oscillator with Magnetic Tuning. ISSCC Giuseppe Cusmai, Matteo Repossi, Guido Albasini, Francesco Svelto
2007	J	`jnl`	A 750 mV Fully Integrated Direct Conversion Receiver Front-End for GSM in 90-nm CMOS. IEEE J. Solid State Circuits Massimo Brandolini, Marco Sosio, Francesco Svelto
2007	J	`jnl`	A Magnetically Tuned Quadrature Oscillator. IEEE J. Solid State Circuits Giuseppe Cusmai, Matteo Repossi, Guido Albasini, Andrea Mazzanti, Francesco Svelto
2007	J	`jnl`	CMOS balanced regenerative frequency dividers for wide-band quadrature LO generation. Microelectron. J. Andrea Mazzanti, Luca Larcher, Francesco Svelto
2006	J	`jnl`	A +78 dBm IIP2 CMOS direct downconversion mixer for fully integrated UMTS receivers. IEEE J. Solid State Circuits Massimo Brandolini, Paolo Rossi, Davide Sanzogni, Francesco Svelto
2006	J	`jnl`	A 0.18-$muhbox m$CMOS Selective Receiver Front-End for UWB Applications. IEEE J. Solid State Circuits Giuseppe Cusmai, Massimo Brandolini, Paolo Rossi, Francesco Svelto
2006	J	`jnl`	A 1.8-GHz injection-locked quadrature CMOS VCO with low phase noise and high phase accuracy. IEEE Trans. Circuits Syst. I Regul. Pap. Andrea Mazzanti, Francesco Svelto
2006	—	`conf`	A 20mw 3.24mm2 fully integrated gps radio for cell-phones. ISSCC Valentina Della Torre, Matteo Conta, Ramesh Chokkalingam, Giuseppe Cusmai, Paolo Rossi, Francesco Svelto
2006	—	`conf`	A 750mV 15kHz 1/f Noise Corner 51dBm IIP2 Direct-Conversion Front-End for GSM in 90nm CMOS. ISSCC Massimo Brandolini, Marco Sosio, Francesco Svelto
2006	J	`jnl`	Analysis of reliability and power efficiency in cascode class-E PAs. IEEE J. Solid State Circuits Andrea Mazzanti, Luca Larcher, Riccardo Brama, Francesco Svelto
2006	J	`jnl`	CMOS injection locked oscillators for quadrature generation at radio-frequency. Microelectron. J. Andrea Mazzanti, Francesco Svelto
2005	J	`jnl`	A variable gain RF front-end, based on a Voltage-Voltage feedback LNA, for multistandard applications. IEEE J. Solid State Circuits Paolo Rossi, Antonio Liscidini, Massimo Brandolini, Francesco Svelto
2005	—	`conf`	An interference robust 0.18μm CMOS 3.1-8GHz receiver front-end for UWB radio. CICC Giuseppe Cusmai, Massimo Brandolini, Paolo Rossi, Francesco Svelto
2005	—	`conf`	Balanced CMOS LC-tank analog frequency dividers for quadrature LO generation. CICC Andrea Mazzanti, Luca Larcher, Francesco Svelto
2005	—	`conf`	Hybrid cascode compensation for two-stage CMOS operational amplifiers. ISCAS (2) Mohammad Yavari, Omid Shoaei, Francesco Svelto
2005	J	`jnl`	Statistical analysis of second-order intermodulation distortion in WCDMA direct conversion receivers. IEEE Trans. Circuits Syst. II Express Briefs Andrea Bevilacqua, Francesco Svelto
2004	J	`jnl`	A fully integrated 0.18-μm CMOS direct conversion receiver front-end with on-chip LO for UMTS. IEEE J. Solid State Circuits Francesco Gatta, Danilo Manstretta, Paolo Rossi, Francesco Svelto
2004	—	`conf`	Analysis and design of a dual band reconfigurable VCO. ICECS Andrea Mazzanti, Paola Uggetti, Raffaele Battaglia, Francesco Svelto
2004	J	`jnl`	Analysis and design of injection-locked LC dividers for quadrature generation. IEEE J. Solid State Circuits Andrea Mazzanti, Paola Uggetti, Francesco Svelto
2004	A	`conf`	Design space exploration for a UMTS front-end exploiting analog platforms. ICCAD F. De Bernarclinis, S. Gambini, R. Vincis, Francesco Svelto
2003	—	`conf`	Injection locking LC dividers for low power quadrature generation. CICC Andrea Mazzanti, Paola Uggetti, Paolo Rossi, Francesco Svelto
2003	J	`jnl`	Second-order intermodulation mechanisms in CMOS downconverters. IEEE J. Solid State Circuits Danilo Manstretta, Massimo Brandolini, Francesco Svelto
2002	—	`conf`	Analysis and optimization of IIP2 in CMOS direct down-converters. CICC Danilo Manstretta, Francesco Svelto
2001	J	`jnl`	A 2-dB noise figure 900-MHz differential CMOS LNA. IEEE J. Solid State Circuits Francesco Gatta, Enrico Sacchi, Francesco Svelto, Paolo Vilmercati, Rinaldo Castello
2001	J	`jnl`	Implementation of a CMOS LNA plus mixer for GPS applications with no external components. IEEE Trans. Very Large Scale Integr. Syst. Francesco Svelto, Stefano Deantoni, Giampiero Montagna, Rinaldo Castello
2000	—	`conf`	A 1 mA, -120.5 dbc/Hz at 600 kHz from 1.9 GHz fully tuneable LC CMOS VCO. CICC Francesco Svelto, Stefano Deantoni, Rinaldo Castello
2000	J	`jnl`	A 1.3 GHz low-phase noise fully tunable CMOS LC VCO. IEEE J. Solid State Circuits Francesco Svelto, Stefano Deantoni, Rinaldo Castello
2000	A	`conf`	An 8mA, 3.8dB NF, 40dB gain CMOS front-end for GPS applications. ISLPED Francesco Svelto, Stefano Deantoni, Giampiero Montagna, Rinaldo Castello
2000	C	`conf`	Solutions for image rejection CMOS LNA. ISCAS Francesco Svelto, Giampiero Montagna, Stefano Deantoni, Giulio Braschi, Rinaldo Castello
1999	—	`conf`	A 1.3 GHz CMOS VCO with 28% frequency tuning. CICC Francesco Svelto, Stefano Deantoni, Rinaldo Castello
1999	J	`jnl`	A low-voltage topology for CMOS RF mixers. IEEE Trans. Consumer Electron. Francesco Svelto, Matteo Conta, Valentina Della Torre, Rinaldo Castello
1998	J	`jnl`	Measurement and modeling of Si integrated inductors. IEEE Trans. Instrum. Meas. Paolo Arcioni, Rinaldo Castello, Giuseppe De Astis, Enrico Sacchi, Francesco Svelto
1998	J	`jnl`	Very accurate high-frequency noise spectral analysis of P-channel FET's. IEEE Trans. Instrum. Meas. Francesco Svelto
1993	C	`conf`	A BiCMOS Tunable Shaper for Detectors of Elementary Particles. ISCAS Andrea Baschirotto, Giovanni Cesura, Francesco Rezzi, Francesco Svelto