Florent Flament

14 papers A* 1A 1Misc 2Journal 4Unranked 6
YearRankTypeTitle / Venue / Authors
2012 J jnl
Blind Cartography for Side Channel Attacks: Cross-Correlation Cartography.
Int. J. Reconfigurable Comput.
Laurent Sauvage, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu
2011 A conf
Enhancement of simple electro-magnetic attacks by pre-characterization in frequency domain and demodulation techniques.
DATE
Olivier Meynard, Denis Réal, Florent Flament, Sylvain Guilley, Naofumi Homma, Jean-Luc Danger
2010 Misc conf
Characterization of the Electromagnetic Side Channel in Frequency Domain.
Inscrypt
Olivier Meynard, Denis Réal, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Frédéric Valette
2010 — conf
Countering early evaluation: an approach towards robust dual-rail precharge logic.
WESS
Shivam Bhasin, Sylvain Guilley, Florent Flament, Nidhal Selmane, Jean-Luc Danger
2010 — conf
Cross-Correlation Cartography.
ReConFig
Laurent Sauvage, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu
2010 — conf
Entropy-based Power Attack.
HOST
Houssem Maghrebi, Sylvain Guilley, Jean-Luc Danger, Florent Flament
2010 J jnl
Evaluation of Power Constant Dual-Rail Logics Countermeasures against DPA with Design Time Security Metrics.
IEEE Trans. Computers
Sylvain Guilley, Laurent Sauvage, Florent Flament, Vinh-Nga Vong, Philippe Hoogvorst, Renaud Pacalet
2010 — conf
Evaluation of White-Box and Grey-Box Noekeon Implementations in FPGA.
ReConFig
Zouha Cherif, Florent Flament, Jean-Luc Danger, Shivam Bhasin, Sylvain Guilley, Hervé Chabanne
2010 J jnl
Exploiting Dual-Output Programmable Blocks to Balance Secure Dual-Rail Logics.
Int. J. Reconfigurable Comput.
Laurent Sauvage, Maxime Nassar, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu
2010 Misc conf
First Principal Components Analysis: A New Side Channel Distinguisher.
ICISC
Youssef Souissi, Maxime Nassar, Sylvain Guilley, Jean-Luc Danger, Florent Flament
2009 — conf
Combined SCA and DFA Countermeasures Integrable in a FPGA Design Flow.
ReConFig
Shivam Bhasin, Jean-Luc Danger, Florent Flament, Tarik Graba, Sylvain Guilley, Yves Mathieu, Maxime Nassar, Laurent Sauvage, Nidhal Selmane
2009 — conf
DPL on Stratix II FPGA: What to Expect?.
ReConFig
Laurent Sauvage, Maxime Nassar, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu
2008 A* conf
An 8x8 run-time reconfigurable FPGA embedded in a SoC.
DAC
Sumanta Chaudhuri, Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Jean-Luc Danger
2007 J jnl
Secured CAD Back-End Flow for Power-Analysis-Resistant Cryptoprocessors.
IEEE Des. Test Comput.
Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Renaud Pacalet, Yves Mathieu