Florence Azaïs

141 papers A 12B 11C 8Misc 9Journal 50Unranked 51

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Cost-Effective Analytical Models of Resistive Opens Defects in FinFET Technology. IEEE Trans. Very Large Scale Integr. Syst. Gustavo Aguirre, Freddy Forero, Víctor H. Champac, Michel Renovell, Florence Azaïs, Mariane Comte, Jean-Marc Gallière
2025	J	`jnl`	Digital-Based Solution for the Generation of FM/PM Test Stimuli. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kamilia Tahraoui, Thibault Vayssade, François Lefevre, Laurent Latorre, Florence Azaïs
2024	—	`conf`	Digital Generation of RF Phase-Modulated Test Stimuli: Application to BPSK Modulation Scheme. DFT Kamilia Tahraoui, R. Burelle, T. Vayssade, François Lefevre, Laurent Latorre, Florence Azaïs
2024	—	`conf`	Digital generation of single tone FM/PM test stimuli: a theoretical analysis. LATS Kamilia Tahraoui, T. Vayssade, François Lefèvre, Laurent Latorre, Florence Azaïs
2024	—	`conf`	Logic Locking: Exploration of a new key-gate based on tristate logic. LATS Sophie Dupuis, Nassim Riadi, Clémy Moroukian, Florence Azaïs, Marie-Lise Flottes
2024	—	`conf`	Low-Resource Fully-Digital BPSK Demodulation Technique for Intra-Body Wireless Sensor Networks. I2MTC Stéphane Pitou, Florence Azaïs, Serge Bernard, Tristan Rouyer, Fabien Soulier, Vincent Kerzerho
2024	—	`conf`	Low-cost generation of RF test stimuli from baseband digital signals. ATS Kamilia Tahraoui, T. Vayssade, François Lefèvre, Laurent Latorre, Florence Azaïs
2024	J	`jnl`	Utilizing Layout Effects for Analog Logic Locking. CoRR Muayad J. Aljafar, Florence Azaïs, Marie-Lise Flottes, Samuel Pagliarini
2024	J	`jnl`	Utilizing layout effects for analog logic locking. J. Cryptogr. Eng. Muayad J. Aljafar, Florence Azaïs, Marie-Lise Flottes, Samuel Pagliarini
2023	—	`conf`	Low-cost digital solution for production test of ZigBee transmitters Special Session "AMS-RF testing". LATS Thibault Vayssade, Florence Azaïs, Laurent Latorre, François Lefèvre
2023	J	`jnl`	On the Use of the Indirect Test Strategy for Lifetime Performance Monitoring of RF Circuits. J. Electron. Test. Hassan El Badawi, Florence Azaïs, Serge Bernard, Mariane Comte, Vincent Kerzerho, Francois Lefevre
2022	—	`conf`	Leveraging Layout-based Effects for Locking Analog ICs. ASHES@CCS Muayad J. Aljafar, Florence Azaïs, Marie-Lise Flottes, Samuel Pagliarini
2022	J	`jnl`	Leveraging Layout-based Effects for Locking Analog ICs. CoRR Muayad J. Aljafar, Florence Azaïs, Marie-Lise Flottes, Samuel Pagliarini
2021	A	`conf`	Digital test of ZigBee transmitters: Validation in industrial test environment. DATE Thibault Vayssade, Florence Azaïs, Laurent Latorre, François Lefèvre
2021	J	`jnl`	Evaluation of a Two-Tier Adaptive Indirect Test Flow for a Front-End RF Circuit. J. Electron. Test. Hassan El Badawi, Florence Azaïs, Serge Bernard, Mariane Comte, Vincent Kerzerho, Francois Lefevre
2021	B	`conf`	Exploration of a digital-based solution for the generation of 2.4GHz OQPSK test stimuli. ETS Thibault Vayssade, Mouhamad Chehaitly, Florence Azaïs, Laurent Latorre, François Lefèvre
2021	—	`conf`	Exploring on-line RF performance monitoring based on the indirect test strategy. LATS Hassan El Badawi, Florence Azaïs, Serge Bernard, Mariane Comte, Vincent Kerzèrho, François Lefèvre
2021	J	`jnl`	Low-Cost EVM Measurement of ZigBee Transmitters From 1-bit Undersampled Acquisition. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. T. Vayssade, Florence Azaïs, Laurent Latorre, François Lefèvre
2020	C	`conf`	Development and Application of Embedded Test Instruments to Digital, Analog/RFs and Secure ICs. IOLTS Florence Azaïs, Serge Bernard, Mariane Comte, Bastien Deveautour, Sophie Dupuis, Hassan El Badawi, Marie-Lise Flottes, Patrick Girard, Vincent Kerzèrho, Laurent Latorre, François Lefèvre, Bruno Rouzeyre, Emanuele Valea, T. Vayssade, Arnaud Virazel
2020	—	`conf`	EVM measurement of RF ZigBee transceivers using standard digital ATE. DFT T. Vayssade, Florence Azaïs, Laurent Latorre, François Lefevre
2020	—	`conf`	Implementing indirect test of RF circuits without compromising test quality: a practical case study. LATS Hassan El Badawi, Florence Azaïs, Serge Bernard, Mariane Comte, Vincent Kerzèrho, Francois Lefevre, I. Gorenflot
2020	J	`jnl`	Investigations on the Use of Ensemble Methods for Specification-Oriented Indirect Test of RF Circuits. J. Electron. Test. Hassan El Badawi, Florence Azaïs, Serge Bernard, Mariane Comte, Vincent Kerzerho, Francois Lefevre
2019	J	`jnl`	Analytical Models for the Evaluation of Resistive Short Defect Detectability in Presence of Process Variations: Application to 28nm Bulk and FDSOI Technologies. J. Electron. Test. Amit Karel, Florence Azaïs, Mariane Comte, Jean-Marc Gallière, Michel Renovell
2019	B	`conf`	Power Measurement and Spectral Test of ZigBee Transmitters from 1-bit Under-sampled Acquisition. ETS T. Vayssade, Florence Azaïs, Laurent Latorre, Francois Lefevre
2019	—	`conf`	Use of ensemble methods for indirect test of RF circuits: can it bring benefits? LATS Hassan El Badawi, Florence Azaïs, Serge Bernard, Mariane Comte, Vincent Kerzerho, Francois Lefevre
2019	—	`conf`	Which metrics to use for RF indirect test strategy? SMACD Hassan El Badawi, Mariane Comte, Florence Azaïs, Vincent Kerzèrho, Serge Bernard, François Lefevre
2018	—	`conf`	Impact of process variations on the detectability of resistive short defects: Comparative analysis between 28nm Bulk and FDSOI technologies. LATS Amit Karel, Florence Azaïs, Mariane Comte, Jean-Marc Gallière, Michel Renovell
2018	C	`conf`	Low-cost functional test of a 2.4 GHz OQPSK transmitter using standard digital ATE. IOLTS T. Vayssade, Florence Azaïs, Laurent Latorre, Francois Lefevre
2018	J	`jnl`	On-chip Generation of Sine-wave Summing Digital Signals: an Analytic Study Considering Implementation Constraints. J. Electron. Test. Stephane David-Grignot, Achraf Lamlih, Mohamed Moez Belhaj, Vincent Kerzerho, Florence Azaïs, Fabien Soulier, Philippe Freitas, Tristan Rouyer, Sylvain Bonhommeau, Serge Bernard
2017	—	`conf`	Comprehensive Study for Detection of Weak Resistive Open and Short Defects in FDSOI Technology. ISVLSI Amit Karel, Florence Azaïs, Mariane Comte, Jean-Marc Gallière, Michel Renovell, Keshav Singh
2017	B	`conf`	Detection of resistive open and short defects in FDSOI under delay-based test: Optimal VDD and body biasing conditions. ETS Amit Karel, Florence Azaïs, Mariane Comte, Jean-Marc Gallière, Michel Renovell, Keshav Singh
2017	J	`jnl`	Resistive Bridging Defect Detection in Bulk, FDSOI and FinFET Technologies. J. Electron. Test. Amit Karel, Mariane Comte, Jean-Marc Gallière, Florence Azaïs, Michel Renovell
2016	—	`conf`	Comparative study of Bulk, FDSOI and FinFET technologies in presence of a resistive short defect. LATS Amit Karel, Mariane Comte, Jean-Marc Gallière, Florence Azaïs, Michel Renovell
2016	J	`jnl`	Digital Embedded Test Instrument for On-Chip Phase Noise Testing of Analog/RF Integrated Circuits. J. Circuits Syst. Comput. Florence Azaïs, Stephane David-Grignot, Laurent Latorre, Francois Lefevre
2016	—	`conf`	Impact of VT and Body-Biasing on Resistive Short Detection in 28nm UTBB FDSOI - LVT and RVT Configurations. ISVLSI Amit Karel, Mariane Comte, Jean-Marc Gallière, Florence Azaïs, Michel Renovell
2016	J	`jnl`	SSB Phase Noise Evaluation of Analog/IF Signals on Standard Digital ATE. J. Electron. Test. Florence Azaïs, Stephane David-Grignot, Laurent Latorre, Francois Lefevre
2015	—	`conf`	A Framework for Efficient Implementation of Analog/RF Alternate Test with Model Redundancy. ISVLSI Syhem Larguech, Florence Azaïs, Serge Bernard, Mariane Comte, Vincent Kerzerho, Michel Renovell
2015	—	`conf`	A digital technique for the evaluation of SSB phase noise of analog/RF signals. LATS Florence Azaïs, Stephane David-Grignot, Laurent Latorre, Francois Lefevre
2015	B	`conf`	A new technique for low-cost phase noise production testing from 1-bit signal acquisition. ETS Stephane David-Grignot, Florence Azaïs, Laurent Latorre, Francois Lefevre
2015	B	`conf`	Analog test: Why still "à la mode" after more than 25 years of research? ETS Florence Azaïs
2015	J	`jnl`	Efficiency evaluation of analog/RF alternate test: Comparative study of indirect measurement selection strategies. Microelectron. J. Syhem Larguech, Florence Azaïs, Serge Bernard, Mariane Comte, Vincent Kerzerho, Michel Renovell
2015	C	`conf`	Embedded Test Instrument for On-Chip Phase Noise Evaluation of Analog/IF Signals. DDECS Florence Azaïs, Stephane David-Grignot, Laurent Latorre, Francois Lefevre
2015	J	`jnl`	Phase Noise Testing of Analog/IF Signals Using Digital ATE: A New Post-Processing Algorithm for Extended Measurement Range. J. Electron. Test. Stephane David-Grignot, Florence Azaïs, Laurent Latorre, Francois Lefevre
2015	Misc	`conf`	Special session: Hot topics: Statistical test methods. VTS Manuel J. Barragán, Gildas Léger, Florence Azaïs, Ronald D. Blanton, Adit D. Singh, Stephen Sunter
2015	—	`conf`	Toward Adaptation of ADCs to Operating Conditions through On-chip Correction. ISVLSI Vincent Kerzerho, Ludovic Guillaume-Sage, Florence Azaïs, Mariane Comte, Michel Renovell, Serge Bernard
2014	J	`jnl`	Enhancing confidence in indirect analog/RF testing against the lack of correlation between regular parameters and indirect measurements. Microelectron. J. Haithem Ayari, Florence Azaïs, Serge Bernard, Mariane Comte, Vincent Kerzerho, Michel Renovell
2014	—	`conf`	Evaluation of indirect measurement selection strategies in the context of analog/RF alternate testing. LATW Syhem Larguech, Florence Azaïs, Serge Bernard, Vincent Kerzerho, Mariane Comte, Michel Renovell
2014	A	`conf`	Low-cost phase noise testing of complex RF ICs using standard digital ATE. ITC Stephane David-Grignot, Florence Azaïs, Laurent Latorre, Francois Lefevre
2014	A	`conf`	New implementions of predictive alternate analog/RF test with augmented model redundancy. DATE Haithem Ayari, Florence Azaïs, Serge Bernard, Mariane Comte, Vincent Kerzerho, Michel Renovell
2014	—	`conf`	Phase noise measurement on IF analog signals using standard digital ATE resources. NEWCAS Stephane David-Grignot, Florence Azaïs, Laurent Latorre, Francois Lefevre
2014	C	`conf`	Solutions for the self-adaptation of communicating systems in operation. IOLTS Martin Andraud, Anthony Deluthault, Mouhamadou Dieng, Florence Azaïs, Serge Bernard, Philippe Cauvet, Mariane Comte, Thibault Kervaon, Vincent Kerzerho, Salvador Mir, Paul-Henri Pugliesi-Conti, Michel Renovell, Fabien Soulier, Emmanuel Simeu, Haralampos-G. D. Stratigopoulos
2014	J	`jnl`	Study of Low-Cost Electrical Test Strategies for Post-Silicon Yield Improvement of MEMS Convective Accelerometers. J. Electron. Test. Ahmed Amine Rekik, Florence Azaïs, Frédérick Mailly, Pascal Nouet
2014	J	`jnl`	Testing for gate oxide short defects using the detectability interval paradigm. it Inf. Technol. Jean-Marc Gallière, Florence Azaïs, Mariane Comte, Michel Renovell
2013	J	`jnl`	A novel implementation of the histogram-based technique for measurement of INL of LUT-based correction of ADC. Microelectron. J. Vincent Kerzerho, Serge Bernard, Florence Azaïs, Mariane Comte, Olivier Potin, Chuan Shan, G. Bontorin, Michel Renovell
2013	—	`conf`	Accurate and efficient analytical electrical model of antenna for NFC applications. NEWCAS Mouhamadou Dieng, Mariane Comte, Serge Bernard, Vincent Kerzerho, Florence Azaïs, Michel Renovell, Thibault Kervaon, Paul-Henri Pugliesi-Conti
2013	B	`conf`	Implementing model redundancy in predictive alternate test to improve test confidence. ETS Haithem Ayari, Florence Azaïs, Serge Bernard, Mariane Comte, Vincent Kerzerho, Olivier Potin, Michel Renovell
2013	—	`conf`	MIRID: Mixed-Mode IR-Drop Induced Delay Simulator. Asian Test Symposium Jie Jiang, Marina Aparicio, Mariane Comte, Florence Azaïs, Michel Renovell, Ilia Polian
2013	—	`conf`	Pre-characterization procedure for a mixed mode simulation of IR-drop induced delays. LATW Marina Aparicio, Mariane Comte, Florence Azaïs, Michel Renovell, Jie Jiang, Ilia Polian, Bernd Becker
2012	—	`conf`	Design-for-manufacturability of MEMS convective accelerometers through adaptive electrical calibration strategy. LATW Ahmed Amine Rekik, Florence Azaïs, Frédérick Mailly, Pascal Nouet
2012	—	`conf`	Low-cost SNR estimation of analog signals using standard digital automated test equipment (ATE). NEWCAS Florence Azaïs, Laurent Latorre
2012	A	`conf`	Making predictive analog/RF alternate test strategy independent of training set size. ITC Haithem Ayari, Florence Azaïs, Serge Bernard, Mariane Comte, Vincent Kerzerho, Olivier Potin, Michel Renovell
2012	Misc	`conf`	Smart selection of indirect parameters for DC-based alternate RF IC testing. VTS Haithem Ayari, Florence Azaïs, Serge Bernard, Mariane Comte, Michel Renovell, Vincent Kerzerho, Olivier Potin, Christophe Kelma
2011	J	`jnl`	A Behavioral Model of MEMS Convective Accelerometers for the Evaluation of Design and Calibration Strategies at System Level. J. Electron. Test. Ahmed Amine Rekik, Florence Azaïs, Norbert Dumas, Frédérick Mailly, Pascal Nouet
2011	J	`jnl`	A Level-Crossing Approach for the Analysis of RF Modulated Signals Using Only Digital Test Resources. J. Electron. Test. Nicolas Pous, Florence Azaïs, Laurent Latorre, Jochen Rivoir
2011	A	`conf`	An electrical test method for MEMS convective accelerometers: Development and evaluation. DATE Ahmed Amine Rekik, Florence Azaïs, Norbert Dumas, Frédérick Mailly, Pascal Nouet
2011	J	`jnl`	Digital Test Method for Embedded Converters with Unknown-Phase Harmonics. J. Electron. Test. Vincent Kerzerho, Mariane Comte, Florence Azaïs, Philippe Cauvet, Serge Bernard, Michel Renovell
2011	—	`conf`	Test and calibration of MEMS convective accelerometers with a fully electrical setup. LATW Ahmed Amine Rekik, Florence Azaïs, Norbert Dumas, Frédérick Mailly, Pascal Nouet
2010	—	`conf`	Experiments on the analysis of phase/frequency-modulated RF signals using digital tester channels. LATW Nicolas Pous, Florence Azaïs, Laurent Latorre, Pascal Nouet, Jochen Rivoir
2010	B	`conf`	On the use of standard digital ATE for the analysis of RF signals. ETS Nicolas Pous, Florence Azaïs, Laurent Latorre, Jochen Rivoir
2010	J	`jnl`	Study of an Electrical Setup for Capacitive MEMS Accelerometers Test and Calibration. J. Electron. Test. Norbert Dumas, Florence Azaïs, Frédérick Mailly, Pascal Nouet
2009	—	`conf`	A multi-converter DFT technique for complex SIP: Concepts and validation. ECCTD Vincent Kerzerho, Philippe Cauvet, Serge Bernard, Florence Azaïs, Mariane Comte, Michel Renovell
2009	C	`conf`	An analysis of the timing behavior of CMOS digital blocks under Simultaneous Switching Noise conditions. DDECS Florence Azaïs, Yves Bertrand, Michel Renovell
2009	J	`jnl`	Characterization of the transient behavior of gated/STI diodes and their associated BJT in the CDM time domain. Microelectron. Reliab. Jean-Robert Manouvrier, Pascal Fonteneau, Charles-Alexandre Legrand, Pascal Nouet, Florence Azaïs
2009	—	`conf`	Exploiting Zero-Crossing for the Analysis of FM Modulated Analog/RF Signals Using Digital ATE. Asian Test Symposium Nicolas Pous, Florence Azaïs, Laurent Latorre, Pascal Nouet, Jochen Rivoir
2008	C	`conf`	A novel method for test and calibration of capacitive accelerometers with a fully electrical setup. DDECS Norbert Dumas, Florence Azaïs, Frédérick Mailly, Andrew Richardson, Pascal Nouet
2008	J	`jnl`	ADC Production Test Technique Using Low-Resolution Arbitrary Waveform Generator. VLSI Design Vincent Kerzerho, Philippe Cauvet, Serge Bernard, Florence Azaïs, Michel Renovell, Mariane Comte, Omar Chakib
2008	C	`conf`	On the Detection of SSN-Induced Logic Errors through On-Chip Monitoring. IOLTS Florence Azaïs, Laurent Larguier, Yves Bertrand, Michel Renovell
2007	B	`conf`	"Analogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC. ETS Vincent Kerzerho, Philippe Cauvet, Serge Bernard, Florence Azaïs, Mariane Comte, Michel Renovell
2007	J	`jnl`	Fully digital test solution for a set of ADCs and DACs embedded in a SIP or SOC. IET Comput. Digit. Tech. Vincent Kerzerho, Philippe Cauvet, Serge Bernard, Florence Azaïs, Mariane Comte, Michel Renovell
2007	—	`conf`	Impact of Simultaneous Switching Noise on the Static behavior of Digital CMOS Circuits. ATS Florence Azaïs, Laurent Larguier, Michel Renovell
2006	B	`conf`	"Analogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC. ETS Vincent Kerzerho, Philippe Cauvet, Serge Bernard, Florence Azaïs, Mariane Comte, Michel Renovell
2006	J	`jnl`	A Novel DFT Technique for Testing Complete Sets of ADCs and DACs in Complex SiPs. IEEE Des. Test Comput. Vincent Kerzerho, Philippe Cauvet, Serge Bernard, Florence Azaïs, Mariane Comte, Michel Renovell
2006	J	`jnl`	Electro-thermal Stimuli for MEMS Testing in FSBM Technology. J. Electron. Test. Norbert Dumas, Florence Azaïs, Laurent Latorre, Pascal Nouet
2006	J	`jnl`	Electro-thermal short pulsed simulation for SOI technology. Microelectron. Reliab. Christophe Entringer, Philippe Flatresse, Philippe Galy, Florence Azaïs, Pascal Nouet
2005	J	`jnl`	A Strategy for Optimal Test Point Insertion in Analog Cascaded Filters. J. Electron. Test. Florence Azaïs, Marcelo Lubaszewski, Pascal Nouet, Michel Renovell
2005	J	`jnl`	A new multi-finger SCR-based structure for efficient on-chip ESD protection. Microelectron. Reliab. Florence Azaïs, B. Caillard, S. Dournelle, P. Salomé, Pascal Nouet
2005	J	`jnl`	Applying the Oscillation Test Strategy to FPAA's Configurable Analog Blocks. J. Electron. Test. Tiago R. Balen, Antonio Q. Andrade, Florence Azaïs, Marcelo Lubaszewski, Michel Renovell
2005	J	`jnl`	Built-in self-test of global interconnects of field programmable analog arrays. Microelectron. J. Antonio Andrade Jr., Gustavo Vieira, Tiago R. Balen, Marcelo Lubaszewski, Florence Azaïs, Michel Renovell
2005	J	`jnl`	Delay Testing Viability of Gate Oxide Short Defects. J. Comput. Sci. Technol. Jean Marc Gallière, Michel Renovell, Florence Azaïs, Yves Bertrand
2005	J	`jnl`	Efficiency of Optimized Dynamic Test Flows for ADCs: Sensitivity to Specifications. J. Electron. Test. Florence Azaïs, Serge Bernard, Yves Bertrand, Mariane Comte, Michel Renovell
2005	Misc	`conf`	On-Chip Electro-Thermal Stimulus Generation for a MEMS-Based Magnetic Field Sensor. VTS Norbert Dumas, Florence Azaïs, Laurent Latorre, Pascal Nouet
2005	Misc	`conf`	Testing the Interconnect Networks and I/O Resources of Field Programmable Analog Arrays. VTS Gustavo Pereira, Antonio Andrade Jr., Tiago R. Balen, Marcelo Lubaszewski, Florence Azaïs, Michel Renovell
2005	B	`conf`	Towards on-line testing of MEMS using electro-thermal excitation. ETS Frédérick Mailly, Florence Azaïs, Norbert Dumas, Laurent Latorre, Pascal Nouet
2004	Misc	`conf`	An Approach to the Built-In Self-Test of Field Programmable Analog Arrays. VTS Tiago R. Balen, Antonio Andrade Jr., Florence Azaïs, Marcelo Lubaszewski, Michel Renovell
2004	—	`conf`	Analysis and Attenuation Proposal in Ground Bounce. Asian Test Symposium Antonio Zenteno, Víctor H. Champac, Michel Renovell, Florence Azaïs
2004	J	`jnl`	Automated Diagnosis and Probing Flow for Fast Fault Localization in IC. Microelectron. Reliab. D. Martin, Romain Desplats, Gérald Haller, Pascal Nouet, Florence Azaïs
2004	J	`jnl`	Correlation Between Static and Dynamic Parameters of A-to-D Converters: In the View of a Unique Test Procedure. J. Electron. Test. Florence Azaïs, Serge Bernard, Yves Bertrand, Mariane Comte, Michel Renovell
2004	J	`jnl`	Efficiency of Spectral-Based ADC Test Flows to Detect Static Errors. J. Electron. Test. Serge Bernard, Mariane Comte, Florence Azaïs, Yves Bertrand, Michel Renovell
2004	B	`conf`	Electrically-induced thermal stimuli for MEMS testing. ETS Norbert Dumas, Florence Azaïs, Laurent Latorre, Pascal Nouet
2004	A	`conf`	Testing the Configurable Analog Blocks of Field Programmable Analog Arrays. ITC Tiago R. Balen, Antonio Andrade Jr., Florence Azaïs, Michel Renovell, Marcelo Lubaszewski
2003	A	`conf`	A New Methodology For ADC Test Flow Optimization. ITC Serge Bernard, Mariane Comte, Florence Azaïs, Yves Bertrand, Michel Renovell
2003	J	`jnl`	A-to-D converters static error detection from dynamic parameter measurement. Microelectron. J. Florence Azaïs, Serge Bernard, Yves Bertrand, Mariane Comte, Michel Renovell
2003	J	`jnl`	An All-Digital DFT Scheme for Testing Catastrophic Faults in PLLs. IEEE Des. Test Comput. Florence Azaïs, Yves Bertrand, Michel Renovell, André Ivanov, Sassan Tabatabaei
2003	—	`conf`	Delay Testing of MOS Transistor with Gate Oxide Short. Asian Test Symposium Michel Renovell, Jean Marc Gallière, Florence Azaïs, Yves Bertrand
2003	J	`jnl`	Extending IEEE Std. 1149.4 Analog Boundary Modules to Enhance Mixed-Signal Test. IEEE Des. Test Comput. Uros Kac, Franc Novak, Florence Azaïs, Pascal Nouet, Michel Renovell
2003	J	`jnl`	Modeling the Random Parameters Effects in a Non-Split Model of Gate Oxide Short. J. Electron. Test. Michel Renovell, Jean Marc Gallière, Florence Azaïs, Yves Bertrand
2003	J	`jnl`	On-Chip Generation of Ramp and Triangle-Wave Stimuli for ADC BIST. J. Electron. Test. Serge Bernard, Florence Azaïs, Yves Bertrand, Michel Renovell
2002	—	`conf`	A high accuracy triangle-wave signal generator for on-chip ADC testing. ETW Serge Bernard, Florence Azaïs, Yves Bertrand, Michel Renovell
2002	—	`conf`	Estimating Static Parameters of A-to-D Converters from Spectral Analysis. LATW Florence Azaïs, Serge Bernard, Yves Bertrand, Mariane Comte, Michel Renovell, Marcelo Lubaszewski
2002	—	`conf`	European Network for Test Education. DELTA Yves Bertrand, Marie-Lise Flottes, Florence Azaïs, Serge Bernard, Laurent Latorre, Regis Lorival
2002	J	`jnl`	Improving Defect Detection in Static-Voltage Testing. IEEE Des. Test Comput. Michel Renovell, Florence Azaïs, Yves Bertrand
2002	—	`conf`	Modeling gate oxide short defects in CMOS minimum transistors. ETW Michel Renovell, Jean Marc Gallière, Florence Azaïs, Yves Bertrand
2001	Misc	`conf`	A Low-Cost Adaptive Ramp Generator for Analog BIST Applications. VTS Florence Azaïs, Serge Bernard, Yves Bertrand, Xavier Michel, Michel Renovell
2001	J	`jnl`	A Low-Cost BIST Architecture for Linear Histogram Testing of ADCs. J. Electron. Test. Florence Azaïs, Serge Bernard, Yves Bertrand, Michel Renovell
2001	—	`conf`	Analog BIST Generator for ADC Testing. DFT Serge Bernard, Florence Azaïs, Yves Bertrand, Michel Renovell
2001	A	`conf`	Boolean and current detection of MOS transistor with gate oxide short. ITC Michel Renovell, Jean Marc Gallière, Florence Azaïs, Serge Bernard, Yves Bertrand
2001	—	`conf`	Electrical Analysis of Gate Oxide Short in MOS Technologies. LATW Michel Renovell, Jean Marc Gallière, Florence Azaïs, Yves Bertrand
2001	A	`conf`	Implementation of a linear histogram BIST for ADCs. DATE Florence Azaïs, Serge Bernard, Yves Bertrand, Michel Renovell
2001	J	`jnl`	On the detectability of CMOS floating gate transistor faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. André Ivanov, Sumbal Rafiq, Michel Renovell, Florence Azaïs, Yves Bertrand
2001	—	`conf`	On-Chip Generation of High-Quality Ramp Stimulus With Minimal Silicon Area. LATW Florence Azaïs, Serge Bernard, Yves Bertrand, Xavier Michel, Michel Renovell
2001	C	`conf`	On-chip Generator of a Saw-Tooth Test Stimulus for ADC BIST. VLSI-SOC Florence Azaïs, Serge Bernard, Yves Bertrand, Michel Renovell
2001	J	`jnl`	Optimizing Sinusoidal Histogram Test for Low Cost ADC BIST. J. Electron. Test. Florence Azaïs, Serge Bernard, Yves Bertrand, Michel Renovell
2000	J	`jnl`	Combining Functional and Structural Approaches for Switched-Current Circuit Testing. J. Electron. Test. Michel Renovell, Florence Azaïs, J.-C. Bodin, Yves Bertrand
2000	Misc	`conf`	Hardware Resource Minimization for Histogram-Based ADC BIST. VTS Michel Renovell, Florence Azaïs, Serge Bernard, Yves Bertrand
2000	—	`conf`	Minimizing the Hardware Overhead of a Histogram-Based BIST Scheme for Analog-to-Digital Converters. LATW Serge Bernard, Florence Azaïs, Yves Bertrand, Michel Renovell
2000	—	`conf`	On the Temperature Dependencies of Analog BIST. LATW Luigi Carro, Michel Renovell, Érika F. Cota, Marcelo Lubaszewski, Yves Bertrand, Florence Azaïs
2000	A	`conf`	Reuse of Existing Resources for Analog BIST of a Switch Capacitor Filte. DATE Érika F. Cota, Michel Renovell, Florence Azaïs, Yves Bertrand, Luigi Carro, Marcelo Lubaszewski
2000	—	`conf`	TI-BIST: a temperature independent analog BIST for switched-capacitor filters. Asian Test Symposium Luigi Carro, Érika F. Cota, Marcelo Lubaszewski, Yves Bertrand, Florence Azaïs, Michel Renovell
2000	—	`conf`	Towards an ADC BIST scheme using the histogram test technique. ETW Florence Azaïs, Serge Bernard, Y. Betrand, Michel Renovell
1999	—	`conf`	A Successful Distance-Learning Experience for IC Test Education. MSE Yves Bertrand, Florence Azaïs, Marie-Lise Flottes, Regis Lorival
1999	J	`jnl`	Detection of Defects Using Fault Model Oriented Test Sequences. J. Electron. Test. Michel Renovell, Florence Azaïs, Yves Bertrand
1999	—	`conf`	Functional and structural testing of switched-current circuits. ETW Michel Renovell, Florence Azaïs, J.-C. Bodin, Yves Bertrand
1999	A	`conf`	Optimal conditions for Boolean and current detection of floating gate faults. ITC Michel Renovell, André Ivanov, Yves Bertrand, Florence Azaïs, Sumbal Rafiq
1998	—	`conf`	A Built-In Multi-Mode Stimuli Generator for Analogue and Mixed-Signal Testing. SBCCI Marcelo Lubaszewski, Michel Renovell, Salvador Mir, Florence Azaïs, Yves Bertrand
1998	—	`conf`	A Methodology and Design for Effective Testing of Voltage-Controlled Oscillators (VCOs. Asian Test Symposium Florence Azaïs, André Ivanov, Michel Renovell, Yves Bertrand
1998	—	`conf`	BISTing Switched-Current Circuits. Asian Test Symposium Michel Renovell, Florence Azaïs, J.-C. Bodin, Yves Bertrand
1998	Misc	`conf`	Design-For-Testability for Switched-Current Circuits. VTS Florence Azaïs, Michel Renovell, Yves Bertrand, J.-C. Bodin
1998	A	`conf`	Optimized Implementations of the Multi-Configuration DFT Technique for Analog Circuits. DATE Michel Renovell, Florence Azaïs, Yves Bertrand
1997	—	`conf`	On-chip analog output response compaction. ED&TC Michel Renovell, Florence Azaïs, Yves Bertrand
1996	Misc	`conf`	The multi-configuration: A DFT technique for analog circuits. VTS Michel Renovell, Florence Azaïs, Yves Bertrand
1995	—	`conf`	A design-for-test technique for multistage analog circuits. Asian Test Symposium Michel Renovell, Florence Azaïs, Yves Bertrand