Fernando De Bernardinis

29 papers A* 4A 4Misc 2Journal 8Unranked 9
YearRankTypeTitle / Venue / Authors
2025 J jnl
An Eight-Lane 800-Gb/s Transceiver for PAM-4 Optical Direct-Detection Applications in 5-nm FinFET Process.
IEEE J. Solid State Circuits
Fabio Giunco, Marco Sosio, Claudio Nani, Ivan Fabiano, Travis Lovitt, Victor Karam, Domenico Albano, Claudio Asero, Nicola Codega, Marco Garampazzi, Nicola Ghittori, Leonardo Daniel Herbas Burgos, Stanley S. K. Ho, Enrico Monaco, Benjamín T. Reyes, Paolo Rossi, Enrico Temporiti, Paolo Pascale, Fernando De Bernardinis, Shawn Scouten, Stephen Jantzi
2024 — conf
A 800Gb/s Transceiver for PAM-4 Optical Direct-Detection Applications in 5nm FinFet Process.
VLSI Technology and Circuits
Fabio Giunco, Marco Sosio, Claudio Nani, Ivan Fabiano, Travis Lovitt, Victor Karam, D. Albano, C. Asero, Nicola Codega, Marco Garampazzi, Nicola Ghittori, D. Herbas, S. Ho, Enrico Monaco, Benjamín T. Reyes, P. Rossi, E. Temporiti, P. Pascale, Fernando De Bernardinis, S. Scouten, S. Jantzi
2020 J jnl
A 243-mW 1.25-56-Gb/s Continuous Range PAM-4 42.5-dB IL ADC/DAC-Based Transceiver in 7-nm FinFET.
IEEE J. Solid State Circuits
Matteo Pisati, Alberto Minuti, Giacomino Bollati, Fabio Giunco, Roberto G. Massolini, Giovanni Cesura, Fernando De Bernardinis, Paolo Pascale, Claudio Nani, Nicola Ghittori, Enrico Pozzati, Marco Sosio, Marco Garampazzi, Antonio Milani
2019 — conf
A Sub-250mW 1-to-56Gb/s Continuous-Range PAM-4 42.5dB IL ADC/DAC-Based Transceiver in 7nm FinFET.
ISSCC
Matteo Pisati, Fernando De Bernardinis, Paolo Pascale, Claudio Nani, Marco Sosio, Enrico Pozzati, Nicola Ghittori, Federico Magni, Marco Garampazzi, Giacomino Bollati, Antonio Milani, Alberto Minuti, Fabio Giunco, Paola Uggetti, Ivan Fabiano, Nicola Codega, Alessandro Bosi, Nicola Carta, Demetrio Pellicone, Giorgio Spelgatti, Massimo Cutrupi, Andrea Rossini, Roberto G. Massolini, Giovanni Cesura, Ivan Bietti
2013 J jnl
A 40-MHz-to-1-GHz Fully Integrated Multistandard Silicon Tuner in 80-nm CMOS.
IEEE J. Solid State Circuits
Jody Greenberg, Fernando De Bernardinis, Carlo Tinella, Antonio Milani, Johnny Pan, Paola Uggetti, Marco Sosio, Shaoan Dai, Samuel Er-Shen Tang, Giovanni Cesura, Gabriele Gandolfi, Vittorio Colonna, Rinaldo Castello
2012 — conf
A 40MHz-to-1GHz fully integrated multistandard silicon tuner in 80nm CMOS.
ISSCC
Jody Greenberg, Fernando De Bernardinis, Carlo Tinella, Antonio Milani, Johnny Pan, Paola Uggetti, Marco Sosio, Shaoan Dai, Sam Tang, Giovanni Cesura, Gabriele Gandolfi, Vittorio Colonna, Rinaldo Castello
2012 J jnl
A Dither-Less All Digital PLL for Cellular Transmitters.
IEEE J. Solid State Circuits
Luca Vercesi, Luca Fanori, Fernando De Bernardinis, Antonio Liscidini, Rinaldo Castello
2011 — conf
A complete DVB-T/ATSC tuner analog base-band implemented with a single filtering ADC.
ESSCIRC
Marco Sosio, Antonio Liscidini, Rinaldo Castello, Fernando De Bernardinis
2011 — conf
A dither-less all digital PLL for cellular transmitters.
CICC
Luca Vercesi, Luca Fanori, Fernando De Bernardinis, Antonio Liscidini, Rinaldo Castello
2010 J jnl
A Platform-Based Methodology for System-Level Mixed-Signal Design.
EURASIP J. Embed. Syst.
Pierluigi Nuzzo, Xuening Sun, Chang-Ching Wu, Fernando De Bernardinis, Alberto L. Sangiovanni-Vincentelli
2008 J jnl
Noise Analysis of Regenerative Comparators for Reconfigurable ADC Architectures.
IEEE Trans. Circuits Syst. I Regul. Pap.
Pierluigi Nuzzo, Fernando De Bernardinis, Pierangelo Terreni, Geert Van der Plas
2006 A* conf
A 10.6mW/0.8pJ power-scalable 1GS/s 4b ADC in 0.18mum CMOS with 5.8GHz ERBW.
DAC
Pierluigi Nuzzo, Geert Van der Plas, Fernando De Bernardinis, Liesbet Van der Perre, Bert Gyselinckx, Pierangelo Terreni
2006 A conf
A synthesis tool for power-efficient base-band filter design.
DATE
Vito Giannini, Pierluigi Nuzzo, Fernando De Bernardinis, Jan Craninckx, Boris Come, Stefano D'Amico, Andrea Baschirotto
2006 J jnl
L. Embedding Mixed-Signal Design in Systems-on-Chip.
Proc. IEEE
Jan M. Rabaey, Fernando De Bernardinis, Ali M. Niknejad, Borivoje Nikolic, Alberto L. Sangiovanni-Vincentelli
2006 A conf
Robust system level design with analog platforms.
ICCAD
Fernando De Bernardinis, Pierluigi Nuzzo, Alberto L. Sangiovanni-Vincentelli
2005 — conf
A low-power mixed-signal baseband system design for wireless sensor networks.
CICC
Yanmei Li, Fernando De Bernardinis, Brian P. Otis, Jan M. Rabaey, Alberto L. Sangiovanni-Vincentelli
2005 A conf
Efficient analog platform characterization through analog constraint graphs.
ICCAD
Fernando De Bernardinis, Alberto L. Sangiovanni-Vincentelli
2005 — conf
Enriching an analog platform for analog-to-digital converter design.
ISCAS (2)
Fernando De Bernardinis, Pierluigi Nuzzo, Pierangelo Terreni, Alberto L. Sangiovanni-Vincentelli
2005 A* conf
Mixed signal design space exploration through analog platforms.
DAC
Fernando De Bernardinis, Pierluigi Nuzzo, Alberto L. Sangiovanni-Vincentelli
2005 — ch.
Platform-Based Design for Embedded Systems.
Embedded Systems Handbook
Marco Sgroi, Alberto L. Sangiovanni-Vincentelli, Fernando De Bernardinis, Claudio Pinello, Luca P. Carloni
2005 — ch.
Platform-Based and Derivative Design.
The Industrial Information Technology Handbook
Luca P. Carloni, Fernando De Bernardinis, Alberto L. Sangiovanni-Vincentelli, Marco Sgroi
2004 A conf
A Methodology for System-Level Analog Design Space Exploration.
DATE
Fernando De Bernardinis, Alberto L. Sangiovanni-Vincentelli
2004 A* conf
Benefits and challenges for platform-based design.
DAC
Alberto L. Sangiovanni-Vincentelli, Luca P. Carloni, Fernando De Bernardinis, Marco Sgroi
2003 — conf
A QoS Internet Protocol Scheduler on the IXP1200 Network Platform.
IWSOC
Fernando De Bernardinis, Luca Fanucci, Tommaso Ramacciotti, Pierangelo Terreni
2003 A* conf
Support vector machines for analog circuit performance representation.
DAC
Fernando De Bernardinis, Michael I. Jordan, Alberto L. Sangiovanni-Vincentelli
2000 Misc conf
Designing wireless protocols: methodology and applications.
ICASSP
Marco Sgroi, Julio Leao da Silva Jr., Fernando De Bernardinis, Fred L. Burghardt, Alberto L. Sangiovanni-Vincentelli, Jan M. Rabaey
2000 — conf
Wireless protocols design: challenges and opportunities.
CODES
Julio Leao da Silva Jr., Marco Sgroi, Fernando De Bernardinis, Suet-Fei Li, Alberto L. Sangiovanni-Vincentelli, Jan M. Rabaey
1999 J jnl
An efficient VLSI architecture for real-time additive synthesis of musical signals.
IEEE Trans. Very Large Scale Integr. Syst.
Fernando De Bernardinis, Roberto Roncella, Roberto Saletti, Pierangelo Terreni, Graziano Bertini
1997 Misc conf
A single-chip 1, 200 sinusoid real-time generator for additive synthesis of musical signals.
ICASSP
Fernando De Bernardinis, Roberto Roncella, Roberto Saletti, Pierangelo Terreni, Graziano Bertini