| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2018 | — | conf |
ER Workshops
|
| 2018 | — | conf |
IScIDE
|
| 2018 | A* | conf |
ICDE
|
| 2018 | J | jnl |
Frontiers Comput. Sci.
|
| 2018 | J | jnl |
Inf. Syst.
|
| 2018 | J | jnl |
Inf. Sci.
|
| 2017 | — | conf |
CISP-BMEI
|
| 2017 | J | jnl |
CoRR
|
| 2017 | J | jnl |
Concurr. Comput. Pract. Exp.
|
| 2017 | — | conf |
CISP-BMEI
|
| 2017 | A | conf |
CIKM
|
| 2016 | C | conf |
ISPDC
|
| 2016 | A* | conf |
Cache-emulated register file: An integrated on-chip memory architecture for high performance GPGPUs.
MICRO
|
| 2016 | J | jnl |
IEEE Trans. Computers
|