Feng Han

11 papers C 1Journal 6Unranked 4
YearRankTypeTitle / Venue / Authors
2017 J jnl
An access pattern based adaptive mapping function for GPGPU scratchpad memory.
IEICE Electron. Express
Feng Han, Li Li, Kun Wang, Fan Feng, Hongbing Pan, Jin Sha, Jun Lin
2017 — conf
Application space exploration of a multi-fabric reconfigurable system.
ASICON
Fan Feng, Li Li, Kun Wang, Feng Han, Hongbing Pan, Wei Li
2017 J jnl
Optimized sorting network for successive cancellation list decoding of polar codes.
IEICE Electron. Express
Kun Wang, Li Li, Feng Han, Fan Feng, Jun Lin, Yuxiang Fu, Jin Sha
2016 C conf
Accurate runtime thermal prediction scheme for 3D NoC systems with noisy thermal sensors.
ISCAS
Yuxiang Fu, Li Li, Hongbing Pan, Kun Wang, Feng Han, Jun Lin
2016 J jnl
An ultra-long FFT architecture implemented in a reconfigurable application specified processor.
IEICE Electron. Express
Feng Han, Li Li, Kun Wang, Fan Feng, Hongbing Pan, Baoning Zhang, Guoqiang He, Jun Lin
2016 J jnl
Design and implementation of high performance matrix inversion based on reconfigurable processor.
IEICE Electron. Express
Kun Wang, Li Li, Feng Han, Fan Feng, Jun Lin
2016 J jnl
Floating-point operation based reconfigurable architecture for radar processing.
IEICE Electron. Express
Fan Feng, Li Li, Kun Wang, Feng Han, Baoning Zhang, Guoqiang He
2015 — conf
A high performance parallel VLSI design of matrix inversion.
ASICON
Kun Wang, Li Li, Feng Han, Hongbing Pan, Fan Feng, Xiao Yu
2015 — conf
An improved FFT architecture optimized for reconfigurable application specified processor.
ASICON
Feng Han, Li Li, Kun Wang, Fan Feng, Hongbing Pan, Dong Yu
2015 — conf
Lateral asynchronous and vertical synchronous 3D Network on Chip with double pumped vertical links.
ASICON
Yuxiang Fu, Li Li, Yuang Zhang, Hongbing Pan, Feng Han, Kun Wang
2014 J jnl
A survey of memory architecture for 3D chip multi-processors.
Microprocess. Microsystems
Yuang Zhang, Li Li, Zhonghai Lu, Axel Jantsch, Minglun Gao, Hongbing Pan, Feng Han