Fen Ge - RankMe

55 papers A* 1C 1Journal 22Unranked 31

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	E2CAP: An Energy-Efficient FPGA Accelerator for Deep Reinforcement Learning With Experience Compression and Configurable PE Array. IEEE Trans. Very Large Scale Integr. Syst. Fen Ge, Xinjun Zhou, Ke Chen, Weiqiang Liu
2024	J	`jnl`	A FPGA Accelerator of Distributed A3C Algorithm with Optimal Resource Deployment. IET Comput. Digit. Tech. Fen Ge, Guohui Zhang, Ziyu Li, Fang Zhou
2023	—	`conf`	A Deep Q Network Hardware Accelerator Based on Heterogeneous Computing. ASICON Guohui Zhang, Fen Ge, Fang Zhou
2023	—	`conf`	A Lightweight BiSeNet Embedded with YOLOv5 Feature Fusion Network. ICCT Jin Zhao, Fang Zhou, Fen Ge, Shuning Wu, Hao Wang
2023	—	`conf`	A Method of Mapping Convolutional Neural Networks on Resource-limited NoC Platform. ASICON Jiantao Ye, Fen Ge, Fang Zhou
2023	—	`conf`	A Multi-mode Convolution Coprocessor Based on RISC-V Instruction Set Architecture. ASICON Wenqiang Gong, Fang Zhou, Fen Ge
2023	—	`conf`	FPGA implementation and verification of efficient and reconfigurable CNN-LSTM accelerator design. AIBDF Hongmin He, Danfeng Qiu, Fen Ge
2022	—	`conf`	A Defense Method Against Persistent Fault Attack. ICCT Zhixiang Xu, Ning Wu, Fang Zhou, Fen Ge
2022	—	`conf`	A Hybrid CNN Compression Approach for Hardware Acceleration. ICCT Xin Yue, Fen Ge, Fang Zhou, Ning Wu, Yi Zhang
2022	—	`conf`	A Vehicle Line-Pressing Detection Approach Based on YOLOv5 and DeepSort. ICCT Shuning Wu, Fen Ge, Yi Zhang
2022	—	`conf`	An A3C Deep Reinforcement Learning FPGA Accelerator based on Heterogeneous Compute Units. ICCT Ziyu Li, Fen Ge, Fang Zhou, Ning Wu
2022	—	`conf`	Efficient Configurable Digit-Serial Multiplier Based on Improved Karatsuba Algorithm over GF(2m). ICCT Xinyu Wang, Ning Wu, Fang Zhou, Fen Ge
2022	—	`conf`	Implementation of Bidirectional LSTM Accelerator Based on FPGA. ICCT Hao Wang, Danfeng Qiu, Fen Ge, Ying Yang
2022	—	`conf`	Reconfigurable Multi-algorithm Neural Network Accelerator Based on Target Detection. ICCT Wang Han, Ning Wu, Fang Zhou, Fen Ge
2022	—	`conf`	The Design of a Novel Hardware Trojan without Inactive Signal for AES. ICCT Kaiyu Zhao, Fang Zhou, Ning Wu, Jin Zhao, Fen Ge
2021	—	`conf`	An Anti-DPA Elliptic Curve Cryptography Scalar Multiplier with Randomized Base Point. ICCT Jin Wen, Ning Wu, Fen Ge, Fang Zhou, Zhixiang Xu, Benjun Zhang
2021	J	`jnl`	Collaborative thermal- and traffic-aware adaptive routing scheme for 3D network-on-chip systems. IEICE Electron. Express Lili Shen, Ning Wu, Gaizhen Yan, Fen Ge
2021	—	`conf`	Design and Implementation of OpenCL-Based FPGA Accelerator for YOLOv2. ICCT Chenchen Cui, Fen Ge, Ziyu Li, Xin Yue, Fang Zhou, Ning Wu
2021	—	`conf`	Hardware Trojan Detection Method for Gate-Level Netlists Based on the Idea of Few-Shot Learning. ICCT Tong Lu, Fang Zhou, Ning Wu, Fen Ge, Benjun Zhang
2021	J	`jnl`	Highly efficient architecture of elliptic curve scalar multiplication with fault tolerance over GF(2 IEICE Electron. Express Fang Zhou, Caixian Fei, Ning Wu, Fen Ge
2021	—	`conf`	Implementation of Reconfigurable CNN-LSTM Accelerator Based on FPGA. ICCT Ying Yang, Fen Ge, Danfeng Qiu, Xin Yue, Ziyu Li, Fang Zhou, Ning Wu
2020	J	`jnl`	A Dynamic Branch Predictor Based on Parallel Structure of SRNN. IEEE Access Lei Zhang, Ning Wu, Fen Ge, Fang Zhou, Mahammad Rehan Yahya
2020	—	`conf`	A Mapping Method for Convolutional Neural Networks on Network-on-Chip. ICCT Yayue Zhao, Fen Ge, Chenchen Cui, Fang Zhou, Ning Wu
2020	—	`conf`	A Scalable Bit-Parallel Word-Serial Multiplier with Fault Detection on GF(2^m). ICCT Caixian Fei, Fang Zhou, Ning Wu, Fen Ge, Jin Wen, Peiyao Qin
2020	J	`jnl`	Algorithm-Hardware Co-Design of Real-Time Edge Detection for Deep-Space Autonomous Optical Navigation. IEICE Trans. Inf. Syst. Hao Xiao, Yanming Fan, Fen Ge, Zhang Zhang, Xin Cheng
2020	—	`conf`	Design and Implementation of LSTM Accelerator Based on FPGA. ICCT Weifeng Zhang, Fen Ge, Chenchen Cui, Ying Yang, Fang Zhou, Ning Wu
2020	—	`conf`	Differential Fault Attack for the Iterative Operation of AES-192 Key Expansion. ICCT Liang Han, Ning Wu, Fen Ge, Fang Zhou, Jin Wen, Peiyao Qing
2020	J	`jnl`	Minimizing the number of wavelengths in a cluster WDM mesh-based ONoC through application-specific mapping. IEICE Electron. Express Wentao Xu, Ning Wu, Fen Ge
2020	—	`conf`	Small Area Configurable Deep Neural Network Accelerator for IoT System. ICCT Liangkai Zhao, Ning Wu, Fen Ge, Fang Zhou, Jiahui Zhang, Tong Lu
2019	—	`conf`	A dual-threshold credit-based flow control mechanism for 3D Network-on-Chip. ICICDT Xiangli Li, Fen Ge, Ben Rui, Ning Wu, Fang Zhou
2019	J	`jnl`	Fault attack hardware Trojan detection method based on ring oscillator. IEICE Electron. Express Qiangjia Bi, Ning Wu, Fang Zhou, Jinbao Zhang, Muhammad Rehan Yahya, Fen Ge
2019	J	`jnl`	Machine learning-based dynamic reconfiguration algorithm for reconfigurable NoCs. IEICE Electron. Express Yafei Zhang, Ning Wu, Gaizhen Yan, Fen Ge
2019	J	`jnl`	RoR: A low insertion loss design of rearrangeable hybrid photonic-plasmonic 6 × 6 non-blocking router for ONoCs. IEICE Electron. Express Muhammad Rehan Yahya, Ning Wu, Gaizhen Yan, Fen Ge, Tanveer Ahmed
2019	C	`conf`	Srax: A Low Crosstalk and Insertion Loss 5×5 Optical Router for Optical Network-on-Chip. IECON Xinhao Shi, Ning Wu, Fen Ge, Gaizhen Yan, Yan Xing, Xudong Ma
2018	J	`jnl`	Countermeasure against fault sensitivity analysis based on clock check block. IEICE Electron. Express Jinbao Zhang, Ning Wu, Fen Ge, Fang Zhou, Xiaoqing Zhang
2017	J	`jnl`	ArR-DTM: A routing-based DTM for 3D NoCs by adaptive degree regulation. IEICE Electron. Express Gaizhen Yan, Ning Wu, Fen Ge, Hao Xiao, Fang Zhou
2017	J	`jnl`	Collaborative fuzzy-based partially-throttling dynamic thermal management scheme for three-dimensional networks-on-chip. IET Comput. Digit. Tech. Gaizhen Yan, Ning Wu, Fen Ge, Hao Xiao, Fang Zhou
2017	J	`jnl`	Thermal-aware task mapping for communication energy minimization on 3D NoC. IEICE Electron. Express Lili Shen, Ning Wu, Gaizhen Yan, Fen Ge
2016	J	`jnl`	A MapReduce architecture for embedded multiprocessor system-on-chips. IEICE Electron. Express Hao Xiao, Huajuan Zhang, Fen Ge, Ning Wu
2016	J	`jnl`	Efficient Synchronization for Distributed Embedded Multiprocessors. IEEE Trans. Very Large Scale Integr. Syst. Hao Xiao, Ning Wu, Fen Ge, Tsuyoshi Isshiki, Hiroaki Kunieda, Jun Xu, Yuangang Wang
2016	J	`jnl`	Hybrid Drowsy SRAM and STT-RAM Buffer Designs for Dark-Silicon-Aware NoC. IEEE Trans. Very Large Scale Integr. Syst. Jia Zhan, Jin Ouyang, Fen Ge, Jishen Zhao, Yuan Xie
2016	J	`jnl`	MSP based thermal-aware mapping approach for 3D Network-on-Chip under performance constraints. IEICE Electron. Express Gui Feng, Fen Ge, Ning Wu, Lei Zhou, Jing Liu
2016	J	`jnl`	Optimization of Area and Delay for Implementation of the Composite Field Advanced Encryption Standard S-Box. J. Circuits Syst. Comput. Xiaoqiang Zhang, Ning Wu, Fang Zhou, Fen Ge
2015	—	`conf`	A network components insertion method for 3D application-specific Network-on-Chip. ASICON Rongrong Zhou, Fen Ge, Gui Feng, Ning Wu
2015	A*	`conf`	DimNoC: a dim silicon approach towards power-efficient on-chip network. DAC Jia Zhan, Jin Ouyang, Fen Ge, Jishen Zhao, Yuan Xie
2015	J	`jnl`	Distributed Synchronization for Message-Passing Based Embedded Multiprocessors. IEICE Trans. Inf. Syst. Hao Xiao, Ning Wu, Fen Ge, Guanyu Zhu, Lei Zhou
2015	J	`jnl`	Dynamically reconfigurable simulation platform for 3D NoC based on multi-FPGA. IEICE Electron. Express Jintao Zheng, Ning Wu, Gaizhen Yan, Fen Ge, Lei Zhou
2015	—	`conf`	Exploring memory controller configurations for many-core systems with 3D stacked DRAMs. ISQED Fen Ge, Jia Zhan, Yuan Xie, Vijaykrishnan Narayanan
2015	J	`jnl`	The Adaptive Thermal and Traffic-Balanced Routing algorithm based on temperature analysis and traffic statistics. IEICE Electron. Express Zhiping Wu, Ning Wu, Lei Zhou, Fen Ge
2014	—	`conf`	Designing vertical bandwidth reconfigurable 3D NoCs for many core systems. 3DIC Qiaosha Zou, Jia Zhan, Fen Ge, Matt Poremba, Yuan Xie
2013	—	`conf`	A thermal-aware mapping algorithm for 3D Mesh Network-on-Chip architecture. ASICON Gui Feng, Fen Ge, Shuang Yu, Ning Wu
2013	—	`conf`	A two-phase floorplanning approach for Application-specific Network-on-Chip. ASICON Shuang Yu, Fen Ge, Gui Feng, Ning Wu
2012	—	`conf`	A Coverage-Driven Verification Platform for Evaluating NoC Performance and Test Structure. AINA Workshops Ying Zhang, Ning Wu, Xiazhi Ke, Fen Ge
2009	—	`conf`	Design of a GALS Wrapper for Network on Chip. CSIE (3) Ning Wu, Fen Ge, Fei Wu
2008	—	`conf`	A minimum-path mapping algorithm for 2D mesh Network on Chip architecture. APCCAS Fen Ge, Ning Wu