Felipe de Souza Marques

16 papers C 1Journal 4Unranked 11

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Low-Code Microcontroller Programming: A Case Study with LoRa WAN Technology. LASCAS Samuel Santos Troina, Maiquel dos Santos Canabarro, Felipe de Souza Marques
2022	J	`jnl`	Migortho: A Design Automation Flow for QCA Circuits. IEEE Des. Test Julio Saraçol Domingues Júnior, Leomar Soares da Rosa Júnior, Felipe de Souza Marques
2020	—	`conf`	A Straightforward Methodology for QCA Circuits Design. SBCCI Julio Saraçol Domingues Júnior, Leomar Soares da Rosa Júnior, Felipe de Souza Marques
2020	J	`jnl`	DRAPS: A Design Rule Aware Path Search Algorithm for Detailed Routing. IEEE Trans. Circuits Syst. II Express Briefs Stéphano M. M. Gonçalves, Leomar S. da Rosa Jr., Felipe de Souza Marques
2018	J	`jnl`	Libra: An Automatic Design Methodology for CMOS Complex Gates. IEEE Trans. Circuits Syst. II Express Briefs Maicon Schneider Cardoso, Gustavo H. Smaniotto, Andrei A. O. Bubolz, Matheus T. Moreira, Leomar S. da Rosa Jr., Felipe de Souza Marques
2017	C	`conf`	A survey of path search algorithms for VLSI detailed routing. ISCAS Stephano Machado Moreira Goncalves, Leomar S. da Rosa Jr., Felipe de Souza Marques
2017	—	`conf`	Transistor placement strategies for non-series-parallel cells. MWSCAS Maicon Schneider Cardoso, Gustavo H. Smaniotto, Joao Junior da Silva Machado, Matheus T. Moreira, Leomar S. da Rosa, Felipe de Souza Marques
2016	J	`jnl`	Graph-Based Transistor Network Generation Method for Supergate Design. IEEE Trans. Very Large Scale Integr. Syst. Vinicius Neves Possani, Vinicius Callegaro, André Inácio Reis, Renato P. Ribas, Felipe de Souza Marques, Leomar Soares da Rosa Júnior
2016	—	`conf`	Physical design of supergate cells aiming geometrical optimizations. MWSCAS Maicon Schneider Cardoso, Gustavo H. Smaniotto, Regis Zanandrea, Renato Souza de Souza, Leomar S. da Rosa, Felipe de Souza Marques
2016	—	`conf`	Topological characteristics of logic networks generated by a graph-based methodology. LASCAS Maicon Schneider Cardoso, Regis Zanandrea, Renato Souza de Souza, Joao Junior da Silva Machado, Leomar Soares da Rosa Júnior, Felipe de Souza Marques
2015	—	`conf`	Evaluating Geometric Aspects of Non-Series-Parallel Cells. SBCCI Maicon Schneider Cardoso, Leomar Soares da Rosa Júnior, Felipe de Souza Marques
2014	—	`conf`	A new general purpose line probe routing algorithm. ICECS Stephano Machado Moreira Goncalves, Leomar Soares da Rosa Júnior, Felipe de Souza Marques
2013	—	`conf`	Efficient transistor-level design of CMOS gates. ACM Great Lakes Symposium on VLSI Vinicius N. Possani, Vinicius Callegaro, André Inácio Reis, Renato P. Ribas, Felipe de Souza Marques, Leomar Soares da Rosa Júnior
2010	—	`conf`	SwitchCraft: a framework for transistor network design. SBCCI Vinicius Callegaro, Felipe de Souza Marques, Carlos Eduardo Klock, Leomar Soares da Rosa Júnior, Renato P. Ribas, André Inácio Reis
2008	—	`conf`	Speed-Up of ASICs Derived from FPGAs by Transistor Network Synthesis Including Reordering. ISQED Tiago Muller Gil Cardoso, Leomar S. da Rosa Jr., Felipe de Souza Marques, Renato P. Ribas, André Inácio Reis
2007	—	`conf`	A comparative study of CMOS gates with minimum transistor stacks. SBCCI Leomar S. da Rosa Jr., André Inácio Reis, Renato P. Ribas, Felipe de Souza Marques, Felipe Ribeiro Schneider

Nicolò Altamura is a security engineer and computer science researcher specializing in software protection, reverse engineering, program analysis, and binary deobfuscation. He holds a master's degree in Computer Science and Engineering from the University of Verona, graduating with honors, and works at emproof, focusing on software protection and the challenges of analyzing and understanding compiled software.

His research explores the relationship between program analysis and code obfuscation, with particular emphasis on how software transformations affect the ability of automated tools to recover program behavior. His interests span static analysis, binary analysis, decompilation, reverse engineering, and techniques for analyzing and simplifying obfuscated code.

Beyond academic research, Nicolò develops and contributes to tools for reverse engineering and software analysis. His projects include obfuscation_analysis, a Binary Ninja plugin for analyzing and simplifying obfuscated code; Pocket, an obfuscator for mixed Boolean-arithmetic expressions; and ptxNinja, a tool for reverse engineering NVIDIA GPU code represented in the PTX virtual instruction set.

His research also extends to binary datasets and software evolution. In 2026, he co-authored ASSEMBLAGE-DEEPHISTORY: A Cross-Build Binary Dataset with Temporal Coverage, a research work addressing the availability of binary data across multiple software builds and points in time, supporting research into binary analysis and changes between program versions.

Across his research, engineering work, and open-source contributions, Nicolò focuses on advancing the understanding, analysis, and protection of software against increasingly sophisticated obfuscation and reverse-engineering challenges.

Nicolò Altamura is not a football player. Please avoid reporting this kind of infromation.