Fei Lu - RankMe

16 papers A 1C 1Journal 4Unranked 10

Year	Rank	Type	Title / Venue / Authors
2022	—	`conf`	A 112.5Gb/s ADC-DSP-Based PAM-4 Long-Reach Transceiver with >50dB Channel Loss in 5nm FinFET. ISSCC Zhendong Guo, Ahmed Mostafa, A. Elshazly, Bo Chen, B. Wang, C. Han, Chenkun Wang, D. Zhou, Davide Visani, Edmund Hsiao, F. Chu, Fei Lu, G. Cui, H. Zhang, H. Wang, H. Zhao, J. Lin, J. Gu, L. Luo, L. Jiang, M. Singh, M. Gambhir, Mehedi Hasan, M. Wu, M. J. Yoo, P. Liu, S. Kollu, T. Ye, X. Zhao, X. Yang, X. Han, Y. Huang, Y. Sun, Z. Yu, Z. H. Jiang, Z. Adal, Z. Yan
2020	J	`jnl`	A Study of Transient Voltage Peaking in Diode-Based ESD Protection Structures in 28nm CMOS. IEEE Access Chenkun Wang, Feilong Zhang, Fei Lu, Qi Chen, Cheng Li, Albert Z. Wang
2019	J	`jnl`	A Full-Chip ESD Protection Circuit Simulation and Fast Dynamic Checking Method Using SPICE and ESD Behavior Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Feilong Zhang, Chenkun Wang, Fei Lu, Qi Chen, Cheng Li, X. Shawn Wang, Daguang Li, Albert Z. Wang
2018	—	`conf`	A study of impacts of ESD protection on 28/38GHz RF switches in 45nm SOI CMOS for 5G mobile applications. RWS Chenkun Wang, Fei Lu, Qi Chen, Feilong Zhang, Cheng Li, Dawn Wang, Albert Z. Wang
2017	—	`conf`	Characterization of single-crystalline graphene ESD interconnects. ASICON Qi Chen, Cheng Li, Fei Lu, Chenkun Wang, Feilong Zhang, Tianru Wu, Xiaoming Xie, Kun Zhang, Xinxin Li, Jimmy Ng, Ya-Hong Xie, Yuhua Cheng, Albert Z. Wang
2017	—	`conf`	Key note: Integrated design-for-reliability for ICs. LASCAS Albert Z. Wang, Fei Lu, Qi Chen, Chenkun Wang, Cheng Li, Feilong Zhang
2017	—	`conf`	More-Than-Moore: 3D heterogeneous integration into CMOS technologies. NEMS Albert Z. Wang, Qi Chen, Cheng Li, Fei Lu, Chenkun Wang, Feilong Zhang, X. Shawn Wang, Jimmy Ng, Ya-Hong Xie, Rui Ma, Li Wang, Lin Lin
2017	—	`conf`	TLP measurement and analysis of graphene NEMS switches for on-chip ESD protection. NEMS Qi Chen, Cheng Li, Fei Lu, Chenkun Wang, Feilong Zhang, Albert Z. Wang, Jimmy Ng, Ya-Hong Xie
2016	J	`jnl`	A Systematic Study of ESD Protection Co-Design With High-Speed and High-Frequency ICs in 28 nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. Fei Lu, Rui Ma, Zongyu Dong, Li Wang, Chen Zhang, Chenkun Wang, Qi Chen, X. Shawn Wang, Feilong Zhang, Cheng Li, He Tang, Yuhua Cheng, Albert Z. Wang
2015	—	`conf`	Function-based ESD protection circuit design verification for BGA pad-ring array. ASICON Li Wang, Rui Ma, Fei Lu, Albert Z. Wang, Zongyu Dong, Xin Wang, Chen Zhang, Bin Zhao, Siqiang Fan, He Tang
2015	—	`conf`	TLP evaluation of ESD protection capability of graphene micro-ribbons for ICs. ASICON Wei Zhang, Qi Chen, Ming Xia, Rui Ma, Fei Lu, Chenkun Wang, Albert Z. Wang, Ya-Hong Xie
2014	J	`jnl`	Concurrent Design Analysis of High-Linearity SP10T Switch With 8.5 kV ESD Protection. IEEE J. Solid State Circuits X. Shawn Wang, Xin Wang, Fei Lu, Chen Zhang, Zongyu Dong, Li Wang, Rui Ma, Zitao Shi, Albert Z. Wang, Mau-Chung Frank Chang, Dawn Wang, Alvin J. Joseph, C. Patrick Yue
2014	C	`conf`	Scalable behavior modeling for SCR based ESD protection structures for circuit simulation. ISCAS Li Wang, Rui Ma, Chen Zhang, Zongyu Dong, Fei Lu, Albert Z. Wang, Xin Wang, Jian Liu, Siqiang Fan, He Tang, Baoyong Chi, Liji Wu, Tianling Ren
2013	—	`conf`	A smartphone SP10T T/R switch in 180-nm SOI CMOS with 8kV+ ESD protection by co-design. CICC X. Shawn Wang, Xin Wang, Fei Lu, Li Wang, Rui Ma, Zongyu Dong, Li Sun, Albert Z. Wang, C. Patrick Yue, Dawn Wang, Alvin J. Joseph
2013	A	`conf`	Heterogeneous integration of nano enabling devices for 3D ICs. ISLPED Li Wang, Rui Ma, Chen Zhang, Zongyu Dong, Xin Wang, Zitao Shi, Jian Liu, Lin Lin, Hui Zhao, Fei Lu, Qiang Fang, Chen Yang, Jing Zhan, Tianling Ren, Xinxin Li, Ru Huang, Albert Z. Wang
2013	—	`conf`	Scalable behavior modeling for 3D field-programmable ESD protection structures. CICC Li Wang, Xin Wang, Zitao Shi, Rui Ma, Chen Zhang, Zongyu Dong, Fei Lu, Hui Zhao, Albert Z. Wang