Fei Li - RankMe

20 papers A* 2A 8Journal 5Unranked 5

Year	Rank	Type	Title / Venue / Authors
2011	A	`conf`	A 65nm flash-based FPGA fabric optimized for low cost and power. FPGA Jonathan W. Greene, Sinan Kaptanoglu, Wenyi Feng, Volker Hecht, Joel Landry, Fei Li, Anton Krouglyanskiy, Mihai Morosan, Val Pevzner
2010	J	`jnl`	Technology Mapping and Clustering for FPGA Architectures With Dual Supply Voltages. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Deming Chen, Jason Cong, Chen Dong, Lei He, Fei Li, Chi-Chen Peng
2007	J	`jnl`	Device and Architecture Cooptimization for FPGA Power Reduction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Lerong Cheng, Fei Li, Yan Lin, Phoebe Wong, Lei He
2007	J	`jnl`	Field Programmability of Supply Voltages for FPGA Power Reduction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Fei Li, Yan Lin, Lei He
2005	J	`jnl`	Circuits and architectures for field programmable gate array with configurable supply voltage. IEEE Trans. Very Large Scale Integr. Syst. Yan Lin, Fei Li, Lei He
2005	A*	`conf`	Device and architecture co-optimization for FPGA power reduction. DAC Lerong Cheng, Phoebe Wong, Fei Li, Yan Lin, Lei He
2005	A	`conf`	Power modeling and architecture evaluation for FPGA with novel circuits for Vdd programmability. FPGA Yan Lin, Fei Li, Lei He
2005	J	`jnl`	Power modeling and characteristics of field programmable gate arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Fei Li, Yizhou Lin, Lei He, Deming Chen, Jason Cong
2005	—	`conf`	Routing track duplication with fine-grained power-gating for FPGA interconnect power reduction. ASP-DAC Yan Lin, Fei Li, Lei He
2005	A	`conf`	Scheduling of Soft Real-Time Systems for Context-Aware Applications. DATE Jennifer L. Wong, Weiping Liao, Fei Li, Lei He, Miodrag Potkonjak
2004	A*	`conf`	FPGA power reduction using configurable dual-Vdd. DAC Fei Li, Yan Lin, Lei He
2004	—	`conf`	High-level area and power-up current estimation considering rich cell library. ASP-DAC Fei Li, Lei He, Joseph M. Basile, Rakesh J. Patel, Hema Ramamurthy
2004	A	`conf`	Low-power FPGA using pre-defined dual-Vdd/dual-Vt fabrics. FPGA Fei Li, Yan Lin, Lei He, Jason Cong
2004	A	`conf`	Low-power technology mapping for FPGA architectures with dual supply voltages. FPGA Deming Chen, Jason Cong, Fei Li, Lei He
2004	A	`conf`	Vdd programmability to reduce FPGA interconnect power. ICCAD Fei Li, Yan Lin, Lei He
2003	A	`conf`	Architecture evaluation for power-efficient FPGAs. FPGA Fei Li, Deming Chen, Lei He, Jason Cong
2003	—	`conf`	High Level Area and Current Estimation. PATMOS Fei Li, Lei He, Joseph M. Basile, Rakesh J. Patel, Hema Ramamurthy
2003	A	`conf`	Microarchitecture level power and thermal simulation considering temperature dependent leakage model. ISLPED Weiping Liao, Fei Li, Lei He
2002	—	`conf`	Estimation of Maximum Power-Up Current. ASP-DAC/VLSI Design Fei Li, Lei He, Kewal K. Saluja
2001	—	`conf`	Maximum current estimation considering power gating. ISPD Fei Li, Lei He