Fatemeh Eslami

11 papers B 3Misc 1Journal 4Unranked 3

Year	Rank	Type	Title / Venue / Authors
2018	B	`conf`	Extending post-silicon coverage measurement using time-multiplexed FPGA overlays. ETS Fatemeh Eslami, Eddie Hung, Steven J. E. Wilton
2018	J	`jnl`	Rapid Triggering Capability Using an Adaptive Overlay during FPGA Debug. ACM Trans. Design Autom. Electr. Syst. Fatemeh Eslami, Steven J. E. Wilton
2016	J	`jnl`	An Improved Overlay and Mapping Algorithm Supporting Rapid Triggering for FPGA Debug. SIGARCH Comput. Archit. News Fatemeh Eslami, Steven J. E. Wilton
2016	J	`jnl`	Enabling Effective FPGA Debug using Overlays: Opportunities and Challenges. CoRR Fatemeh Eslami, Eddie Hung, Steven J. E. Wilton
2015	—	`conf`	An adaptive virtual overlay for fast trigger insertion for FPGA debug. FPT Fatemeh Eslami, Steven J. E. Wilton
2014	B	`conf`	Incremental distributed trigger insertion for efficient FPGA debug. FPL Fatemeh Eslami, Steven J. E. Wilton
2013	—	`conf`	Application Specific Low Leakage data Cache for embedded processors. IGCC Mostafa Farahani, Fatemeh Eslami, Amirali Baniasadi
2013	Misc	`conf`	Escaping the Academic Sandbox: Realizing VPR Circuits on Xilinx Devices. FCCM Eddie Hung, Fatemeh Eslami, Steven J. E. Wilton
2011	B	`conf`	Capacitive Boosting for FPGA Interconnection Networks. FPL Fatemeh Eslami, Mihai Sima
2009	J	`jnl`	A New Cell Design Methodology for Balanced XOR-XNOR Circuits for Hybrid-CMOS Logic. J. Low Power Electron. Tooraj Nikoubin, Fatemeh Eslami, Amirali Baniasadi, Keivan Navi
2009	—	`conf`	Application Specific Transistor Sizing for Low Power Full Adders. ASAP Fatemeh Eslami, Amirali Baniasadi, Mostafa Farahani