Farrukh Hijaz

15 papers A 1B 2C 4Journal 4Unranked 4
YearRankTypeTitle / Venue / Authors
2022 B conf
ARBench: Augmented Reality Benchmark For Mobile Devices.
ISPASS
Sofiane Chetoui, Rahul Shahi, Seif Abdelaziz, Abhinav Golas, Farrukh Hijaz, Sherief Reda
2022 B conf
Alternating Blind Identification of Power Sources for Mobile SoCs.
ICPE
Sofiane Chetoui, Michael Chen, Abhinav Golas, Farrukh Hijaz, Adel Belouchrani, Sherief Reda
2017 A conf
Accelerating Graph and Machine Learning Workloads Using a Shared Memory Multicore Architecture with Auxiliary Support for In-hardware Explicit Messaging.
IPDPS
Halit Dogan, Farrukh Hijaz, Masab Ahmad, Brian Kahne, Peter Wilson, Omer Khan
2016 J jnl
LDAC: Locality-Aware Data Access Control for Large-Scale Multicore Cache Hierarchies.
ACM Trans. Archit. Code Optim.
Qingchuan Shi, George Kurian, Farrukh Hijaz, Srinivas Devadas, Omer Khan
2016 J jnl
Locality-aware data replication in the last-level cache for large scale multicores.
J. Supercomput.
Farrukh Hijaz, Qingchuan Shi, George Kurian, Srinivas Devadas, Omer Khan
2015 — conf
CRONO: A Benchmark Suite for Multithreaded Graph Algorithms Executing on Futuristic Multicores.
IISWC
Masab Ahmad, Farrukh Hijaz, Qingchuan Shi, Omer Khan
2015 — conf
Efficient parallel packet processing using a shared memory many-core processor with hardware support to accelerate communication.
NAS
Farrukh Hijaz, Brian Kahne, Peter Wilson, Omer Khan
2015 — conf
Exploring the performance implications of memory safety primitives in many-core processors executing multi-threaded workloads.
HASP@ISCA
Masab Ahmad, Syed Kamran Haider, Farrukh Hijaz, Marten van Dijk, Omer Khan
2015 J jnl
M-MAP: Multi-Factor Memory Authentication for Secure Embedded Processors.
IACR Cryptol. ePrint Arch.
Syed Kamran Haider, Masab Ahmad, Farrukh Hijaz, Astha Patni, Ethan Johnson, Matthew Seita, Omer Khan, Marten van Dijk
2015 C conf
M-MAP: Multi-factor memory authentication for secure embedded processors.
ICCD
Syed Kamran Haider, Masab Ahmad, Farrukh Hijaz, Astha Patni, Ethan Johnson, Matthew Seita, Omer Khan, Marten van Dijk
2014 J jnl
NUCA-L1: A Non-Uniform Access Latency Level-1 Cache Architecture for Multicores Operating at Near-Threshold Voltages.
ACM Trans. Archit. Code Optim.
Farrukh Hijaz, Omer Khan
2013 C conf
A private level-1 cache architecture to exploit the latency and capacity tradeoffs in multicores operating at near-threshold voltages.
ICCD
Farrukh Hijaz, Qingchuan Shi, Omer Khan
2013 C conf
Towards efficient dynamic data placement in NoC-based multicores.
ICCD
Qingchuan Shi, Farrukh Hijaz, Omer Khan
2012 — conf
Low-Latency Mechanisms for Near-Threshold Operation of Private Caches in Shared Memory Multicores.
MICRO Workshops
Farrukh Hijaz, Qingchuan Shi, Omer Khan
2011 C conf
ARCc: A case for an architecturally redundant cache-coherence architecture for large multicores.
ICCD
Omer Khan, Henry Hoffmann, Mieszko Lis, Farrukh Hijaz, Anant Agarwal, Srinivas Devadas