Fanny Spagnolo

43 papers A 1B 2C 1Journal 26Unranked 13

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A Hardware-Aware Methodology for Distributed In-Network Intelligence on FPGA-Based SmartNICs. IEEE Netw. Lett. Fanny Spagnolo, Mattia Giovanni Spina, Stefania Perri, Antonio Iera, Pasquale Corsonello
2025	J	`jnl`	A Novel Compressive Sensing Method for Secure and Energy Efficient ECG Signal Transmission Applications. IEEE J. Biomed. Health Informatics Fanny Spagnolo, Bharat Lal, Pasquale Corsonello, Raffaele Gravina
2025	—	`conf`	Approximate Swish Activation Function for Low-Energy Yet Low-Error VLSI Implementations. ISVLSI Fanny Spagnolo, Stefania Perri, Pasquale Corsonello
2025	J	`jnl`	C4TERO: Configurable Cascaded Carry Chains for High Reliability TERO PUFs on FPGAs. IEEE Trans. Circuits Syst. I Regul. Pap. Fanny Spagnolo, Massimo Vatalaro, Stefania Perri, Felice Crupi, Pasquale Corsonello
2025	J	`jnl`	Design of Energy Efficient RFET-Based Polymorphic Logic Gates. IEEE Trans. Circuits Syst. II Express Briefs Fanny Spagnolo, Pasquale Corsonello, Stefania Perri
2025	J	`jnl`	HIMAM: Hardware Implementation of Multiply-and-Max/Min Layers for Energy-Efficient DNN Inference. IEEE Trans. Circuits Syst. II Express Briefs Fanny Spagnolo, Pasquale Corsonello, Stefania Perri
2025	A	`conf`	Multi-Partner Project: Architectures and Design Methodologies to Accelerate AI Workloads. The ICSC Flagship 2 Project. DATE Cristina Silvano, Fabrizio Ferrandi, Serena Curzel, Daniele Ielmini, Stefania Perri, Fanny Spagnolo, Pasquale Corsonello, Sebastiano Fabio Schifano, Cristian Zambelli, Angelo Garofalo, Francesco Conti, Luca Benini
2024	J	`jnl`	A High-Speed and Low-Power DSP-Based TRNG for FPGA Implementations. IEEE Trans. Circuits Syst. II Express Briefs Fabio Frustaci, Fanny Spagnolo, Pasquale Corsonello, Stefania Perri
2024	J	`jnl`	An explainable embedded neural system for on-board ship detection from optical satellite imagery. Eng. Appl. Artif. Intell. Cosimo Ieracitano, Nadia Mammone, Fanny Spagnolo, Fabio Frustaci, Stefania Perri, Pasquale Corsonello, Francesco Carlo Morabito
2024	J	`jnl`	Approximate bilateral filters for real-time and low-energy imaging applications on FPGAs. J. Supercomput. Fanny Spagnolo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri
2024	—	`conf`	Carry-chain based Ring Oscillator Design for Temperature Sensing on FPGAs. SMACD Fanny Spagnolo, Pasquale Corsonello
2024	J	`jnl`	Efficient implementation of signed multipliers on FPGAs. Comput. Electr. Eng. Fanny Spagnolo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri
2024	J	`jnl`	Exploring the Usage of Fast Carry Chains to Implement Multistage Ring Oscillators on FPGAs: Design and Characterization. IEEE Trans. Very Large Scale Integr. Syst. Fanny Spagnolo, Stefania Perri, Massimo Vatalaro, Fabio Frustaci, Felice Crupi, Pasquale Corsonello
2024	B	`conf`	KIT: Kernel Isotropic Transformation of Bilateral Filters for Image Denoising on FPGA. FPL Fanny Spagnolo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri
2023	J	`jnl`	A High-Speed FPGA-Based True Random Number Generator Using Metastability With Clock Managers. IEEE Trans. Circuits Syst. II Express Briefs Fabio Frustaci, Fanny Spagnolo, Stefania Perri, Pasquale Corsonello
2023	J	`jnl`	Design of Approximate Bilateral Filters for Image Denoising on FPGAs. IEEE Access Fanny Spagnolo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri
2023	J	`jnl`	Design of Leading Zero Counters on FPGAs. IEEE Embed. Syst. Lett. Stefania Perri, Fanny Spagnolo, Fabio Frustaci, Pasquale Corsonello
2023	J	`jnl`	HW/SW Codesign for Approximation-Aware Binary Neural Networks. IEEE J. Emerg. Sel. Topics Circuits Syst. Abhilasha Dave, Fabio Frustaci, Fanny Spagnolo, Mikail Yayla, Jian-Jia Chen, Hussam Amrouch
2023	J	`jnl`	Unlocking Efficiency in BNNs: Global by Local Thresholding for Analog-Based HW Accelerators. IEEE J. Emerg. Sel. Topics Circuits Syst. Mikail Yayla, Fabio Frustaci, Fanny Spagnolo, Jian-Jia Chen, Hussam Amrouch
2022	J	`jnl`	Aggressive Approximation of the SoftMax Function for Power-Efficient Hardware Implementations. IEEE Trans. Circuits Syst. II Express Briefs Fanny Spagnolo, Stefania Perri, Pasquale Corsonello
2022	—	`conf`	An FPGA-Based Hardware Accelerator for the k-Nearest Neighbor Algorithm Implementation in Wearable Embedded Systems. AII Antonio Borelli, Fanny Spagnolo, Raffaele Gravina, Fabio Frustaci
2022	J	`jnl`	Approximate Down-Sampling Strategy for Power-Constrained Intelligent Systems. IEEE Access Fanny Spagnolo, Stefania Perri, Pasquale Corsonello
2022	—	`conf`	Designing Low-Power and High-Speed FPGA-Based Binary Decision Tree Hardware Accelerators. AII Roman Huzyuk, Fanny Spagnolo, Fabio Frustaci
2022	B	`conf`	ERMES: Efficient Racetrack Memory Emulation System based on FPGA. FPL Fanny Spagnolo, Salim Ullah, Pasquale Corsonello, Akash Kumar
2022	—	`conf`	Hardware-Oriented Multi-Exposure Fusion Approach for Real-Time Video Processing on FPGA. PRIME Mario Andrea Sangiovanni, Fanny Spagnolo, Pasquale Corsonello
2022	—	`conf`	Heterogeneous FPGA-based System for Real-Time Drowsiness Detection. PRIME Andrea Migali, Fanny Spagnolo, Pasquale Corsonello
2022	J	`jnl`	Multibit Full Comparator Logic in Quantum-Dot Cellular Automata. IEEE Trans. Circuits Syst. II Express Briefs Stefania Perri, Fanny Spagnolo, Fabio Frustaci, Pasquale Corsonello
2022	J	`jnl`	Robust and High-Performance Machine Vision System for Automatic Quality Inspection in Assembly Processes. Sensors Fabio Frustaci, Fanny Spagnolo, Stefania Perri, Giuseppe Cocorullo, Pasquale Corsonello
2022	—	`conf`	Runtime Reconfigurable Hardware Accelerator for Energy-Efficient Transposed Convolutions. PRIME Emanuel Marrazzo, Fanny Spagnolo, Stefania Perri
2021	J	`jnl`	Accuracy Improved Low-Energy Multi-Bit Approximate Adders in QCA. IEEE Trans. Circuits Syst. II Express Briefs Stefania Perri, Fanny Spagnolo, Fabio Frustaci, Pasquale Corsonello
2021	J	`jnl`	Design of Flexible Hardware Accelerators for Image Convolutions and Transposed Convolutions. J. Imaging Cristian Sestito, Fanny Spagnolo, Stefania Perri
2020	—	`conf`	A High-Performance and Power-Efficient SIMD Convolution Engine for FPGAs. ICECS Fanny Spagnolo, Fabio Frustaci, Stefania Perri, Pasquale Corsonello
2020	—	`conf`	An Efficient Convolution Engine based on the À-trous Spatial Pyramid Pooling. ASAP Cristian Sestito, Fanny Spagnolo, Pasquale Corsonello, Stefania Perri
2020	J	`jnl`	Design of a real-time face detection architecture for heterogeneous systems-on-chips. Integr. Fanny Spagnolo, Stefania Perri, Pasquale Corsonello
2020	J	`jnl`	Efficient Deconvolution Architecture for Heterogeneous Systems-on-Chip. J. Imaging Stefania Perri, Cristian Sestito, Fanny Spagnolo, Pasquale Corsonello
2020	J	`jnl`	Parallel architecture of power-of-two multipliers for FPGAs. IET Circuits Devices Syst. Stefania Perri, Fanny Spagnolo, Fabio Frustaci, Pasquale Corsonello
2020	—	`conf`	Reconfigurable Convolution Architecture for Heterogeneous Systems-on-Chip. MECO Fanny Spagnolo, Stefania Perri, Fabio Frustaci, Pasquale Corsonello
2020	J	`jnl`	Stereo vision architecture for heterogeneous systems-on-chip. J. Real Time Image Process. Stefania Perri, Fabio Frustaci, Fanny Spagnolo, Pasquale Corsonello
2019	J	`jnl`	An Efficient Hardware-Oriented Single-Pass Approach for Connected Component Analysis. Sensors Fanny Spagnolo, Stefania Perri, Pasquale Corsonello
2019	—	`conf`	Efficient Architecture for Integral Image Computation on Heterogeneous FPGAs. PRIME Fanny Spagnolo, Pasquale Corsonello, Stefania Perri
2018	—	`conf`	Connected Component Analysis for Traffic Sign Recognition Embedded Processing Systems. ICECS Fanny Spagnolo, Stefania Perri, Fabio Frustaci, Pasquale Corsonello
2018	C	`conf`	Design of Real-Time FPGA-based Embedded System for Stereo Vision. ISCAS Stefania Perri, Fabio Frustaci, Fanny Spagnolo, Pasquale Corsonello
2018	—	`conf`	Designing Fast Convolutional Engines for Deep Learning Applications. ICECS Fanny Spagnolo, Stefania Perri, Fabio Frustaci, Pasquale Corsonello