Fang Zhou - RankMe

37 papers C 1Journal 16Unranked 20

Year	Rank	Type	Title / Venue / Authors
2023	—	`conf`	A Deep Q Network Hardware Accelerator Based on Heterogeneous Computing. ASICON Guohui Zhang, Fen Ge, Fang Zhou
2023	—	`conf`	A Lightweight BiSeNet Embedded with YOLOv5 Feature Fusion Network. ICCT Jin Zhao, Fang Zhou, Fen Ge, Shuning Wu, Hao Wang
2023	—	`conf`	A Method of Mapping Convolutional Neural Networks on Resource-limited NoC Platform. ASICON Jiantao Ye, Fen Ge, Fang Zhou
2023	—	`conf`	A Multi-mode Convolution Coprocessor Based on RISC-V Instruction Set Architecture. ASICON Wenqiang Gong, Fang Zhou, Fen Ge
2022	—	`conf`	A Defense Method Against Persistent Fault Attack. ICCT Zhixiang Xu, Ning Wu, Fang Zhou, Fen Ge
2022	—	`conf`	A Hybrid CNN Compression Approach for Hardware Acceleration. ICCT Xin Yue, Fen Ge, Fang Zhou, Ning Wu, Yi Zhang
2022	—	`conf`	An A3C Deep Reinforcement Learning FPGA Accelerator based on Heterogeneous Compute Units. ICCT Ziyu Li, Fen Ge, Fang Zhou, Ning Wu
2022	—	`conf`	Efficient Configurable Digit-Serial Multiplier Based on Improved Karatsuba Algorithm over GF(2m). ICCT Xinyu Wang, Ning Wu, Fang Zhou, Fen Ge
2022	—	`conf`	Reconfigurable Multi-algorithm Neural Network Accelerator Based on Target Detection. ICCT Wang Han, Ning Wu, Fang Zhou, Fen Ge
2022	—	`conf`	The Design of a Novel Hardware Trojan without Inactive Signal for AES. ICCT Kaiyu Zhao, Fang Zhou, Ning Wu, Jin Zhao, Fen Ge
2021	—	`conf`	An Anti-DPA Elliptic Curve Cryptography Scalar Multiplier with Randomized Base Point. ICCT Jin Wen, Ning Wu, Fen Ge, Fang Zhou, Zhixiang Xu, Benjun Zhang
2021	—	`conf`	Design and Implementation of OpenCL-Based FPGA Accelerator for YOLOv2. ICCT Chenchen Cui, Fen Ge, Ziyu Li, Xin Yue, Fang Zhou, Ning Wu
2021	—	`conf`	Hardware Trojan Detection Method for Gate-Level Netlists Based on the Idea of Few-Shot Learning. ICCT Tong Lu, Fang Zhou, Ning Wu, Fen Ge, Benjun Zhang
2021	J	`jnl`	Highly efficient architecture of elliptic curve scalar multiplication with fault tolerance over GF(2 IEICE Electron. Express Fang Zhou, Caixian Fei, Ning Wu, Fen Ge
2021	—	`conf`	Implementation of Reconfigurable CNN-LSTM Accelerator Based on FPGA. ICCT Ying Yang, Fen Ge, Danfeng Qiu, Xin Yue, Ziyu Li, Fang Zhou, Ning Wu
2020	J	`jnl`	A Dynamic Branch Predictor Based on Parallel Structure of SRNN. IEEE Access Lei Zhang, Ning Wu, Fen Ge, Fang Zhou, Mahammad Rehan Yahya
2020	—	`conf`	A Mapping Method for Convolutional Neural Networks on Network-on-Chip. ICCT Yayue Zhao, Fen Ge, Chenchen Cui, Fang Zhou, Ning Wu
2020	—	`conf`	A Scalable Bit-Parallel Word-Serial Multiplier with Fault Detection on GF(2^m). ICCT Caixian Fei, Fang Zhou, Ning Wu, Fen Ge, Jin Wen, Peiyao Qin
2020	—	`conf`	Design and Implementation of LSTM Accelerator Based on FPGA. ICCT Weifeng Zhang, Fen Ge, Chenchen Cui, Ying Yang, Fang Zhou, Ning Wu
2020	—	`conf`	Differential Fault Attack for the Iterative Operation of AES-192 Key Expansion. ICCT Liang Han, Ning Wu, Fen Ge, Fang Zhou, Jin Wen, Peiyao Qing
2020	—	`conf`	Small Area Configurable Deep Neural Network Accelerator for IoT System. ICCT Liangkai Zhao, Ning Wu, Fen Ge, Fang Zhou, Jiahui Zhang, Tong Lu
2019	C	`conf`	A Compact Hardware Implementation for the SCA-resistant PRESENT Cipher. IECON Xiao Yu, Ning Wu, Fang Zhou, Jinbao Zhang, Xinggan Zhang
2019	—	`conf`	A dual-threshold credit-based flow control mechanism for 3D Network-on-Chip. ICICDT Xiangli Li, Fen Ge, Ben Rui, Ning Wu, Fang Zhou
2019	J	`jnl`	A new method for resisting collision attack based on parallel random delay S-box. IEICE Electron. Express Fang Zhou, Ning Wu, Xiaoqiang Zhang, Jinbao Zhang
2019	J	`jnl`	A novel differential fault analysis using two-byte fault model on AES Key schedule. IET Circuits Devices Syst. Jinbao Zhang, Ning Wu, Jianhua Li, Fang Zhou
2019	J	`jnl`	Fault attack hardware Trojan detection method based on ring oscillator. IEICE Electron. Express Qiangjia Bi, Ning Wu, Fang Zhou, Jinbao Zhang, Muhammad Rehan Yahya, Fen Ge
2018	J	`jnl`	An Optimized Design for Compact Masked AES S-Box Based on Composite Field and Common Subexpression Elimination Algorithm. J. Circuits Syst. Comput. Yunfei Ye, Ning Wu, Xiaoqiang Zhang, Liling Dong, Fang Zhou
2018	J	`jnl`	Countermeasure against fault sensitivity analysis based on clock check block. IEICE Electron. Express Jinbao Zhang, Ning Wu, Fen Ge, Fang Zhou, Xiaoqing Zhang
2018	J	`jnl`	High performance AES-GCM implementation based on efficient AES and FR-KOA multiplier. IEICE Electron. Express Yong Zhang, Ning Wu, Fang Zhou, Xiaoqiang Zhang, Jinbao Zhang
2017	J	`jnl`	A new compact hardware architecture of S-Box for block ciphers AES and SM4. IEICE Electron. Express Yaoping Liu, Ning Wu, Xiaoqiang Zhang, Fang Zhou
2017	J	`jnl`	ArR-DTM: A routing-based DTM for 3D NoCs by adaptive degree regulation. IEICE Electron. Express Gaizhen Yan, Ning Wu, Fen Ge, Hao Xiao, Fang Zhou
2017	J	`jnl`	Collaborative fuzzy-based partially-throttling dynamic thermal management scheme for three-dimensional networks-on-chip. IET Comput. Digit. Tech. Gaizhen Yan, Ning Wu, Fen Ge, Hao Xiao, Fang Zhou
2016	J	`jnl`	Against fault attacks based on random infection mechanism. IEICE Electron. Express Jinbao Zhang, Ning Wu, Xiaoqiang Zhang, Fang Zhou
2016	J	`jnl`	Low-delay parallel Chien search architecture for RS decoder. IEICE Electron. Express Xiaoqiang Zhang, Ning Wu, Fang Zhou, Jianhua Li, Yasir Khizar
2016	J	`jnl`	Optimization of Area and Delay for Implementation of the Composite Field Advanced Encryption Standard S-Box. J. Circuits Syst. Comput. Xiaoqiang Zhang, Ning Wu, Fang Zhou, Fen Ge
2015	J	`jnl`	BTorus: A novel thermal-traffic balanced NoC topology. IEICE Electron. Express Taotao Zhang, Ning Wu, Lei Zhou, Fang Zhou
2014	J	`jnl`	An optimized delay-aware common subexpression elimination algorithm for hardware implementation of binary-field linear transform. IEICE Electron. Express Xiaoqiang Zhang, Ning Wu, Fang Zhou, Xin Chen