Fan Yang

202 papers A* 33A 32B 3C 17Journal 96Unranked 21
YearRankTypeTitle / Venue / Authors
2026 J jnl
A Fault-Aware Architecture for Reliable Sparse Matrix Multiplication.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yifan Song, Yuxuan Qiao, Changxu Liu, Yifei Feng, Junjie Zuo, Baoyu Fan, Fan Yang
2026 J jnl
An Accelerated Newton-Based Matrix Splitting Iteration Method for Mixed-Cell-Height Circuit Legalization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chencan Zhou, Yang Cao, Fan Yang, Xiaoqing Wen, Quan Shi, Rong Rong, Aili Yang
2026 J jnl
Atelier: An Automated Analog Circuit Design Framework via Multiple Large Language Model-Based Agents.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jinyi Shen, Zihao Chen, Ji Zhuang, Jiangli Huang, Fan Yang, Li Shang, Zhaori Bi, Changhao Yan, Dian Zhou, Xuan Zeng
2026 J jnl
ChatArch: A Knowledge-driven Graph-of-thought LLM Framework for Processor Architecture Optimization.
ACM Trans. Design Autom. Electr. Syst.
Zheng Wu, Zhuochu Yang, Zhuoyuan Yang, Zihao Chen, Li Shang, Fan Yang
2026 J jnl
DAMIL-DCIM+: Automated Dataflow-Aware Layout Synthesis for Digital CIM With Self-Assembled Bitcell Units and MILP-Based Optimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chuyu Wang, Xinglong Yan, Zecheng Xu, Ke Hu, Keren Zhu, Shuo Li, Fan Yang, Xuan Zeng
2026 J jnl
High-Dimensional Yield Optimization for Analog Circuits via Monte Carlo Tree Search and Self-Regressive Auto-Encoder Promoted Subspace Decomposed Gaussian Process.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Zhaoting Chen, Jianping Guo, Zhaori Bi, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng
2026 J jnl
Multi-Head Attention as a Source of Catastrophic Forgetting in MoE Transformers.
CoRR
Anrui Chen, Ruijun Huang, Xin Zhang, Fang Dong, Hengjie Cao, Zhendong Huang, Yifeng Yang, Mengyi Chen, Jixian Zhou, Mingzhi Dong, Yujiang Wang, Jinlong Hou, Qin Lv, Robert P. Dick, Yuan Cheng, Tun Lu, Fan Yang, Li Shang
2026 J jnl
PigMap2: A Physical Information-Guided Technology Mapping Framework.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Cunqing Lan, Hongyang Pan, Zhiang Wang, Xuan Zeng, Fan Yang, Keren Zhu
2026 — conf
PigMap3: A Physically Aware Incremental Mapping Framework with On-the-fly Post-Layout Critical Path Tracking.
ASP-DAC
Hongyang Pan, Cunqing Lan, Zhiang Wang, Xuan Zeng, Fan Yang, Keren Zhu
2026 J jnl
SD-MoE: Spectral Decomposition for Effective Expert Specialization.
CoRR
Ruijun Huang, Fang Dong, Xin Zhang, Hengjie Cao, Zhendong Huang, Anrui Chen, Jixian Zhou, Mengyi Chen, Yifeng Yang, Mingzhi Dong, Yujiang Wang, Jinlong Hou, Qin Lv, Robert P. Dick, Yuan Cheng, Fan Yang, Tun Lu, Chun Zhang, Li Shang
2026 J jnl
Spectra: Rethinking Optimizers for LLMs Under Spectral Anisotropy.
CoRR
Zhendong Huang, Hengjie Cao, Fang Dong, Ruijun Huang, Mengyi Chen, Yifeng Yang, Xin Zhang, Anrui Chen, Mingzhi Dong, Yujiang Wang, Jinlong Hou, Qin Lv, Robert P. Dick, Yuan Cheng, Fan Yang, Tun Lu, Li Shang
2026 J jnl
The Curse and Blessing of Mean Bias in FP4-Quantized LLM Training.
CoRR
Hengjie Cao, Zhendong Huang, Mengyi Chen, Yifeng Yang, Fanqi Yu, Ruijun Huang, Fang Dong, Xin Zhang, Jixian Zhou, Anrui Chen, Mingzhi Dong, Yujiang Wang, Jinlong Hou, Qin Lv, Yuan Cheng, Tun Lu, Fan Yang, Li Shang
2026 J jnl
Variation-aware Analog Circuit Design via Contextual Modeling and Robust Optimization.
ACM Trans. Design Autom. Electr. Syst.
Jiangli Huang, Jinyi Shen, Fan Yang, Li Shang, Zhaori Bi, Changhao Yan, Wenchuang Walter Hu, Dian Zhou, Xuan Zeng
2026 J jnl
White-Box Op-Amp Design via Human-Mimicking Reasoning.
CoRR
Zihao Chen, Jiayin Wang, Ziyi Sun, Ji Zhuang, Jinyi Shen, Xiaoyue Ke, Li Shang, Xuan Zeng, Fan Yang
2025 J jnl
APPLE-DSE: Asynchronous Parallel Pareto Set Learning for Microarchitecture Design Space Exploration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xuyang Zhao, Tianning Gao, Zheng Wu, Zhaori Bi, Changhao Yan, Fan Yang, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2025 J jnl
ATOM: An Automatic Topology Synthesis Framework for Operational Amplifiers.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jinyi Shen, Fan Yang, Li Shang, Changhao Yan, Zhaori Bi, Dian Zhou, Xuan Zeng
2025 A* conf
AcclMT: A Highly Resource-Efficient and Flexible Poseidon Hash-Based Merkle Tree Architecture.
DAC
Changxu Liu, Hao Zhou, Lan Yang, Yifei Feng, Zheng Wu, Zhuoyuan Yang, Yinlong Li, Shiyong Wu, Fan Yang
2025 J jnl
ActiveEye: Enabling Continuous and Responsive Video Understanding for Smart Eyewear Systems.
Proc. ACM Interact. Mob. Wearable Ubiquitous Technol.
Zhenyu Xu, Tianlin Lu, Yingying Zhao, Yujiang Wang, Mingzhi Dong, Yuhu Chang, Qin Lv, Robert P. Dick, Fan Yang, Tun Lu, Ning Gu, Li Shang
2025 J jnl
Adaptive ILT via Multi-Level Lithography Simulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Shuyuan Sun, Fan Yang, Bei Yu, Li Shang, Xuan Zeng
2025 J jnl
An Efficient Placement Speedup Technique Based on Graph Signal Processing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yiting Liu, Hai Zhou, Jia Wang, Fan Yang, Xuan Zeng, Li Shang
2025 J jnl
AnalogSeeker: An Open-source Foundation Language Model for Analog Circuit Design.
CoRR
Zihao Chen, Ji Zhuang, Jinyi Shen, Xiaoyue Ke, Xinyi Yang, Mingjie Zhou, Zhuoyao Du, Xu Yan, Zhouyang Wu, Zhenyu Xu, Jiangli Huang, Li Shang, Xuan Zeng, Fan Yang
2025 A conf
DAMIL-DCIM: A Digital CIM Layout Synthesis Framework with Dataflow-Aware Floorplan and MILP-Based Detailed Placement.
DATE
Chuyu Wang, Ke Hu, Fan Yang, Keren Zhu, Xuan Zeng
2025 J jnl
DeepCell: Multiview Representation Learning for Post-Mapping Netlists.
CoRR
Zhengyuan Shi, Chengyu Ma, Ziyang Zheng, Lingfeng Zhou, Hongyang Pan, Wentao Jiang, Fan Yang, Xiaoyan Yang, Zhufei Chu, Qiang Xu
2025 A conf
DeepCell: Self-Supervised Multiview Fusion for Circuit Representation Learning.
ICCAD
Zhengyuan Shi, Chengyu Ma, Ziyang Zheng, Lingfeng Zhou, Hongyang Pan, Wentao Jiang, Fan Yang, Xiaoyan Yang, Zhufei Chu, Qiang Xu
2025 J jnl
Denoising Reuse: Exploiting Inter-Frame Motion Consistency for Efficient Video Generation.
IEEE Trans. Circuits Syst. Video Technol.
Chenyu Wang, Shuo Yan, Yixuan Chen, Xianwei Wang, Yujiang Wang, Mingzhi Dong, Xiaochen Yang, Dongsheng Li, Rui Zhu, David A. Clifton, Robert P. Dick, Qin Lv, Fan Yang, Tun Lu, Ning Gu, Li Shang
2025 A conf
ELMap: Area-Driven LUT Mapping with $k$-LUT Network Exact Synthesis.
DATE
Hongyang Pan, Keren Zhu, Fan Yang, Zhufei Chu, Xuan Zeng
2025 J jnl
ForgeEDA: A Comprehensive Multimodal Dataset for Advancing EDA.
CoRR
Zhengyuan Shi, Zeju Li, Chengyu Ma, Yunhao Zhou, Ziyang Zheng, Jiawei Liu, Hongyang Pan, Lingfeng Zhou, Kezhi Li, Jiaying Zhu, Lingwei Yan, Zhiqiang He, Chenhao Xue, Wentao Jiang, Fan Yang, Guangyu Sun, Xiaoyan Yang, Gang Chen, Chuan Shi, Zhufei Chu, Jun Yang, Qiang Xu
2025 J jnl
Hierarchical Integration of Reinforcement Learning and Optimization Algorithms for Time-Efficient Design Automation of Complex Analog Circuit.
ACM Trans. Design Autom. Electr. Syst.
Xingwei Feng, Yifan Xu, Zhangcheng Huang, Wuyi Xu, Zhaori Bi, Fan Yang, Xuan Zeng, Ye Lu
2025 A conf
INTO-OA: Interpretable Topology Optimization for Operational Amplifiers.
DATE
Jinyi Shen, Fan Yang, Li Shang, Zhaori Bi, Changhao Yan, Dian Zhou, Xuan Zeng
2025 J jnl
Introduction to Special Issue on Large Language Models for Electronic System Design Automation.
ACM Trans. Design Autom. Electr. Syst.
Robert Paul Dick, Hammond Pearce, Li Shang, Fan Yang
2025 J jnl
Metis: Training LLMs with FP4 Quantization.
CoRR
Hengjie Cao, Mengyi Chen, Yifeng Yang, Ruijun Huang, Fang Dong, Jixian Zhou, Anrui Chen, Mingzhi Dong, Yujiang Wang, Jinlong Hou, Yuan Cheng, Fan Wu, Fan Yang, Tun Lu, Ning Gu, Li Shang
2025 J jnl
Myosotis: An Efficiently Pipelined and Parameterized Multiscalar Multiplication Architecture via Data Sharing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Changxu Liu, Hao Zhou, Lan Yang, Zheng Wu, Patrick Dai, Yinlong Li, Shiyong Wu, Fan Yang
2025 A* conf
New Time-Domain Preconditioners for HB Jacobian of RF Circuits.
DAC
Chenyi Tan, Yangfeng Su, Fan Yang, Xuan Zeng
2025 J jnl
OOLU: An Operation-Based Optimized Sparse LU Decomposition Accelerator for Circuit Simulation.
IEEE Trans. Computers
Ke Hu, Fan Yang
2025 A* conf
Oracle-MoE: Locality-preserving Routing in the Oracle Space for Memory-constrained Large Language Model Inference.
ICML
Jixian Zhou, Fang Dong, Ruijun Huang, Hengjie Cao, Mengyi Chen, Yifeng Yang, Anrui Chen, Mingzhi Dong, Yujiang Wang, Dongsheng Li, David A. Clifton, Qin Lv, Rui Zhu, Chun Zhang, Fan Yang, Tun Lu, Ning Gu, Li Shang
2025 J jnl
Prior-Boosted GRL: Microarchitecture Design Space Exploration via Graph Representation Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Zheng Wu, Jinyi Shen, Xiaoling Yi, Li Shang, Fan Yang, Xuan Zeng
2025 J jnl
ReZK: A Highly Reconfigurable Accelerator for Zero-Knowledge Proof.
IEEE Trans. Circuits Syst. I Regul. Pap.
Hao Zhou, Changxu Liu, Lan Yang, Li Shang, Fan Yang
2025 J jnl
Rethinking Logic Rewriting: Technology-Aware Subgraph Matching with Exact Synthesis.
ACM Trans. Design Autom. Electr. Syst.
Hongyang Pan, Keren Zhu, Fan Yang, Xuan Zeng, Sen Liu, Yong Xiao, Yun Shao, Zhufei Chu
2025 J jnl
SMP-RCR: A Sparse Multipoint Moment Matching Method for RC Reduction.
CoRR
Siyuan Yin, Yuncheng Xu, Lin Liu, Fan Yang, Xuan Zeng, Chengtao An, Yangfeng Su
2025 A conf
Seeing Through Designs: Attention-Based Knowledge Transfer for Preference-Guided Microarchitecture Search.
ICCAD
Yiyang Zhao, Xuyang Zhao, Zhaori Bi, Ming Zhu, Qiwei Zhan, Keren Zhu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2025 J jnl
Streamlining Computational Lithography With Efficient Pattern Database.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Su Zheng, Wenqian Zhao, Shuyuan Sun, Fan Yang, Bei Yu, Martin D. F. Wong
2025 — conf
TL-CSE: Microarchitecture-Compiler Co-design Space Exploration via Transfer Learning.
ASP-DAC
Zheng Wu, Jinyi Shen, Xuyang Zhao, Changxu Liu, Li Shang, Fan Yang
2025 J jnl
The Power of Graph Signal Processing for Chip Placement Acceleration.
CoRR
Yiting Liu, Hai Zhou, Jia Wang, Fan Yang, Xuan Zeng, Li Shang
2025 J jnl
VTSMOC: An Efficient Voronoi Tree Search Boosted Multiobjective Bayesian Optimization With Constraints for High-Dimensional Analog Circuit Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Aidong Zhao, Ruiyu Lyu, Xuyang Zhao, Zhaori Bi, Fan Yang, Changhao Yan, Dian Zhou, Yangfeng Su, Xuan Zeng
2024 J jnl
A Fully Pipelined Reconfigurable Montgomery Modular Multiplier Supporting Variable Bit-Widths.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hao Zhou, Changxu Liu, Lan Yang, Li Shang, Fan Yang
2024 A conf
A Semi-Tensor Product based Circuit Simulation for SAT-sweeping.
DATE
Hongyang Pan, Ruibing Zhang, Yinshui Xia, Lunyao Wang, Fan Yang, Xuan Zeng, Zhufei Chu
2024 B conf
A Study on Exploring and Exploiting the High-dimensional Design Space for Analog Circuit Design Automation : (Invited Paper).
ASPDAC
Ruiyu Lyu, Yuan Meng, Aidong Zhao, Zhaori Bi, Keren Zhu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2024 A conf
AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis.
ICCAD
Jintao Li, Haochang Zhi, Ruiyu Lyu, Wangzhen Li, Zhaori Bi, Keren Zhu, Yanhan Zeng, Weiwei Shan, Changhao Yan, Fan Yang, Yun Li, Xuan Zeng
2024 J jnl
AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis.
CoRR
Jintao Li, Haochang Zhi, Ruiyu Lyu, Wangzhen Li, Zhaori Bi, Keren Zhu, Yanhan Zeng, Weiwei Shan, Changhao Yan, Fan Yang, Yun Li, Xuan Zeng
2024 A* conf
Artisan: Automated Operational Amplifier Design via Domain-specific Large Language Model.
DAC
Zihao Chen, Jiangli Huang, Yiting Liu, Fan Yang, Li Shang, Dian Zhou, Xuan Zeng
2024 B conf
Asynchronous Batch Constrained Multi-Objective Bayesian Optimization for Analog Circuit Sizing.
ASPDAC
Xuyang Zhao, Zhaori Bi, Changhao Yan, Fan Yang, Ye Lu, Dian Zhou, Xuan Zeng
2024 J jnl
BBGP-sDFO: Batch Bayesian and Gaussian Process Enhanced Subspace Derivative Free Optimization for High-Dimensional Analog Circuit Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Tianchen Gu, Wangzhen Li, Aidong Zhao, Zhaori Bi, Xudong Li, Fan Yang, Changhao Yan, Wenchuang Walter Hu, Dian Zhou, Tao Cui, Xin Liu, Zaikun Zhang, Xuan Zeng
2024 J jnl
Can Large Language Models Be Good Companions?: An LLM-Based Eyewear System with Conversational Common Ground.
Proc. ACM Interact. Mob. Wearable Ubiquitous Technol.
Zhenyu Xu, Hailin Xu, Zhouyang Lu, Yingying Zhao, Rui Zhu, Yujiang Wang, Mingzhi Dong, Yuhu Chang, Qin Lv, Robert P. Dick, Fan Yang, Tun Lu, Ning Gu, Li Shang
2024 A conf
Circuits Physics Constrained Predictor of Static IR Drop with Limited Data.
DATE
Yuan Meng, Ruiyu Lyu, Zhaori Bi, Changhao Yan, Fan Yang, Wenchuang Hu, Dian Zhou, Xuan Zeng
2024 J jnl
D
ACM Trans. Design Autom. Electr. Syst.
Aidong Zhao, Tianchen Gu, Zhaori Bi, Fan Yang, Changhao Yan, Xuan Zeng, Zixiao Lin, Wenchuang Walter Hu, Dian Zhou
2024 J jnl
Denoising Reuse: Exploiting Inter-frame Motion Consistency for Efficient Video Latent Generation.
CoRR
Chenyu Wang, Shuo Yan, Yixuan Chen, Yujiang Wang, Mingzhi Dong, Xiaochen Yang, Dongsheng Li, Robert P. Dick, Qin Lv, Fan Yang, Tun Lu, Ning Gu, Li Shang
2024 A* conf
EVDMARL: Efficient Value Decomposition-based Multi-Agent Reinforcement Learning with Domain-Randomization for Complex Analog Circuit Design Migration.
DAC
Handa Sun, Zhaori Bi, Wenning Jiang, Ye Lu, Changhao Yan, Fan Yang, Wenchuang Hu, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2024 A* conf
Efficient ILT via Multigrid-Schwartz Method.
DAC
Shuyuan Sun, Fan Yang, Bei Yu, Li Shang, Dian Zhou, Xuan Zeng
2024 A conf
Exploring High-dimensional Search Space via Voronoi Graph Traversing.
UAI
Aidong Zhao, Xuyang Zhao, Tianchen Gu, Zhaori Bi, Xinwei Sun, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng
2024 A conf
FSMM: An Efficient Matrix Multiplication Accelerator Supporting Flexible Sparsity.
ICCAD
Yuxuan Qiao, Fan Yang, Yecheng Zhang, Xiankui Xiong, Xiao Yao, Haidong Yao
2024 — conf
FullSparse: A Sparse-Aware GEMM Accelerator with Online Sparsity Prediction.
CF
Jiangnan Yu, Fan Yang, Hanfei Wang, Yuxuan Qiao, Zheng Wu, Xiankui Xiong, Xiao Yao, Haidong Yao, Yecheng Zhang
2024 J jnl
GNN-Cap: Chip-Scale Interconnect Capacitance Extraction Using Graph Neural Network.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Lihao Liu, Fan Yang, Li Shang, Xuan Zeng
2024 A* conf
Gypsophila: A Scalable and Bandwidth-Optimized Multi-Scalar Multiplication Architecture.
DAC
Changxu Liu, Hao Zhou, Lan Yang, Jiamin Xu, Patrick Dai, Fan Yang
2024 — conf
HMNTT: A Highly Efficient MDC-NTT Architecture for Privacy-preserving Applications.
ACM Great Lakes Symposium on VLSI
Changxu Liu, Danqing Tang, Jie Song, Hao Zhou, Shoumeng Yan, Fan Yang
2024 A* conf
HiMOSS: A Novel High-dimensional Multi-objective Optimization Method via Adaptive Gradient-Based Subspace Sampling for Analog Circuit Sizing.
DAC
Tianchen Gu, Ruiyu Lyu, Zhaori Bi, Changhao Yan, Fan Yang, Dian Zhou, Tao Cui, Xin Liu, Zaikun Zhang, Xuan Zeng
2024 J jnl
Hierarchical Graph Learning-Based Floorplanning With Dirichlet Boundary Conditions.
IEEE Trans. Very Large Scale Integr. Syst.
Yiting Liu, Hai Zhou, Jia Wang, Fan Yang, Xuan Zeng, Li Shang
2024 J jnl
L2O-ILT: Learning to Optimize Inverse Lithography Techniques.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Binwu Zhu, Su Zheng, Ziyang Yu, Guojin Chen, Yuzhe Ma, Fan Yang, Bei Yu, Martin D. F. Wong
2024 B conf
MACRO: Multi-agent Reinforcement Learning-based Cross-layer Optimization of Operational Amplifier.
ASPDAC
Zihao Chen, Songlei Meng, Fan Yang, Li Shang, Xuan Zeng
2024 A* conf
Once Read is Enough: Domain-specific Pretraining-free Language Models with Cluster-guided Sparse Experts for Long-tail Domain Knowledge.
NeurIPS
Fang Dong, Mengyi Chen, Jixian Zhou, Yubin Shi, Yixuan Chen, Mingzhi Dong, Yujiang Wang, Dongsheng Li, Xiaochen Yang, Rui Zhu, Robert P. Dick, Qin Lv, Fan Yang, Tun Lu, Ning Gu, Li Shang
2024 A conf
Physically Aware Synthesis Revisited: Guiding Technology Mapping with Primitive Logic Gate Placement.
ICCAD
Hongyang Pan, Cunqing Lan, Yiting Liu, Zhiang Wang, Li Shang, Xuan Zeng, Fan Yang, Keren Zhu
2024 J jnl
Physically Aware Synthesis Revisited: Guiding Technology Mapping with Primitive Logic Gate Placement.
CoRR
Hongyang Pan, Cunqing Lan, Yiting Liu, Zhiang Wang, Li Shang, Xuan Zeng, Fan Yang, Keren Zhu
2024 J jnl
PriorMSM: An Efficient Acceleration Architecture for Multi-Scalar Multiplication.
ACM Trans. Design Autom. Electr. Syst.
Changxu Liu, Hao Zhou, Patrick Dai, Li Shang, Fan Yang
2024 J jnl
ROI-HIT: Region of Interest-Driven High-Dimensional Microarchitecture Design Space Exploration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xuyang Zhao, Tianning Gao, Aidong Zhao, Zhaori Bi, Changhao Yan, Fan Yang, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2024 A conf
Revisiting sensitivity-based analog sizing with derivative-aware Bayesian optimization and error-suppressed adjoint analysis.
ICCAD
Ruiyu Lyu, Aidong Zhao, Yuan Meng, Keren Zhu, Zhaori Bi, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng
2024 A conf
SenseDSE: Sensitivity-Based Performance Evaluation for Design Space Exploration of Microarchitecture.
DATE
Zheng Wu, Xiaoling Yi, Li Shang, Fan Yang
2024 J jnl
TSCompiler: efficient compilation framework for dynamic-shape models.
Sci. China Inf. Sci.
Xiang Luo, Chen Zhang, Chenbo Geng, Yanzhi Yi, Jiahui Hu, Renwei Zhang, Zhen Zhang, Gianpietro Consolaro, Fan Yang, Tun Lu, Ning Gu, Li Shang
2024 A conf
The Power of Graph Signal Processing for Chip Placement Acceleration.
ICCAD
Yiting Liu, Hai Zhou, Jia Wang, Fan Yang, Xuan Zeng, Li Shang
2024 J jnl
Train Faster, Perform Better: Modular Adaptive Training in Over-Parameterized Models.
CoRR
Yubin Shi, Yixuan Chen, Mingzhi Dong, Xiaochen Yang, Dongsheng Li, Yujiang Wang, Robert P. Dick, Qin Lv, Yingying Zhao, Fan Yang, Tun Lu, Ning Gu, Li Shang
2024 J jnl
Yield Optimization for Analog Circuits over Multiple Corners via Bayesian Neural Networks: Enhancing Circuit Reliability under Environmental Variation.
ACM Trans. Design Autom. Electr. Syst.
Nanlin Guo, Fulin Peng, Jiahe Shi, Fan Yang, Jun Tao, Xuan Zeng
2024 A conf
tSS-BO: Scalable Bayesian Optimization for Analog Circuit Sizing via Truncated Subspace Sampling.
DATE
Tianchen Gu, Jiaqi Wang, Zhaori Bi, Changhao Yan, Fan Yang, Yajie Qin, Tao Cui, Xuan Zeng
2023 J jnl
A Batched Bayesian Optimization Approach for Analog Circuit Synthesis via Multi-Fidelity Modeling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Biao He, Shuhan Zhang, Yifan Wang, Tianning Gao, Fan Yang, Changhao Yan, Dian Zhou, Zhaori Bi, Xuan Zeng
2023 J jnl
A Semi-Tensor Product based Circuit Simulation for SAT-sweeping.
CoRR
Hongyang Pan, Ruibing Zhang, Yinshui Xia, Lunyao Wang, Fan Yang, Xuan Zeng, Zhufei Chu
2023 J jnl
An Analog Circuit Building Block Generator via Nested Multi-Fidelity Modeling.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jiangli Huang, Chuyu Wang, Yuyang Yan, Cong Tao, Fan Yang, Changhao Yan, Wenchuang Walter Hu, Dian Zhou, Xuan Zeng
2023 A conf
Automated and Agile Design of Layout Hotspot Detector via Neural Architecture Search.
DATE
Zihao Chen, Fan Yang, Li Shang, Xuan Zeng
2023 J jnl
Automatic Op-Amp Generation From Specification to Layout.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jialin Lu, Liangbo Lei, Jiangli Huang, Fan Yang, Li Shang, Xuan Zeng
2023 J jnl
CASES: A Cognition-Aware Smart Eyewear System for Understanding How People Read.
Proc. ACM Interact. Mob. Wearable Ubiquitous Technol.
Xiangyao Qi, Qi Lu, Wentao Pan, Yingying Zhao, Rui Zhu, Mingzhi Dong, Yuhu Chang, Qin Lv, Robert P. Dick, Fan Yang, Tun Lu, Ning Gu, Li Shang
2023 J jnl
Can Large Language Models Be Good Companions? An LLM-Based Eyewear System with Conversational Common Ground.
CoRR
Zhenyu Xu, Hailin Xu, Zhouyang Lu, Yingying Zhao, Rui Zhu, Yujiang Wang, Mingzhi Dong, Yuhu Chang, Qin Lv, Robert P. Dick, Fan Yang, Tun Lu, Ning Gu, Li Shang
2023 J jnl
ESPSim: An Efficient Scalable Power Grid Simulator Based on Parallel Algebraic Multigrid.
ACM Trans. Design Autom. Electr. Syst.
Chunqiao Li, Chengtao An, Fan Yang, Xuan Zeng
2023 A* conf
Efficient ILT via Multi-level Lithography Simulation.
DAC
Shuyuan Sun, Fan Yang, Bei Yu, Li Shang, Xuan Zeng
2023 A* conf
FPDsim: A Structural Simulator For Power Grid Analysis Of Flat Panel Display.
DAC
Chengtao An, Chunqiao Li, Xiangqi Li, Yangfeng Su, Fan Yang, Xuan Zeng
2023 A* conf
Graph Representation Learning for Microarchitecture Design Space Exploration.
DAC
Xiaoling Yi, Jialin Lu, Xiankui Xiong, Dong Xu, Li Shang, Fan Yang
2023 J jnl
GraphPlanner: Floorplanning with Graph Neural Network.
ACM Trans. Design Autom. Electr. Syst.
Yiting Liu, Ziyi Ju, Zhengming Li, Mingzhi Dong, Hai Zhou, Jia Wang, Fan Yang, Xuan Zeng, Li Shang
2023 J jnl
Guest Editor's Introduction: Machine Learning for VLSI Physical Design.
ACM Trans. Design Autom. Electr. Syst.
Igor L. Markov, Fan Yang, Li Shang, Hai Zhou
2023 J jnl
High-Level Topology Synthesis Method for Δ-Σ Modulators via Bi-Level Bayesian Optimization.
IEEE Trans. Circuits Syst. II Express Briefs
Jialin Lu, Yijie Li, Fan Yang, Li Shang, Xuan Zeng
2023 A* conf
Over-parameterized Model Optimization with Polyak-Łojasiewicz Condition.
ICLR
Yixuan Chen, Yubin Shi, Mingzhi Dong, Xiaochen Yang, Dongsheng Li, Yujiang Wang, Robert P. Dick, Qin Lv, Yingying Zhao, Fan Yang, Ning Gu, Li Shang
2023 A conf
Sphinx: A Hybrid Boolean Processor-FPGA Hardware Emulation System.
ICCAD
Ruiyao Pu, Yiwei Sun, Pei-Hsin Ho, Fan Yang, Li Shang, Xuan Zeng
2023 — conf
TOTAL: Topology Optimization of Operational Amplifier via Reinforcement Learning.
ISQED
Zihao Chen, Songlei Meng, Fan Yang, Li Shang, Xuan Zeng
2023 — conf
TPNoC: An Efficient Topology Reconfigurable NoC Generator.
ACM Great Lakes Symposium on VLSI
Jiangnan Yu, Fan Yang, Xiaoling Yi, Chixiao Chen, Jun Tao, Dong Xu, Xiankui Xiong, Haitao Yang
2023 A* conf
Train Faster, Perform Better: Modular Adaptive Training in Over-Parameterized Models.
NeurIPS
Yubin Shi, Yixuan Chen, Mingzhi Dong, Xiaochen Yang, Dongsheng Li, Yujiang Wang, Robert P. Dick, Qin Lv, Yingying Zhao, Fan Yang, Tun Lu, Ning Gu, Li Shang
2023 J jnl
Unleashing the Power of Graph Spectral Sparsification for Power Grid Analysis via Incomplete Cholesky Factorization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chunqiao Li, Chengtao An, Zhengqi Gao, Fan Yang, Yangfeng Su, Xuan Zeng
2023 A* conf
cVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis.
DAC
Aidong Zhao, Xianan Wang, Zixiao Lin, Zhaori Bi, Xudong Li, Changhao Yan, Fan Yang, Li Shang, Dian Zhou, Xuan Zeng
2022 — conf
A 26-38GHz Ultra-Wideband Balanced Frequency Doubler in 0.15µ m GaAs pHEMT Process.
APCCAS
Wenyang Liu, Tianxiang Wu, Tianyang Yan, Fan Yang, Yong Chen, Shunli Ma
2022 C conf
A Batch Bayesian Optimization Approach For Analog Circuit Synthesis Based On Multi-Points Selection Criterion.
ISCAS
Xu Fu, Changhao Yan, Zhaori Bi, Fan Yang, Dian Zhou, Xuan Zeng
2022 — conf
A Novel and Efficient Bayesian Optimization Approach for Analog Designs with Multi-Testbench.
ASP-DAC
Jingyao Zhao, Changhao Yan, Zhaori Bi, Fan Yang, Xuan Zeng, Dian Zhou
2022 C conf
Adversarial Sample Generation for Lithography Hotspot Detection.
ISCAS
Shuyuan Sun, Yiyang Jiang, Fan Yang, Xuan Zeng
2022 C conf
An Automated Compiler for RISC-V Based DNN Accelerator.
ISCAS
Zheng Wu, Wuzhen Xie, Xiaoling Yi, Haitao Yang, Ruiyao Pu, Xiankui Xiong, Haidong Yao, Chixiao Chen, Jun Tao, Fan Yang
2022 J jnl
An Efficient Batch-Constrained Bayesian Optimization Approach for Analog Circuit Synthesis via Multiobjective Acquisition Ensemble.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2022 A* conf
An efficient yield optimization method for analog circuits via gaussian process classification and varying-sigma sampling.
DAC
Xiaodong Wang, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng
2022 J jnl
Analog Circuit Yield Optimization via Freeze-Thaw Bayesian Optimization Technique.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xiaodong Wang, Changhao Yan, Yuzhe Ma, Bei Yu, Fan Yang, Dian Zhou, Xuan Zeng
2022 J jnl
Do Smart Glasses Dream of Sentimental Visions? Deep Emotionship Analysis for Eyewear Devices.
CoRR
Yingying Zhao, Yuhu Chang, Yutian Lu, Yujiang Wang, Mingzhi Dong, Qin Lv, Robert P. Dick, Fan Yang, Tun Lu, Ning Gu, Li Shang
2022 J jnl
Do Smart Glasses Dream of Sentimental Visions?: Deep Emotionship Analysis for Eyewear Devices.
Proc. ACM Interact. Mob. Wearable Ubiquitous Technol.
Yingying Zhao, Yuhu Chang, Yutian Lu, Yujiang Wang, Mingzhi Dong, Qin Lv, Robert P. Dick, Fan Yang, Tun Lu, Ning Gu, Li Shang
2022 A conf
Efficient Hotspot Detection via Graph Neural Network.
DATE
Shuyuan Sun, Yiyang Jiang, Fan Yang, Bei Yu, Xuan Zeng
2022 J jnl
Efficient Layout Hotspot Detection via Neural Architecture Search.
ACM Trans. Design Autom. Electr. Syst.
Yiyang Jiang, Fan Yang, Bei Yu, Dian Zhou, Xuan Zeng
2022 J jnl
Faster Region-Based Hotspot Detection.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ran Chen, Wei Zhong, Haoyu Yang, Hao Geng, Fan Yang, Xuan Zeng, Bei Yu
2022 A* conf
Floorplanning with graph attention.
DAC
Yiting Liu, Ziyi Ju, Zhengming Li, Mingzhi Dong, Hai Zhou, Jia Wang, Fan Yang, Xuan Zeng, Li Shang
2022 J jnl
Hotspot Detection via Attention-Based Deep Layout Metric Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hao Geng, Haoyu Yang, Lu Zhang, Fan Yang, Xuan Zeng, Bei Yu
2022 — conf
LinEasyBO: Scalable Bayesian Optimization Approach for Analog Circuit Synthesis via One-Dimensional Subspaces.
MLCAD
Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2022 C conf
NNASIM: An Efficient Event-Driven Simulator for DNN Accelerators with Accurate Timing and Area Models.
ISCAS
Xiaoling Yi, Jiangnan Yu, Zheng Wu, Xiankui Xiong, Dong Xu, Chixiao Chen, Jun Tao, Fan Yang
2022 A* conf
Recursive Disentanglement Network.
ICLR
Yixuan Chen, Yubin Shi, Dongsheng Li, Yujiang Wang, Mingzhi Dong, Yingying Zhao, Robert P. Dick, Qin Lv, Fan Yang, Li Shang
2022 C conf
SAT-based Scheduling Algorithm for High-level Synthesis Considering Resource Sharing.
ISCAS
Hao Jiang, Fan Yang, Changhao Yan, Xuan Zeng
2022 A conf
Topology Optimization of Operational Amplifier in Continuous Space via Graph Embedding.
DATE
Jialin Lu, Liangbo Lei, Fan Yang, Li Shang, Xuan Zeng
2022 J jnl
Unveiling Causal Attention in Dogs' Eyes with Smart Eyewear.
Proc. ACM Interact. Mob. Wearable Ubiquitous Technol.
Yingying Zhao, Ning Li, Wentao Pan, Yujiang Wang, Mingzhi Dong, Sharon Xianghua Ding, Qin Lv, Robert P. Dick, Dongsheng Li, Fan Yang, Tun Lu, Ning Gu, Li Shang
2022 J jnl
VECBEE: A Versatile Efficiency-Accuracy Configurable Batch Error Estimation Method for Greedy Approximate Logic Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sanbao Su, Chang Meng, Fan Yang, Xiaolong Shen, Leibin Ni, Wei Wu, Zhihang Wu, Junfeng Zhao, Weikang Qian
2021 — conf
A Robust Batch Bayesian Optimization for Analog Circuit Synthesis via Local Penalization.
ASP-DAC
Jiangli Huang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2021 A conf
Accelerate Logic Re-simulation on GPU via Gate/Event Parallelism and State Compression.
ICCAD
Cheng Zeng, Fan Yang, Xuan Zeng
2021 J jnl
An Efficient Asynchronous Batch Bayesian Optimization Approach for Analog Circuit Synthesis.
CoRR
Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng
2021 J jnl
An Efficient Batch Constrained Bayesian Optimization Approach for Analog Circuit Synthesis via Multi-objective Acquisition Ensemble.
CoRR
Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2021 A* conf
Automated Compensation Scheme Design for Operational Amplifier via Bayesian Optimization.
DAC
Jialin Lu, Liangbo Lei, Fan Yang, Changhao Yan, Xuan Zeng
2021 C conf
Bayesian Optimization Approach for Analog Circuit Design Using Multi-Task Gaussian Process.
ISCAS
Jiangli Huang, Shuhan Zhang, Cong Tao, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2021 — conf
Efficient High-Level Synthesis of Approximate Computing Circuits via Multi-fidelity Modeling.
ASICON
Yingqi Li, Fan Yang, Changhao Yan, Xuan Zeng
2021 J jnl
Efficient Layout Hotspot Detection via Binarized Residual Neural Network Ensemble.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yiyang Jiang, Fan Yang, Bei Yu, Dian Zhou, Xuan Zeng
2021 A conf
Hotspot Detection via Multi-task Learning and Transformer Encoder.
ICCAD
Binwu Zhu, Ran Chen, Xinyun Zhang, Fan Yang, Xuan Zeng, Bei Yu, Martin D. F. Wong
2021 J jnl
LinEasyBO: Scalable Bayesian Optimization Approach for Analog Circuit Synthesis via One-Dimensional Subspaces.
CoRR
Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2021 A conf
When Wafer Failure Pattern Classification Meets Few-shot Learning and Self-Supervised Learning.
ICCAD
Hao Geng, Fan Yang, Xuan Zeng, Bei Yu
2020 C conf
A Mixed-Variable Bayesian Optimization Approach for Analog Circuit Synthesis.
ISCAS
Jialin Lu, Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng
2020 A* conf
An Efficient Asynchronous Batch Bayesian Optimization Approach for Analog Circuit Synthesis.
DAC
Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng
2020 A conf
An Efficient Bayesian Optimization Approach for Analog Circuit Synthesis via Sparse Gaussian Process Modeling.
DATE
Biao He, Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2020 C conf
An Efficient Memory Partitioning Approach for Multi-Pattern Data Access in STT-RAM.
ISCAS
Binbin Liu, Fan Yang, Dian Zhou, Xuan Zeng
2020 A* conf
An Efficient and Robust Yield Optimization Method for High-dimensional SRAM Circuits.
DAC
Xiaodong Wang, Tianchen Gu, Changhao Yan, Xiulong Wu, Fan Yang, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2020 — conf
Bayesian Methods for the Yield Optimization of Analog and SRAM Circuits.
ASP-DAC
Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng
2020 A conf
Hotspot Detection via Attention-based Deep Layout Metric Learning.
ICCAD
Hao Geng, Haoyu Yang, Lu Zhang, Jin Miao, Fan Yang, Xuan Zeng, Bei Yu
2020 J jnl
Improved Low-Power Cost-Effective DCT Implementation Based on Markov Random Field and Stochastic Logic.
IEEE Trans. Circuits Syst. Video Technol.
Yufeng Li, Yan Li, I-Chyn Wey, Deqiang Cheng, Fan Yang, Xuan Zeng, Jie Chen
2020 C conf
Learning Low-Rank Structured Sparsity in Recurrent Neural Networks.
ISCAS
Weijing Wen, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng
2020 J jnl
Nonlinear CNN: improving CNNs with quadratic convolutions.
Neural Comput. Appl.
Yiyang Jiang, Fan Yang, Hengliang Zhu, Dian Zhou, Xuan Zeng
2019 J jnl
An Efficient FPGA Implementation of Orthogonal Matching Pursuit With Square-Root-Free QR Decomposition.
IEEE Trans. Very Large Scale Integr. Syst.
Xiang Ge, Fan Yang, Hengliang Zhu, Xuan Zeng, Dian Zhou
2019 J jnl
An Efficient Memory Partitioning Approach for Multi-Pattern Data Access via Data Reuse.
ACM Trans. Reconfigurable Technol. Syst.
Wensong Li, Fan Yang, Hengliang Zhu, Xuan Zeng, Dian Zhou
2019 A* conf
An Efficient Multi-fidelity Bayesian Optimization Approach for Analog Circuit Synthesis.
DAC
Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, Xiangdong Hu
2019 J jnl
An Efficient Multi-fidelity Bayesian Optimization Approach for Analog Circuit Synthesis.
CoRR
Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, Xiangdong Hu
2019 A conf
Bayesian Optimization Approach for Analog Circuit Synthesis Using Neural Network.
DATE
Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2019 J jnl
Bayesian Optimization Approach for Analog Circuit Synthesis Using Neural Network.
CoRR
Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2019 A* conf
Efficient Layout Hotspot Detection via Binarized Residual Neural Network.
DAC
Yiyang Jiang, Fan Yang, Hengliang Zhu, Bei Yu, Dian Zhou, Xuan Zeng
2019 A conf
Efficient Performance Trade-off Modeling for Analog Circuit based on Bayesian Neural Network.
ICCAD
Zhengqi Gao, Jun Tao, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng
2019 — conf
Learning Sparse Patterns in Deep Neural Networks.
ASICON
Weijing Wen, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng
2019 — conf
Parallel Global Placement on CPU via Parallel Reduction.
ASICON
Huaidong Gao, Fan Yang, Dian Zhou, Xuan Zeng
2018 J jnl
An Efficient Bayesian Optimization Approach for Automated Optimization of Analog Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap.
Wenlong Lyu, Pan Xue, Fan Yang, Changhao Yan, Zhiliang Hong, Xuan Zeng, Dian Zhou
2018 A conf
An efficient data reuse strategy for multi-pattern data access.
ICCAD
Wensong Li, Fan Yang, Hengliang Zhu, Xuan Zeng, Dian Zhou
2018 A* conf
Batch Bayesian Optimization via Multi-objective Acquisition Ensemble for Automated Analog Circuit Design.
ICML
Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2018 J jnl
Cut Redistribution and Insertion for Advanced 1-D Layout Design via Network Flow Optimization.
IEEE Trans. Very Large Scale Integr. Syst.
Ye Zhang, Wenlong Lyu, Wai-Shing Luk, Fan Yang, Hai Zhou, Dian Zhou, David Z. Pan, Xuan Zeng
2018 J jnl
Efficient Yield Optimization for Analog and SRAM Circuits via Gaussian Process Regression and Adaptive Yield Estimation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Mengshuo Wang, Wenlong Lv, Fan Yang, Changhao Yan, Wei Cai, Dian Zhou, Xuan Zeng
2018 J jnl
Feedback-Based Low-Power Soft-Error-Tolerant Design for Dual-Modular Redundancy.
IEEE Trans. Very Large Scale Integr. Syst.
Yan Li, Yufeng Li, Jie Han, Jianhao Hu, Fan Yang, Xuan Zeng, Bruce F. Cockburn, Jie Chen
2018 J jnl
Low-Power Noise-Immune Nanoscale Circuit Design Using Coding-Based Partial MRF Method.
IEEE J. Solid State Circuits
Yan Li, Yufeng Li, I-Chyn Wey, Jianhao Hu, Fan Yang, Xuan Zeng, Xiaoxue Jiang, Jie Chen
2018 A* conf
Multi-objective bayesian optimization for analog/RF circuit synthesis.
DAC
Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2017 C conf
A grid-based detailed routing algorithm for advanced 1D process.
ISCAS
Ye Zhang, Fan Yang, Dian Zhou, Xuan Zeng, Xiangdong Hu
2017 — conf
A high performance real-time edge detection system with NEON.
ASICON
Kaixuan Zhang, Li Ding, Yujie Cai, Wenbo Yin, Fan Yang, Jun Tao, Lingli Wang
2017 A* conf
Efficient Bayesian Yield Optimization Approach for Analog and SRAM Circuits.
DAC
Mengshuo Wang, Fan Yang, Changhao Yan, Xuan Zeng, Xiangdong Hu
2017 J jnl
Efficient Memory Partitioning for Parallel Data Access in FPGA via Data Reuse.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jincheng Su, Fan Yang, Xuan Zeng, Dian Zhou, Jie Chen
2017 C conf
Efficient SVM-based hotspot detection using spectral clustering.
ISCAS
Fan Yang, Charles C. Chiang, Xuan Zeng, Dian Zhou
2017 C conf
Efficient spectral graph sparsification via Krylov-subspace based spectral perturbation analysis.
ISCAS
Shuhan Zhang, Fan Yang, Xuan Zeng, Dian Zhou, Shun Li, Xiangdong Hu
2017 J jnl
Improved Tangent Space-Based Distance Metric for Lithographic Hotspot Classification.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Fan Yang, Subarna Sinha, Charles C. Chiang, Xuan Zeng, Dian Zhou
2017 C conf
Layout decomposition for hybrid E-beam and DSA double patterning lithography.
ISCAS
Yunfeng Yang, Fan Yang, Wai-Shing Luk, Changhao Yan, Xuan Zeng, Xiangdong Hu
2017 — conf
Network flow based cut redistribution and insertion for advanced 1D layout design.
ASP-DAC
Ye Zhang, Wai-Shing Luk, Fan Yang, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng
2017 — conf
Parallel sparse LU decomposition using FPGA with an efficient cache architecture.
ASICON
Xiang Ge, Hengliang Zhu, Fan Yang, Lingli Wang, Xuan Zeng
2017 A conf
Subgradient based multiple-starting-point algorithm for non-smooth optimization of analog circuits.
DATE
Wenlong Lv, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2016 J jnl
A Memristor Crossbar-Based Computation Scheme with High Precision.
CoRR
Junyi Li, Fulin Peng, Fan Yang, Xuan Zeng
2016 J jnl
An aggregating based model order reduction method for power grids.
Integr.
Qicheng Huang, Xiao Li, Chenlei Fang, Fan Yang, Yangfeng Su, Xuan Zeng
2016 — conf
An efficient trajectory-based algorithm for model order reduction of nonlinear systems via localized projection and global interpolation.
ASP-DAC
Chenjie Yang, Fan Yang, Xuan Zeng, Dian Zhou
2016 A conf
Efficient Memory Partitioning for Parallel Data Access via Data Reuse.
FPGA
Jincheng Su, Fan Yang, Xuan Zeng, Dian Zhou
2016 A conf
Efficient multiple starting point optimization for automated analog circuit optimization via recycling simulation data.
DATE
Bo Peng, Fan Yang, Changhao Yan, Xuan Zeng, Dian Zhou
2016 A* conf
Efficient performance modeling of analog integrated circuits via kernel density based sparse regression.
DAC
Chenlei Fang, Qicheng Huang, Fan Yang, Xuan Zeng, Dian Zhou, Xin Li
2016 A* conf
Efficient performance modeling via Dual-Prior Bayesian Model Fusion for analog and mixed-signal circuits.
DAC
Qicheng Huang, Chenlei Fang, Fan Yang, Xuan Zeng, Dian Zhou, Xin Li
2016 C conf
Fast compressive sensing reconstruction algorithm on FPGA using Orthogonal Matching Pursuit.
ISCAS
Zhelun Yu, Jincheng Su, Fan Yang, Yangfeng Su, Xuan Zeng, Dian Zhou, Weiping Shi
2016 C conf
High-speed link verification based on statistical inference.
ISCAS
Xuan Zeng, Chenlei Fang, Qicheng Huang, Fan Yang, Dian Zhou, Wei Cai, Weiping Shi
2015 A conf
Efficient bit error rate estimation for high-speed link by Bayesian model fusion.
DATE
Chenlei Fang, Qicheng Huang, Fan Yang, Xuan Zeng, Xin Li, Chenjie Gu
2015 A* conf
Efficient multivariate moment estimation via Bayesian model fusion for analog and mixed-signal circuits.
DAC
Qicheng Huang, Chenlei Fang, Fan Yang, Xuan Zeng, Xin Li
2015 J jnl
MOS Table Models for Fast and Accurate Simulation of Analog and Mixed-Signal Circuits Using Efficient Oscillation-Diminishing Interpolations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xiao Li, Fan Yang, Dake Wu, Zhenya Zhou, Xuan Zeng
2015 J jnl
Multi-parameter clock skew scheduling.
Integr.
Xingbao Zhou, Wai-Shing Luk, Hai Zhou, Fan Yang, Changhao Yan, Xuan Zeng
2015 — conf
PGMOR: An Efficient Model Order Reduction Method for Power Grids.
CAD/Graphics
Qicheng Huang, Xiao Li, Chenlei Fang, Fan Yang, Yangfeng Su, Xuan Zeng
2015 — conf
SIPredict: Efficient post-layout waveform prediction via System Identification.
ASP-DAC
Qicheng Huang, Xiao Li, Fan Yang, Xuan Zeng, Xin Li
2014 A* conf
BMF-BD: Bayesian Model Fusion on Bernoulli Distribution for Efficient Yield Estimation of Integrated Circuits.
DAC
Chenlei Fang, Fan Yang, Xuan Zeng, Xin Li
2014 J jnl
Efficient Statistical Timing Analysis for Circuits with Post-Silicon Tunable Buffers.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Xingbao Zhou, Fan Yang, Hai Zhou, Min Gong, Hengliang Zhu, Ye Zhang, Xuan Zeng
2013 — conf
A parallel sparse linear system solver for large-scale circuit simulation based on Schur Complement.
ASICON
Liuxi Qian, Dian Zhou, Xuan Zeng, Fan Yang, Shengguo Wang
2012 A* conf
AMOR: an efficient aggregating based model order reduction method for many-terminal interconnect circuits.
DAC
Yangfeng Su, Fan Yang, Xuan Zeng
2012 A* conf
Improved tangent space based distance metric for accurate lithographic hotspot classification.
DAC
Jing Guo, Fan Yang, Subarna Sinha, Charles C. Chiang, Xuan Zeng
2011 J jnl
Full-Spectrum Spatial-Temporal Dynamic Thermal Analysis for Nanometer-Scale Integrated Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Zyad Hassan, Nicholas Allec, Fan Yang, Li Shang, Robert P. Dick, Xuan Zeng
2011 J jnl
Stochastic Non-homogeneous Arnoldi Method for Analysis of On-Chip Power Grid Networks under Process Variations.
IEICE Trans. Electron.
Zhihua Gui, Fan Yang, Xuan Zeng
2010 J jnl
A Wavelet-Collocation-Based Trajectory Piecewise-Linear Algorithm for Time-Domain Model-Order Reduction of Nonlinear Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap.
Ke Zong, Fan Yang, Xuan Zeng
2010 A conf
An efficient transistor-level piecewise-linear macromodeling approach for model order reduction of nonlinear circuits.
DATE
Xiaoda Pan, Fan Yang, Xuan Zeng, Yangfeng Su
2010 J jnl
NHAR: A non-homogeneous Arnoldi method for fast simulation of RCL circuits with a large number of ports.
Int. J. Circuit Theory Appl.
Xuan Zeng, Fan Yang, Yangfeng Su, Wei Cai
2009 J jnl
A Modified Nested Sparse Grid Based Adaptive Stochastic Collocation Method for Statistical Static Timing Analysis.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Xu Luo, Fan Yang, Xuan Zeng, Jun Tao, Hengliang Zhu, Wei Cai
2009 A* conf
Statistical reliability analysis under process variation and aging effects.
DAC
Yinghai Lu, Li Shang, Hai Zhou, Hengliang Zhu, Fan Yang, Xuan Zeng
2007 C conf
RLCSYN: RLC Equivalent Circuit Synthesis for Structure-Preserved Reduced-order Model of Interconnect.
ISCAS
Fan Yang, Xuan Zeng, Yangfeng Su, Dian Zhou
2006 C conf
A one-shot projection method for interconnects with process variations.
ISCAS
Jun Tao, Xuan Zeng, Fan Yang, Yangfeng Su, Lihong Feng, Wei Cai, Dian Zhou, Charles C. Chiang