Fa Foster Dai

72 papers C 16Journal 26Unranked 30
YearRankTypeTitle / Venue / Authors
2024 C conf
A 10-bit 100kS/s SAR ADC With a Monotonic Capacitor Switching Procedure for Single-Ended Inputs in 22nm CMOS FDSOI.
ISCAS
Alexander Meyer, Kaoru Yamashita, Adilet Dossanov, Martin Maier, Finn Stapelfeldt, Yerzhan Kudabay, Peter Toth, Fa Foster Dai, Hiroki Ishikuro, Vadim Issakov
2023 J jnl
A 12-Bit 260-MS/s Pipelined-SAR ADC With Ring-TDC-Based Fine Quantizer for Automatic Cross-Domain Scale Alignment.
IEEE J. Solid State Circuits
Haoyi Zhao, Fa Foster Dai
2022 — conf
A 0.97mW 260MS/s 12b Pipelined-SAR ADC with Ring-TDC-Based Fine Quantizer for PVT Robust Automatic Cross-Domain Scale Alignment.
ISSCC
Haoyi Zhao, Fa Foster Dai
2021 J jnl
A Fractional-N Reference Sampling PLL With Linear Sampler and CDAC Based Fractional Spur Cancellation.
IEEE J. Solid State Circuits
Dongyi Liao, Fa Foster Dai
2020 — conf
A 7.7~10.3GHz 5.2mW -247.3dB-FOM Fractional-N Reference Sampling PLL with 2nd Order CDAC Based Fractional Spur Cancellation In 45nm CMOS.
CICC
Dongyi Liao, Fa Foster Dai
2020 J jnl
An mm-Wave Synthesizer With Robust Locking Reference-Sampling PLL and Wide-Range Injection-Locked VCO.
IEEE J. Solid State Circuits
Dongyi Liao, YuCai Zhang, Fa Foster Dai, ZhenQi Chen, Yanjie Wang
2020 J jnl
Sub-Sampling Direct RF-to-Digital Converter With 1024-APSK Modulation for High Throughput Polar Receiver.
IEEE J. Solid State Circuits
Hechen Wang, Fa Foster Dai, Zhan Su, Yanjie Wang
2019 — conf
A 280MS/s 12b SAR-Assisted Hybrid ADC with Time Domain Sub-Range Quantizer in 45nm CMOS.
CICC
Zhan Su, Hechen Wang, Haoyi Zhao, ZhenQi Chen, Yanjie Wang, Fa Foster Dai
2019 — conf
A 3.8 mW Sub-Sampling Direct RF-to-Digital Converter for Polar Receiver Achieving 1.94 Gb/s Data Rate with 1024-APSK Modulation.
VLSI Circuits
Hechen Wang, Zhan Su, Haoyi Zhao, Yanjie Wang, Fa Foster Dai
2019 C conf
An 8-bit 80-MS/s Fully Self-Timed SAR ADC with 3/2 Interleaved Comparators and High-Order PVT Stabilized HBT Bandgap Reference.
ISCAS
Zhan Su, Hechen Wang, Haoyi Zhao, Xiao Liu, Fa Foster Dai
2019 — conf
An mm-Wave Synthesizer with Low In-Band Noise and Robust Locking Reference-Sampling PLL.
CICC
Dongyi Liao, YuCai Zhang, ZhenQi Chen, Yanjie Wang, Fa Foster Dai
2018 C conf
A 1.8 GHz-2.4 GHz SAW-Less Reconfigurable Receiver Frontend RFIC in 65nm CMOS RF SOI.
ISCAS
Hossein Noori, Rong Jiang, Fa Foster Dai
2018 J jnl
A 2.4-GHz 16-Phase Sub-Sampling Fractional-N PLL With Robust Soft Loop Switching.
IEEE J. Solid State Circuits
Dongyi Liao, Fa Foster Dai, Bram Nauta, Eric A. M. Klumperink
2018 C conf
A Low Phase Noise Ring Oscillator with Miller Capacitance Cancellation.
ISCAS
Yucheng Tong, Fa Foster Dai, Hossein Noori, Kun Zhao
2018 J jnl
A Multi-Phase Coupled Oscillator Using Inductive Resonant Coupling and Modified Dual-Tank Techniques.
IEEE J. Solid State Circuits
Rong Jiang, Hossein Noori, Fa Foster Dai
2018 J jnl
A Reconfigurable Vernier Time-to-Digital Converter With 2-D Spiral Comparator Array and Second-Order ΔΣ Linearization.
IEEE J. Solid State Circuits
Hechen Wang, Fa Foster Dai, Hua Wang
2018 — conf
A bidirectional lens-free digital-bits-in/-out 0.57mm
CICC
Taiyun Chi, Hechen Wang, Min-Yu Huang, Fa Foster Dai, Hua Wang
2018 — conf
A full-duplex transceiver front-end RFIC with code-domain spread spectrum modulation for Tx self-interference cancellation and in-band jammer rejection.
CICC
ZhenQi Chen, Dongyi Liao, Fa Foster Dai
2017 — conf
A 0.8∼1.3 GHz multi-phase injection-locked PLL using capacitive coupled multi-ring oscillator with reference spur suppression.
CICC
Ruixin Wang, Fa Foster Dai
2017 — conf
A 14-Bit, 1-ps resolution, two-step ring and 2D Vernier TDC in 130nm CMOS technology.
ESSCIRC
Hechen Wang, Fa Foster Dai
2017 — conf
A 330μW 1.25ps 400fs-INL vernier time-to-digital converter with 2D reconfigurable spiral arbiter array and 2
CICC
Hechen Wang, Fa Foster Dai, Hua Wang
2017 — conf
A bidirectional lens-free digital-bits-in/-out 0.57mm
CICC
Taiyun Chi, Hechen Wang, Min-Yu Huang, Fa Foster Dai, Hua Wang
2017 C conf
A low phase noise 8.8 GHz VCO based on ISF manipulation and dual-tank technique.
ISCAS
Rong Jiang, Hossein Noori, Fa Foster Dai, Jun Fu, Wei Zhou, Yudong Wang
2017 J jnl
An 802.11a/b/g/n Digital Fractional-N PLL With Automatic TDC Linearity Calibration for Spur Cancellation.
IEEE J. Solid State Circuits
Dongyi Liao, Hechen Wang, Fa Foster Dai, Yang Xu, Roc Berenguer, Sara Munoz Hermoso
2017 — conf
Multi-phase sub-sampling fractional-N PLL with soft loop switching for fast robust locking.
CICC
Dongyi Liao, Fa Foster Dai, Bram Nauta, Eric A. M. Klumperink
2017 C conf
Offset based feedforward amplifier with nonlinearity compensation and P1dB expansion.
ISCAS
Zhan Su, Hossein Noori, Fa Foster Dai, Wei Zhou, Yudong Wang, Jun Fu
2017 — conf
Session 24-Milimeter-wave communication circuits.
CICC
John Long, Fa Foster Dai
2016 — conf
A 1∼1.5 GHz capacitive coupled inductor-less multi-ring oscillator with improved phase noise.
ESSCIRC
Ruixin Wang, Fa Foster Dai
2015 C conf
Adaptive integratable hardware realization of analog neural networks for nonlinear system.
INDIN
Zhan Su, Bogdan M. Wilamowski, Ruixin Wang, Fa Foster Dai
2015 — conf
Low noise coupling techniques for multi-phase oscillators.
ASICON
Fa Foster Dai, Feng Zhao, Rong Jiang
2015 — conf
Session 4 - Frequency and phase generation techniques.
CICC
Fa Foster Dai, Swaminathan Sankaran
2014 — conf
A capacitive-coupling technique with phase noise and phase error reduction for multi-phase clock generation.
CICC
Feng Zhao, Fa Foster Dai
2014 J jnl
An X-Band Radar Transceiver MMIC with Bandwidth Reduction in 0.13 µm SiGe Technology.
IEEE J. Solid State Circuits
Jianjun Yu, Feng Zhao, Joseph Cali, Fa Foster Dai, Desheng Ma, Xueyang Geng, Yuehai Jin, Yuan Yao, Xin Jin, J. David Irwin, Richard C. Jaeger
2013 J jnl
Introduction to the Special Section on the 26th Bipolar/BiCMOS Circuits and Technology Meeting.
IEEE J. Solid State Circuits
Fa Foster Dai
2012 J jnl
A 0.6-V Quadrature VCO With Enhanced Swing and Optimized Capacitive Coupling for Phase Noise Reduction.
IEEE Trans. Circuits Syst. I Regul. Pap.
Feng Zhao, Fa Foster Dai
2012 C conf
A 100MHz fifth-order low-pass gm-C filter using folded stages.
IECON
Xin Jin, Fa Foster Dai
2012 C conf
A 6
ISCAS
Xin Jin, Fa Foster Dai
2012 C conf
A harmonic rejection mixer in wideband transmitter.
IECON
Yuehai Jin, Fa Foster Dai
2012 — conf
A single-chip x-band chirp radar MMIC with stretch processing.
CICC
Jianjun Yu, Feng Zhao, Joseph Cali, Desheng Ma, Xueyang Geng, Fa Foster Dai, J. David Irwin, Andre Aklian
2012 C conf
Effect of CMOS device sizing on circuit noise performance.
IECON
Hossein Noori, Fa Foster Dai
2012 J jnl
Impact of Transceiver RFIC Impairments on MIMO System Performance.
IEEE Trans. Ind. Electron.
Yuehai Jin, Fa Foster Dai
2012 C conf
Impact of process variations on computers used for image processing.
ISCAS
Suraj Sindia, Fa Foster Dai, Vishwani D. Agrawal, Virendra Singh
2012 J jnl
Introduction to the Special Section on the 25th Bipolar/BiCMOS Circuits and Technology Meeting.
IEEE J. Solid State Circuits
Fa Foster Dai
2012 — conf
PLLs, VCOs, and dividers.
CICC
Fa Foster Dai, Howard C. Luong
2012 C conf
Remedies for noise degradation due to active Q-Enhancement Circuit.
ISCAS
Hossein Noori, Fa Foster Dai
2011 — conf
A 0.6V quadrature VCO with optimized capacitive coupling for phase noise reduction.
CICC
Feng Zhao, Fa Foster Dai
2011 C conf
A 3mW 8-Bit radiation-hardened-by-design DAC for ultra-wide temperature range from -180°C to 120°C.
ISCAS
ZhenQi Chen, Fa Foster Dai
2011 C conf
A 4.2-4.7GHz, 3.7mW digitally controlled oscillator RFIC.
ISCAS
Vasanth Kakani, Fa Foster Dai
2011 J jnl
An X- and Ku-Band Wideband Recursive Receiver MMIC With Gain-Reuse.
IEEE J. Solid State Circuits
Desheng Ma, Fa Foster Dai, Richard C. Jaeger, J. David Irwin
2011 J jnl
Selective Spectrum Analysis for Analog Measurements.
IEEE Trans. Ind. Electron.
Jie Qin, Joseph Cali, Bradley F. Dutton, George J. Starr, Fa Foster Dai, Charles E. Stroud
2010 J jnl
24-Bit 5.0 GHz Direct Digital Synthesizer RFIC With Direct Digital Modulations in 0.13 μ m SiGe BiCMOS Technology.
IEEE J. Solid State Circuits
Xueyang Geng, Fa Foster Dai, J. David Irwin, Richard C. Jaeger
2010 J jnl
A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 μm CMOS Technology.
IEEE J. Solid State Circuits
Jianjun Yu, Fa Foster Dai, Richard C. Jaeger
2010 — conf
A 3-dimensional Vernier ring time-to-digital converter in 0.13µm CMOS.
CICC
Jianjun Yu, Fa Foster Dai
2010 — conf
A CMOS programmable gain amplifier with a novel DC-offset cancellation technique.
CICC
Xiaojie Chu, Min Lin, Zheng Gong, Yin Shi, Fa Foster Dai
2010 J jnl
An 11-Bit 8.6 GHz Direct Digital Synthesizer MMIC With 10-Bit Segmented Sine-Weighted DAC.
IEEE J. Solid State Circuits
Xueyang Geng, Fa Foster Dai, J. David Irwin, Richard C. Jaeger
2010 J jnl
An X-Band Transformer-Coupled Varactor-Less Quadrature Current-Controlled Oscillator in 0.18 μm SiGe BiCMOS Technology.
IEEE J. Solid State Circuits
Xueyang Geng, Fa Foster Dai
2010 J jnl
Effects of LO Phase and Amplitude Imbalances and Phase Noise on M -QAM Transceiver Performance.
IEEE Trans. Ind. Electron.
ZhenQi Chen, Fa Foster Dai
2010 — conf
On-chip Jitter Measurement Using Vernier Ring Time-to-Digital Converter.
Asian Test Symposium
Jianjun Yu, Fa Foster Dai
2009 C conf
Effects of LO Phase and Amplitude Imbalances and Phase Noise on M-QAM Transceiver Performance.
ISCAS
ZhenQi Chen, Fa Foster Dai
2008 J jnl
A 12 GHz 1.9 W Direct Digital Synthesizer MMIC Implemented in 0.18 µm SiGe BiCMOS Technology.
IEEE J. Solid State Circuits
Xuefeng Yu, Fa Foster Dai, J. David Irwin, Richard C. Jaeger
2008 — conf
A fully integrated zero-IF mobile TV tuner RFIC for S-band CMMB application.
CICC
Yin Shi, Fa Foster Dai, Jun Yan, Hua Xu, Xuelian Zhang, Heping Ma, Fang Yuan, Xin Guan, Richard C. Jaeger
2008 — conf
An 11-bit 8.6GHz direct digital synthesizer MMIC with 10-bit segmented nonlinear DAC.
ESSCIRC
Xueyang Geng, Xuefeng Yu, Fa Foster Dai, J. David Irwin, Richard C. Jaeger
2008 — conf
An X/Ku-band frequency synthesizer using a 9-Bit quadrature DDS.
CICC
Xuefeng Yu, Fa Foster Dai, Dayu Yang, J. David Irwin, Richard C. Jaeger
2008 J jnl
Design and Analysis of a Transversal Filter RFIC in SiGe Technology.
IEEE Des. Test Comput.
Vasanth Kakani, Fa Foster Dai
2008 — conf
Session 5 - Broadband circuit techniques for emerging wireless communications.
CICC
Fa Foster Dai, Howard C. Luong
2008 — conf
Session 9 - Broadband circuit techniques for emerging wireless communications.
CICC
Fa Foster Dai, Howard C. Luong
2007 J jnl
FPGA-Based Analog Functional Measurements for Adaptive Control in Mixed-Signal Systems.
IEEE Trans. Ind. Electron.
Jie Qin, Charles E. Stroud, Fa Foster Dai
2006 J jnl
A direct digital frequency synthesizer with fourth-order phase domain ΔΣ noise shaper and 12-bit current-steering DAC.
IEEE J. Solid State Circuits
Fa Foster Dai, Weining Ni, Yin Shi, Richard C. Jaeger
2006 — conf
Delta-Sigma Modulation in Direct Digital Frequency Synthesis.
CICC
Dayu Yang, Weining Ni, Fa Foster Dai, Yin Shi, Richard C. Jaeger
2005 J jnl
A fully integrated multiband MIMO WLAN transceiver RFIC.
IEEE J. Solid State Circuits
David G. Rahn, Mark S. Cavin, Fa Foster Dai, Neric H. W. Fong, Richard Griffith, José Macedo, A. David Moore, John W. M. Rogers, Mike Toner
2003 — conf
A ΔΣ fractional-N frequency synthesizer with a multi-band PMOS VCOs for 2.4 and 5GHz WLAN applications.
ESSCIRC
John W. M. Rogers, Mark S. Cavin, Fa Foster Dai, David G. Rahn
2001 J jnl
Enabling multimedia applications for factory automation.
IEEE Trans. Ind. Electron.
Chwan-Hwa John Wu, J. David Irwin, Fa Foster Dai