Eshan Singh

17 papers A* 1A 6Misc 3Journal 6Unranked 1
YearRankTypeTitle / Venue / Authors
2025 J jnl
Pause-Tuning for Long-Context Comprehension: A Lightweight Approach to LLM Attention Recalibration.
CoRR
James Begin, Namit Agrawal, Eshan Singh, Yicheng Fu, Sean O'Brien, Vasu Sharma, Kevin Zhu
2023 A conf
LFPS: Learned Formal Proof Strengthening for Efficient Hardware Verification.
ICCAD
Minwoo Kang, Azade Nova, Eshan Singh, Geetheeka Sharron Bathini, Yuriy Viktorov
2021 J jnl
Effective Pre-Silicon Verification of Processor Cores by Breaking the Bounds of Symbolic Quick Error Detection.
CoRR
Karthik Ganesan, Florian Lonsing, Srinivasa Shashank Nuthakki, Eshan Singh, Mohammad Rahmani Fadiheh, Wolfgang Kunz, Dominik Stoffel, Clark W. Barrett, Subhasish Mitra
2020 A* conf
A-QED Verification of Hardware Accelerators.
DAC
Eshan Singh, Florian Lonsing, Saranyu Chattopadhyay, Maxwell Strange, Peng Wei, Xiaofan Zhang, Yuan Zhou, Deming Chen, Jason Cong, Priyanka Raina, Zhiru Zhang, Clark W. Barrett, Subhasish Mitra
2020 A conf
Gap-free Processor Verification by S
DATE
Keerthikumara Devarajegowda, Mohammad Rahmani Fadiheh, Eshan Singh, Clark W. Barrett, Subhasish Mitra, Wolfgang Ecker, Dominik Stoffel, Wolfgang Kunz
2019 A conf
Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study.
DATE
Eshan Singh, Keerthikumara Devarajegowda, Sebastian Simon, Ralf Schnieder, Karthik Ganesan, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz, Clark W. Barrett, Wolfgang Ecker, Subhasish Mitra
2019 J jnl
Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study.
CoRR
Eshan Singh, Keerthikumara Devarajegowda, Sebastian Simon, Ralf Schnieder, Karthik Ganesan, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz, Clark W. Barrett, Wolfgang Ecker, Subhasish Mitra
2019 A conf
Unlocking the Power of Formal Hardware Verification with CoSA and Symbolic QED: Invited Paper.
ICCAD
Florian Lonsing, Karthik Ganesan, Makai Mann, Srinivasa Shashank Nuthakki, Eshan Singh, Mario Srouji, Yahan Yang, Subhasish Mitra, Clark W. Barrett
2017 J jnl
E-QED: Electrical Bug Localization During Post-Silicon Validation Enabled by Quick Error Detection and Formal Methods.
CoRR
Eshan Singh, Clark W. Barrett, Subhasish Mitra
2017 — conf
E-QED: Electrical Bug Localization During Post-silicon Validation Enabled by Quick Error Detection and Formal Methods.
CAV (2)
Eshan Singh, Clark W. Barrett, Subhasish Mitra
2017 J jnl
Logic Bug Detection and Localization Using Symbolic Quick Error Detection.
CoRR
Eshan Singh, David Lin, Clark W. Barrett, Subhasish Mitra
2016 J jnl
Symbolic Quick Error Detection for Pre-Silicon and Post-Silicon Validation: Frequently Asked Questions.
IEEE Des. Test
Eshan Singh, David Lin, Clark W. Barrett, Subhasish Mitra
2015 A conf
A structured approach to post-silicon validation and debug using symbolic quick error detection.
ITC
David Lin, Eshan Singh, Clark W. Barrett, Subhasish Mitra
2014 Misc conf
Analytical Modeling of 3D Stacked IC Yield from Wafer to Wafer Stacking with Radial Defect Clustering.
VLSID
Eshan Singh
2014 Misc conf
Modeling location based wafer die yield variation in estimating 3D stacked IC yield from wafer to wafer stacking.
VTS
Eshan Singh
2012 A conf
Impact of Radial defect clustering on 3D stacked IC yield from wafer to wafer stacking.
ITC
Eshan Singh
2011 Misc conf
Exploiting rotational symmetries for improved stacked yields in W2W 3D-SICs.
VTS
Eshan Singh