Erya Deng

24 papers C 9Journal 9Unranked 6
YearRankTypeTitle / Venue / Authors
2025 J jnl
A Dual-Swing-Sample-and-Couple Sense Amplifier With Large Sensing Margin for STT-MRAM.
IEEE Trans. Circuits Syst. II Express Briefs
You Wang, Da Song, Jiaao Dai, Erya Deng, Yu Gong, Weiqiang Liu
2025 C conf
A High-Performance In-Memory Multi-Bit Adder Based on TST-MRAM.
ISCAS
Erya Deng, Zhongkun Shen, Yu Gong, Weiqiang Liu
2025 C conf
Exploring Teaching Methods for Courses on Radiation Hardening Technology in ICs.
ISCAS
You Wang, Erya Deng, Yu Gong, Zhongkun Shen, Chenghua Wang, Yijun Cui, Weiqiang Liu
2025 C conf
Radiation-Hardened Design of TCAM for Single-Event Upset Tolerance.
ISCAS
Jiaqi You, Erya Deng, Zhongkun Shen, You Wang, Weiqiang Liu
2024 J jnl
CiTST-AdderNets: Computing in Toggle Spin Torques MRAM for Energy-Efficient AdderNets.
IEEE Trans. Circuits Syst. I Regul. Pap.
Lichuan Luo, Erya Deng, Dijun Liu, Zhen Wang, Weiliang Huang, He Zhang, Xiao Liu, Jinyu Bai, Junzhan Liu, Youguang Zhang, Wang Kang
2022 J jnl
A Spintronic In-Memory Computing Network for Efficient Hamming Codec Implementation.
IEEE Trans. Circuits Syst. II Express Briefs
Linjun Jiang, Erya Deng, He Zhang, Zhaohao Wang, Wang Kang, Weisheng Zhao
2021 — conf
A Novel Multi-Context Non-Volatile Content-Addressable Memory Cell and Multi-Level Architecture for High Reliability and Density.
NVMSA
Xian Wang, Deming Zhang, Kaili Zhang, Erya Deng, You Wang, Weisheng Zhao
2021 C conf
A Reconfigurable Arbiter PUF Based on STT-MRAM.
ISCAS
Rashid Ali, You Wang, Haoyuan Ma, Zhengyi Hou, Deming Zhang, Erya Deng, Weisheng Zhao
2021 C conf
Fully Single Event Double Node Upset Tolerant Design for Magnetic Random Access Memory.
ISCAS
Deming Zhang, Xian Wang, Kaili Zhang, Lang Zeng, You Wang, Bi Wang, Erya Deng, Chuanjie Wang, Peng Wu, Youguang Zhang, Weisheng Zhao
2021 C conf
HSC: A Hybrid Spin/CMOS Logic Based In-Memory Engine with Area-Efficient Mapping Strategy.
ISCAS
Yan Huang, Erya Deng, Jinyu Bai, Qing Yang, Wang Kang, Biao Pan
2021 C conf
Spin-Orbit Torque Nonvolatile Flip-Flop Designs.
ISCAS
Erya Deng, Wang Kang, Weisheng Zhao, Shaoqian Wei, You Wang, Deming Zhang
2021 C conf
SpinSim: A Computer Architecture-Level Variation Aware STT-MRAM Performance Evaluation Framework.
ISCAS
Haoyuan Ma, You Wang, Rashid Ali, Zhengyi Hou, Deming Zhang, Erya Deng, Gefei Wang, Weisheng Zhao
2019 J jnl
A Novel MTJ-Based Non-Volatile Ternary Content-Addressable Memory for High-Speed, Low-Power, and High-Reliable Search Operation.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chengzhi Wang, Deming Zhang, Lang Zeng, Erya Deng, Jie Chen, Weisheng Zhao
2018 J jnl
A high-reliability and low-power computing-in-memory implementation within STT-MRAM.
Microelectron. J.
Liuyang Zhang, Erya Deng, Hao Cai, You Wang, Lionel Torres, Aida Todri-Sanial, Youguang Zhang
2018 — conf
High-Density and Fast-Configuration Non-Volatile Look-Up Table Based on NAND-Like Spintronic Memory.
APCCAS
He Zhang, Wang Kang, Zhaohao Wang, Erya Deng, Youguang Zhang, Weisheng Zhao
2018 C conf
Multi-bit nonvolatile flip-flop based on NAND-like spin transfer torque MRAM.
VLSI-SoC
Erya Deng, Zhaohao Wang, Wang Kang, Shaoqian Wei, Weisheng Zhao
2016 — conf
Multi-context non-volatile content addressable memory using magnetic tunnel junctions.
NANOARCH
Erya Deng, Lorena Anghel, Guillaume Prenat, Weisheng Zhao
2015 — conf
Robust magnetic full-adder with voltage sensing 2T/2MTJ cell.
NANOARCH
Erya Deng, You Wang, Zhaohao Wang, Jacques-Olivier Klein, Bernard Dieny, Guillaume Prenat, Weisheng Zhao
2015 J jnl
Synchronous 8-bit Non-Volatile Full-Adder based on Spin Transfer Torque Magnetic Tunnel Junction.
IEEE Trans. Circuits Syst. I Regul. Pap.
Erya Deng, Yue Zhang, Wang Kang, Bernard Dieny, Jacques-Olivier Klein, Guillaume Prenat, Weisheng Zhao
2014 J jnl
Compact model of magnetic tunnel junction with stochastic spin transfer torque switching for reliability analyses.
Microelectron. Reliab.
You Wang, Yue Zhang, Erya Deng, Jacques-Olivier Klein, Lirida A. B. Naviner, Weisheng Zhao
2014 J jnl
Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories.
IEEE Trans. Circuits Syst. I Regul. Pap.
Weisheng Zhao, Mathieu Moreau, Erya Deng, Yue Zhang, Jean-Michel Portal, Jacques-Olivier Klein, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Damien Querlioz, Nesrine Ben Romdhane, Dafine Ravelosona, Claude Chappert
2014 J jnl
Ultra Low Power Magnetic Flip-Flop Based on Checkpointing/Power Gating and Self-Enable Mechanisms.
IEEE Trans. Circuits Syst. I Regul. Pap.
Djaafar Chabi, Weisheng Zhao, Erya Deng, Yue Zhang, Nesrine Ben Romdhane, Jacques-Olivier Klein, Claude Chappert
2013 — conf
Analytical study of complementary memristive synchronous logic gates.
NANOARCH
Jean-Michel Portal, Mathieu Moreau, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Yue Zhang, Erya Deng, Jacques-Olivier Klein, Damien Querlioz, Dafine Ravelosona, Claude Chappert, Weisheng Zhao
2013 — conf
Synchronous full-adder based on complementary resistive switching memory cells.
NEWCAS
Yue Zhang, Erya Deng, Jacques-Olivier Klein, Damien Querlioz, Dafine Ravelosona, Claude Chappert, Weisheng Zhao, Mathieu Moreau, Jean-Michel Portal, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller