Eros Camacho-Ruiz

18 papers C 2Journal 6Unranked 10
YearRankTypeTitle / Venue / Authors
2026 J jnl
Hardware-Rooted Device Identity for IoT: Integrating Silicon PUFs and DICE in RISC-V Embedded Systems.
IEEE Access
Silvia Sisinni, Lorenzo Ferro, Enrico Bravi, Pablo Navarro-Torrero, Eros Camacho-Ruiz, Macarena C. Martínez-Rodríguez, Piedad Brox, Antonio Lioy
2025 J jnl
A Side-Channel Protected and High-Performance Hardware Implementation for EdDSA25519.
IEEE Access
Pablo Navarro-Torrero, Eros Camacho-Ruiz, Macarena C. Martínez-Rodríguez, Piedad Brox Jiménez
2025 C conf
Optimizing Secure Elements Implementation Methods for a seamless Post-Quantum Transition.
ISCC
Eros Camacho-Ruiz, Pablo Navarro-Torrero, Macarena C. Martínez-Rodríguez, Piedad Brox
2024 — conf
Cryptographic Security Through a Hardware Root of Trust.
ARC
Luis F. Rojas-Muñoz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, Eros Camacho-Ruiz, Pablo Navarro-Torrero, Apurba Karmakar, Carlos Fernández García, Erica Tena-Sánchez, Francisco Eugenio Potestad-Ordóñez, Alejandro Casado-Galán, Pau Ortega-Castro, Antonio Acosta-Jiménez, Carlos Jesús Jiménez-Fernández, Piedad Brox
2024 — conf
Design of a Karatsuba Multiplier to Accelerate Digital Signature Schemes on Embedded Systems.
NorCAS
Pablo Navarro-Torrero, Eros Camacho-Ruiz, Macarena C. Martínez-Rodríguez, Piedad Brox
2023 — conf
A Peak Detect & Hold circuit to measure and exploit RTN in a 65-nm CMOS PUF.
SMACD
F. J. Rubio-Barbero, Eros Camacho-Ruiz, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
2023 — conf
A Simple Power Analysis of an FPGA implementation of a polynomial multiplier for the NTRU cryptosystem.
DCIS
Eros Camacho-Ruiz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, Erica Tena-Sánchez, Piedad Brox
2023 — conf
A complete SHA-3 hardware library based on a high efficiency Keccak design.
NorCAS
Eros Camacho-Ruiz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, Piedad Brox
2023 — conf
Design considerations for a CMOS 65-nm RTN-based PUF.
SMACD
Eros Camacho-Ruiz, F. J. Rubio-Barbero, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
2023 J jnl
Timing-Attack-Resistant Acceleration of NTRU Round 3 Encryption on Resource-Constrained Embedded Systems.
Cryptogr.
Eros Camacho-Ruiz, Macarena C. Martínez-Rodríguez, Santiago Sánchez-Solano, Piedad Brox
2022 C conf
A novel Physical Unclonable Function using RTN.
ISCAS
Eros Camacho-Ruiz, Rafael Castro-López, Elisenda Roca, Piedad Brox, Francisco V. Fernández
2022 J jnl
Efficient RO-PUF for Generation of Identifiers and Keys in Resource-Constrained Embedded Systems.
Cryptogr.
Macarena C. Martínez-Rodríguez, Luis F. Rojas-Muñoz, Eros Camacho-Ruiz, Santiago Sánchez-Solano, Piedad Brox
2022 — conf
High-level design of a novel PUF based on RTN.
SMACD
Eros Camacho-Ruiz, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
2022 J jnl
Multi-Unit Serial Polynomial Multiplier to Accelerate NTRU-Based Cryptographic Schemes in IoT Embedded Systems.
Sensors
Santiago Sánchez-Solano, Eros Camacho-Ruiz, Macarena C. Martínez-Rodríguez, Piedad Brox
2022 — conf
On the use of an RTN simulator to explore the quality trade-offs of a novel RTN-based PUF.
SMACD
Eros Camacho-Ruiz, Andrés Santana-Andreo, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
2021 — conf
Design Flow to Evaluate the Performance of Ring Oscillator PUFs on FPGAs.
DCIS
Macarena C. Martínez-Rodríguez, Eros Camacho-Ruiz, Santiago Sánchez-Solano, Piedad Brox
2021 J jnl
Timing-Optimized Hardware Implementation to Accelerate Polynomial Multiplication in the NTRU Algorithm.
ACM J. Emerg. Technol. Comput. Syst.
Eros Camacho-Ruiz, Santiago Sánchez-Solano, Piedad Brox, Macarena C. Martínez-Rodríguez
2020 — conf
Accelerating the Development of NTRU Algorithm on Embedded Systems.
DCIS
Eros Camacho-Ruiz, Macarena C. Martínez-Rodríguez, Santiago Sánchez-Solano, Piedad Brox