Ernst G. Ulrich

23 papers A* 8A 4Journal 7Unranked 3
YearRankTypeTitle / Venue / Authors
1994 — book
Concurrent and comparative discrete event simulation.
Ernst G. Ulrich, Vishwani D. Agrawal, Jack H. Arabian
1993 J jnl
Clock suppression techniques for synchronous circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Rahul Razdan, Gabriel P. Bischoff, Ernst G. Ulrich
1992 J jnl
The Comparative and Concurrent Simulation of discrete-event experiments.
J. Electron. Test.
Ernst G. Ulrich, Karen Lentz, Jack H. Arabian, Michael Gustin, Vishwani D. Agrawal, Pier Luca Montessoro
1991 — conf
Concurrent MIN-MAX simulation.
EURO-DAC
Ernst G. Ulrich, Karen Panetta Lentz, Stephen R. Demba, Rahul Razdan
1990 J jnl
Experiences with concurrent fault simulation of diagnostic programs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Stephen R. Demba, Ernst G. Ulrich, Karen Panetta Lentz, David Giramma
1990 A conf
Exploitation of Periodicity in Logic Simulation of Synchronous Circuits.
ICCAD
Rahul Razdan, Gabriel P. Bischoff, Ernst G. Ulrich
1988 A conf
Experiences with Concurrent Fault Simulation of Diagnostic Programs.
ITC
Stephen R. Demba, Ernst G. Ulrich, Karen Panetta, David Giramma
1988 A conf
Switch-Level Concurrent Fault Simulation Based on a General Purpose List Traversal Mechanism.
ITC
Deborah Machlin, David Gross, Sudhir Kadkade, Ernst G. Ulrich
1987 J jnl
Advances in Concurrent Multilevel Simulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Silvano Gai, Fabio Somenzi, Ernst G. Ulrich
1985 A conf
Concurrent Simulation at the Switch, Gate, and Register Levels.
ITC
Ernst G. Ulrich
1983 A* conf
A design verification methodology based on concurrent simulation and clock suppression.
DAC
Ernst G. Ulrich
1982 A* conf
Speed and accuracy in digital network simulation based on structural modeling.
DAC
Ernst G. Ulrich, Dennis Hebert
1980 A* conf
High-speed concurrent fault simulation with vectors and scalars.
DAC
Ernst G. Ulrich, D. Lacy, N. Phillips, J. Tellier, M. Kearney, T. Elkind, R. Beaven
1980 A* conf
Table lookup techniques for fast and flexible digital logic simulation.
DAC
Ernst G. Ulrich
1978 J jnl
Event Manipulation for Discrete Simulations Requiring Large Numbers of Events.
Commun. ACM
Ernst G. Ulrich
1975 A* conf
Random test generation using concurrent logic simulation.
DAC
Donald M. Schuler, Ernst G. Ulrich, Thomas E. Baker, Susan P. Bryant
1974 J jnl
Concurrent simulation of nearly identical digital networks.
Computer
Ernst G. Ulrich, Thomas E. Baker
1973 A* conf
The concurrent simulation of nearly identical digital networks.
DAC
Ernst G. Ulrich, Thomas E. Baker
1972 A* conf
Clustering and linear placement.
DAC
Donald M. Schuler, Ernst G. Ulrich
1972 A* conf
Fault-test analysis techniques based on logic simulation.
DAC
Ernst G. Ulrich, Thomas E. Baker, L. R. Williams
1969 J jnl
Exclusive simulation of activity in digital networks.
Commun. ACM
Ernst G. Ulrich
1968 — conf
Serial/parallel event scheduling for the simulation of large systems.
ACM National Conference
Ernst G. Ulrich
1965 — conf
Programming languages for non-numeric processing - 2: Time sequenced logical simulation based on circuit delay and selective tracing of active network paths.
ACM National Conference
Ernst G. Ulrich