Erik Larsson - RankMe

122 papers A 24B 14C 9Misc 7Journal 33Unranked 33

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	Embedded Tutorial: Security in Reconfigurable Scan Networks. LATS Joel Åhlund, Markus Törmänen, Erik Larsson
2025	J	`jnl`	CRPS-LAM: Regional ensemble weather forecasting from matching marginals. CoRR Erik Larsson, Joel Oskarsson, Tomas Landelius, Fredrik Lindsten
2025	J	`jnl`	DAISI: Data Assimilation with Inverse Sampling using Stochastic Interpolants. CoRR Martin Andrae, Erik Larsson, So Takao, Tomas Landelius, Fredrik Lindsten
2025	J	`jnl`	Diffusion-LAM: Probabilistic Limited Area Weather Forecasting with Diffusion. CoRR Erik Larsson, Joel Oskarsson, Tomas Landelius, Fredrik Lindsten
2025	—	`conf`	Large Language Models for Printed Circuit Board Test Generation. LATS Albin Lidbäck, Erik Larsson
2025	A	`conf`	Secure and Efficient Sharing of On-Chip Resources. ITC Joel Åhlund, Markus Törmänen, Erik Larsson
2025	B	`conf`	Securing Reconfigurable Scan Networks Against Data Sniffing and Data Alteration Attacks. ETS Joel Åhlund, Markus Törmänen, Mikael Kerttu, Pamela Svensson, Torbjörn Månefjord, Christian Johansson, Erik Larsson
2025	C	`conf`	Securing the Control of Digital Beamforming. IOLTS Love Barany, William Eriksson, Joel Åhlund, Daniel Bakic, Erik Larsson, Joakim Axmon, Markus Törmänen
2024	—	`conf`	Embedded Tutorial: Access to On-chip Instruments via Functional Ports. LATS Erik Larsson
2024	J	`jnl`	Improving Relational Database Interactions with Large Language Models: Column Descriptions and Their Impact on Text-to-SQL Performance. CoRR Niklas Wretblad, Oskar Holmström, Erik Larsson, Axel Wiksäter, Oscar Söderlund, Hjalmar Öhman, Ture Pontén, Martin Forsberg, Martin Sörme, Fredrik Heintz
2024	J	`jnl`	On Modeling and Detecting Trojans in Instruction Sets. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ying Zhang, Aodi He, Jiaying Li, Ahmed Rezine, Zebo Peng, Erik Larsson, Tao Yang, Jianhui Jiang, Huawei Li
2023	—	`conf`	Co-optimization of security and accessibility to on-chip instruments. LATS Erik Larsson
2022	A	`conf`	Reusing IEEE 1687-Compatible Instruments and Sub-Networks over a System Bus. ITC Farrokh Ghani Zadegan, Zilin Zhang, Kim Petersén, Erik Larsson
2021	A	`conf`	Accessing general IEEE Std. 1687 networks via functional ports. ITC Erik Larsson, Prathamesh Murali, Ziling Zhang
2021	J	`jnl`	Graceful Degradation of Reconfigurable Scan Networks. IEEE Trans. Very Large Scale Integr. Syst. Erik Larsson, Zehang Xiang, Prathamesh Murali
2021	B	`conf`	System-Level Access to On-Chip Instruments. ETS Erik Larsson, Shashi Kiran Gangaraju, Prathamesh Murali
2020	J	`jnl`	Analyses of non-coding somatic drivers in 2,658 cancer whole genomes. Nat. Esther Rheinbay, Morten Muhlig Nielsen, Federico Abascal, Jeremiah Wala, Ofer Shapira, Grace Tiao, Henrik Hornshøj, Julian M. Hess, Randi Istrup Juul, Ziao Lin, Lars Feuerbach, Radhakrishnan Sabarinathan, Tobias Madsen, Jaegil Kim, Loris Mularoni, Shimin Shuai, Andrés Lanzós, Carl Herrmann, Yosef E. Maruvka, Ciyue Shen, Samirkumar B. Amin, Pratiti Bandopadhayay, Johanna Bertl, Keith A. Boroevich, John Busanovich, Joana Carlevaro-Fita, Dimple Chakravarty, Calvin Wing Yiu Chan, David Craft, Priyanka Dhingra, Klev Diamanti, Nuno A. Fonseca, Abel González-Pérez, Qianyun Guo, Mark P. Hamilton, Nicholas J. Haradhvala, Chen Hong, Keren Isaev, Todd A. Johnson, Malene Juul, André Kahles, Abdullah Kahraman, Youngwook Kim, Jan Komorowski, Kiran Kumar, Sushant Kumar, Donghoon Lee, Kjong-Van Lehmann, Yilong Li, Eric Minwei Liu, Lucas Lochovsky, Keunchil Park, Oriol Pich, Nicola D. Roberts, Gordon Saksena, Steven E. Schumacher, Nikos Sidiropoulos, Lina Sieverling, Nasa Sinnott-Armstrong, Chip Stewart, David Tamborero, Jose M. C. Tubio, Husen M. Umer, Liis Uusküla-Reimand, Claes Wadelius, Lina Wadi, Xiaotong Yao, Cheng-Zhong Zhang, Jing Zhang, James E. Haber, Asger Hobolth, Marcin Imielinski, Manolis Kellis, Michael S. Lawrence, Christian von Mering, Hidewaki Nakagawa, Benjamin J. Raphael, Mark A. Rubin, Chris Sander, Lincoln D. Stein, Joshua M. Stuart, Tatsuhiko Tsunoda, David A. Wheeler, Rory Johnson, Jüri Reimand, Mark Gerstein, Ekta Khurana, Peter J. Campbell, Núria López-Bigas, Gary D. Bader, Jonathan Barenboim, Rameen Beroukhim, Søren Brunak, Ken Chen, Jung Kyoon Choi, Jordi Deu-Pons, J. Lynn Fink, Joan Frigola, Carlo Gambacorti Passerini, Dale W. Garsed, Gad Getz, Ivo Glynne Gut, David Haan, Arif Ozgun Harmanci, Mohamed Helmy, Ermin Hodzic, José M. G. Izarzugaza, Jong K. Kim, Jan O. Korbel, Erik Larsson, Shantao Li, Xiaotong Li, Shaoke Lou, Kathleen Marchal, Iñigo Martincorena, Alexander Martínez-Fundichely, Patrick D. McGillivray, William Meyerson, Ferran Muiños, Marta Paczkowska, Kiejung Park, Jakob Skou Pedersen, Tirso Pons, Sergio Pulido-Tamayo, Iker Reyes-Salazar, Matthew A. Reyna, Carlota Rubio-Perez, Süleyman Cenk Sahinalp, Leonidas Salichos, Mark Shackleton, Raunak Shrestha, Alfonso Valencia, Miguel Vazquez, Lieven P. C. Verbeke, Jiayin Wang, Jonathan Warrell, Sebastian M. Waszak, Joachim Weischenfeldt, Guanming Wu, Jun Yu, Xuanping Zhang, Yan Zhang, Zhongming Zhao, Lihua Zou, Kadir C. Akdemir, Eva G. Alvarez, Adrian Baez-Ortega, Paul C. Boutros, David D. L. Bowtell, Benedikt Brors, Kathleen H. Burns, Kin Chan, Isidro Cortés-Ciriano, Ana Dueso-Barroso, Andrew J. Dunford, Paul A. Edwards, Xavier Estivill, Dariush Etemadmoghadam, Milana Frenkel-Morgenstern, Dmitry A. Gordenin, Barbara Hutter, David T. W. Jones, Young Seok Ju, Marat D. Kazanov, Leszek J. Klimczak, Youngil Koh, Eunjung Alice Lee, Jake June-Koo Lee, Andy G. Lynch, Geoff MacIntyre, Florian Markowetz, Matthew Meyerson, Satoru Miyano, Fabio C. P. Navarro, Stephan Ossowski, Peter J. Park, John V. Pearson, Montserrat Puiggròs, Karsten Rippe, Steven A. Roberts, Bernardo Rodriguez-Martin, Ralph Scully, David Torrents, Izar Villasante, Nicola Waddell, Jeremiah A. Wala, Lixing Yang, Sung-Soo Yoon, Jorge Zamora
2020	—	`conf`	Enabling Image Recognition on Constrained Devices Using Neural Network Pruning and a CycleGAN. IOT Companion August Lidfeldt, Daniel Isaksson, Ludwig Hedlund, Simon Åberg, Markus Borg, Erik Larsson
2020	J	`jnl`	Enabling Image Recognition on Constrained Devices Using Neural Network Pruning and a CycleGAN. CoRR August Lidfeldt, Daniel Isaksson, Ludwig Hedlund, Simon Åberg, Markus Borg, Erik Larsson
2020	B	`conf`	IEEE Std. P1687.1 for Access Control of Reconfigurable Scan Networks. ETS Erik Larsson, Zehang Xiang, Prathamesh Murali
2019	A	`conf`	IEEE Std. P1687.1: Translator and Protocol. ITC Erik Larsson, Prathamesh Murali, Gani Kumisbek
2019	J	`jnl`	Test Flow Selection for Stacked Integrated Circuits. J. Electron. Test. Breeta SenGupta, Dimitar Nikolov, Assmitra Dash, Erik Larsson
2018	J	`jnl`	On-Chip Fault Monitoring Using Self-Reconfiguring IEEE 1687 Networks. IEEE Trans. Computers Farrokh Ghani Zadegan, Dimitar Nikolov, Erik Larsson
2018	J	`jnl`	Test of Reconfigurable Modules in Scan Networks. IEEE Trans. Computers Riccardo Cantoro, Farrokh Ghani Zadegan, Marco Palena, Paolo Pasini, Erik Larsson, Matteo Sonza Reorda
2017	A	`conf`	BASTION: Board and SoC test instrumentation for ageing and no failure found. DATE Artur Jutman, Christophe Lotz, Erik Larsson, Matteo Sonza Reorda, Maksim Jenihhin, Jaan Raik, Hans G. Kerkhoff, Rene Krenz-Baath, Piet Engelke
2017	J	`jnl`	Clustered checkpointing: Maximizing the level of confidence for non-equidistant checkpointing. Integr. Dimitar Nikolov, Erik Larsson
2017	J	`jnl`	Editorial. IEEE Trans. Very Large Scale Integr. Syst. Krishnendu Chakrabarty, Massimo Alioto, Bevan M. Baas, Chirn Chye Boon, Meng-Fan Chang, Naehyuck Chang, Yao-Wen Chang, Chip-Hong Chang, Shih-Chieh Chang, Poki Chen, Masud H. Chowdhury, Pasquale Corsonello, Ibrahim Abe M. Elfadel, Said Hamdioui, Masanori Hashimoto, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Rajiv V. Joshi, Tanay Karnik, Mehran Mozaffari Kermani, Chulwoo Kim, Tae-Hyoung Kim, Jaydeep P. Kulkarni, Eren Kursun, Erik Larsson, Hai (Helen) Li, Huawei Li, Patrick P. Mercier, Prabhat Mishra, Makoto Nagata, Arun S. Natarajan, Koji Nii, Partha Pratim Pande, Ioannis Savidis, Mingoo Seok, Sheldon X.-D. Tan, Mark Tehranipoor, Aida Todri-Sanial, Miroslav N. Velev, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Stacey Weber Jackson
2017	J	`jnl`	Test Planning for Core-based Integrated Circuits under Power Constraints. J. Electron. Test. Breeta SenGupta, Dimitar Nikolov, Urban Ingelsson, Erik Larsson
2016	B	`conf`	A self-reconfiguring IEEE 1687 network for fault monitoring. ETS Farrokh Ghani Zadegan, Dimitar Nikolov, Erik Larsson
2016	A	`conf`	A suite of IEEE 1687 benchmark networks. ITC Anton Tsertov, Artur Jutman, Sergei Devadze, Matteo Sonza Reorda, Erik Larsson, Farrokh Ghani Zadegan, Riccardo Cantoro, Mehrdad Montazeri, Rene Krenz-Baath
2016	—	`conf`	Accessing on-chip instruments through the life-time of systems. LATS Erik Larsson, Farrokh Ghani Zadegan
2016	C	`conf`	Automatic generation of stimuli for fault diagnosis in IEEE 1687 networks. IOLTS Riccardo Cantoro, Mehrdad Montazeri, Matteo Sonza Reorda, Farrokh Ghani Zadegan, Erik Larsson
2016	B	`conf`	Compressor design for silicon debug. ETS Jing Zhang, Lars-Johan Fritz, Liang Liu, Erik Larsson
2016	—	`conf`	In-field system-health monitoring based on IEEE 1687. SoCC Farrokh Ghani Zadegan, Dimitar Nikolov, Erik Larsson
2016	—	`conf`	Maximizing level of confidence for non-equidistant Checkpointing. ASP-DAC Dimitar Nikolov, Erik Larsson
2016	B	`conf`	On the diagnostic analysis of IEEE 1687 networks. ETS Riccardo Cantoro, Mehrdad Montazeri, Matteo Sonza Reorda, Farrokh Ghani Zadegan, Erik Larsson
2016	J	`jnl`	Optimizing the Level of Confidence for Multiple Jobs. IEEE Trans. Computers Dimitar Nikolov, Erik Larsson
2016	A	`conf`	Upper-bound computation for optimal retargeting in IEEE1687 networks. ITC Farrokh Ghani Zadegan, Rene Krenz-Baath, Erik Larsson
2015	J	`jnl`	Abort-on-Fail Test Scheduling for Modular SOCs without and with Preemption. IEEE Trans. Computers Urban Ingelsson, Sandeep Kumar Goel, Erik Larsson, Erik Jan Marinissen
2015	A	`conf`	Access time minimization in IEEE 1687 networks. ITC Rene Krenz-Baath, Farrokh Ghani Zadegan, Erik Larsson
2015	Misc	`conf`	No Fault Found: The root cause. VTS Erik Larsson, Bill Eklow, Scott Davidsson, Rob Aitken, Artur Jutman, Christophe Lotz
2015	—	`conf`	On the testability of IEEE 1687 networks. ATS Riccardo Cantoro, Mehrdad Montazeri, Matteo Sonza Reorda, Farrokh Ghani Zadegan, Erik Larsson
2014	—	`conf`	Design, Verification, and Application of IEEE 1687. ATS Farrokh Ghani Zadegan, Erik Larsson, Artur Jutman, Sergei Devadze, Rene Krenz-Baath
2014	J	`jnl`	Evaluation of Level of Confidence and Optimization of Roll-back Recovery with Checkpointing for Real-Time Systems. Microelectron. Reliab. Dimitar Nikolov, Urban Ingelsson, Virendra Singh, Erik Larsson
2014	C	`conf`	Fault injection and fault handling: An MPSoC demonstrator using IEEE P1687. IOLTS Kim Petersén, Dimitar Nikolov, Urban Ingelsson, Gunnar Carlsson, Farrokh Ghani Zadegan, Erik Larsson
2014	A	`conf`	Robustness of TAP-based scan networks. ITC Farrokh Ghani Zadegan, Gunnar Carlsson, Erik Larsson
2014	Misc	`conf`	Test planning and test access mechanism design for stacked chips using ILP. VTS Breeta SenGupta, Erik Larsson
2013	Misc	`conf`	Special session 9B: Embedded tutorial embedded DfT instrumentation: Design, access, retargeting and case studies. VTS Erik Larsson
2012	J	`jnl`	Access Time Analysis for IEEE P1687. IEEE Trans. Computers Farrokh Ghani Zadegan, Urban Ingelsson, Gunnar Carlsson, Erik Larsson
2012	—	`conf`	Accessing Embedded DfT Instruments with IEEE P1687. Asian Test Symposium Erik Larsson, Farrokh Ghani Zadegan
2012	C	`conf`	Fault management in an IEEE P1687 (IJTAG) environment. DDECS Erik Larsson, Konstantin Sibin
2012	B	`conf`	Re-using chip level DFT at board level. ETS Xinli Gu, Jeff Rearick, Bill Eklow, Martin Keim, Jun Qian, Artur Jutman, Krishnendu Chakrabarty, Erik Larsson
2012	J	`jnl`	Reusing and Retargeting On-Chip Instrument Access Procedures in IEEE P1687. IEEE Des. Test Comput. Farrokh Ghani Zadegan, Urban Ingelsson, Erik Larsson, Gunnar Carlsson
2012	J	`jnl`	Scheduling Tests for 3D Stacked Chips under Power Constraints. J. Electron. Test. Breeta SenGupta, Urban Ingelsson, Erik Larsson
2012	Misc	`conf`	Test Planning for Core-based 3D Stacked ICs with Through-Silicon Vias. VLSI Design Breeta SenGupta, Urban Ingelsson, Erik Larsson
2012	J	`jnl`	miRcode: a map of putative microRNA target sites in the long non-coding transcriptome. Bioinform. Ashwini Jeggari, Debora S. Marks, Erik Larsson
2011	C	`conf`	Adaptive execution assistance for multiplexed fault-tolerant chip multiprocessors. ICCD Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson
2011	A	`conf`	Design automation for IEEE P1687. DATE Farrokh Ghani Zadegan, Urban Ingelsson, Gunnar Carlsson, Erik Larsson
2011	—	`conf`	Level of confidence evaluation and its usage for Roll-back Recovery with Checkpointing optimization. DSN Workshops Dimitar Nikolov, Urban Ingelsson, Virendra Singh, Erik Larsson
2011	C	`conf`	Measurement point selection for in-operation wear-out monitoring. DDECS Urban Ingelsson, Shih-Yen Chang, Erik Larsson
2011	—	`conf`	Scheduling Tests for 3D Stacked Chips under Power Constraints. DELTA Breeta SenGupta, Urban Ingelsson, Erik Larsson
2011	—	`conf`	Test Scheduling in an IEEE P1687 Environment with Resource and Power Constraints. Asian Test Symposium Farrokh Ghani Zadegan, Urban Ingelsson, Golnaz Asani, Gunnar Carlsson, Erik Larsson
2010	—	`ed.`	5th International ICST Conference on Cognitive Radio Oriented Wireless Networks and Communications, CROWNCOM 2010, Cannes, France, June 9-11, 2010 CROWNCOM Erik Larsson, Aawatif Hayar
2010	B	`conf`	A distributed architecture to check global properties for post-silicon debug. ETS Erik Larsson, Bart Vermeulen, Kees Goossens
2010	—	`conf`	Efficient Embedding of Deterministic Test Data. Asian Test Symposium Mudassar Majeed, Daniel Ahlstrom, Urban Ingelsson, Gunnar Carlsson, Erik Larsson
2010	A	`conf`	Energy-efficient fault tolerance in chip multiprocessors using Critical Value Forwarding. DSN Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson
2010	—	`conf`	Energy-efficient redundant execution for chip multiprocessors. ACM Great Lakes Symposium on VLSI Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson
2010	—	`conf`	Estimating Error-probability and its Application for Optimizing Roll-back Recovery with Checkpointing. DELTA Dimitar Nikolov, Urban Ingelsson, Virendra Singh, Erik Larsson
2010	—	`conf`	Graph theoretic approach for scan cell reordering to minimize peak shift power. ACM Great Lakes Symposium on VLSI Jaynarayan T. Tudu, Erik Larsson, Virendra Singh, Hideo Fujiwara
2010	A	`conf`	Multiplexed redundant execution: A technique for efficient fault tolerance in chip multiprocessors. DATE Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson
2010	B	`conf`	Scan cell reordering to minimize peak power during test cycle: A graph theoretic approach. ETS Jaynarayan T. Tudu, Erik Larsson, Virendra Singh, Hideo Fujiwara
2010	—	`conf`	Test Time Analysis for IEEE P1687. Asian Test Symposium Farrokh Ghani Zadegan, Urban Ingelsson, Gunnar Carlsson, Erik Larsson
2010	—	`conf`	Thermal aware test scheduling for stacked multi-chip-modules. EWDTS N. S. Vinay, Indira Rawat, Erik Larsson, Manoj Singh Gaur, Virendra Singh
2009	A	`conf`	Fault-tolerant average execution time optimization for general-purpose multi-processor system-on-chips. DATE Mikael Väyrynen, Virendra Singh, Erik Larsson
2009	B	`conf`	On Minimization of Peak Power for Scan Circuit during Test. ETS Jaynarayan T. Tudu, Erik Larsson, Virendra Singh, Vishwani D. Agrawal
2009	—	`conf`	On Scan Chain Diagnosis for Intermittent Faults. Asian Test Symposium Dan Adolfsson, Joanna Siew, Erik Jan Marinissen, Erik Larsson
2008	J	`jnl`	A Reconfigurable Power Conscious Core Wrapper and its Application to System-on-Chip Test Scheduling. J. Electron. Test. Erik Larsson, Zebo Peng
2008	J	`jnl`	Architecture for integrated test data compression and abort-on-fail testing in a multi-site environment. IET Comput. Digit. Tech. Erik Larsson
2008	—	`conf`	Core-Level Compression Technique Selection and SOC Test Architecture Design. ATS Anders Larsson, Xin Zhang, Erik Larsson, Krishnendu Chakrabarty
2008	J	`jnl`	Cycle-Accurate Test Power Modeling and Its Application to SoC Test Architecture Design and Scheduling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Soheil Samii, Mikko Selkälä, Erik Larsson, Krishnendu Chakrabarty, Zebo Peng
2008	A	`conf`	SOC Test Optimization with Compression-Technique Selection. ITC Anders Larsson, Xin Zhang, Erik Larsson, Krishnendu Chakrabarty
2008	A	`conf`	Test-Architecture Optimization and Test Scheduling for SOCs with Core-Level Expansion of Compressed Test Patterns. DATE Anders Larsson, Erik Larsson, Krishnendu Chakrabarty, Petru Eles, Zebo Peng
2007	C	`conf`	A Heuristic for Concurrent SOC Test Scheduling with Compression and Sharing. DDECS Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
2007	—	`conf`	An Architecture for Combined Test Data Compression and Abort-on-Fail Test. ASP-DAC Erik Larsson, Jon Persson
2007	J	`jnl`	HeliCis: a DNA motif discovery tool for colocalized motif pairs with periodic spacing. BMC Bioinform. Erik Larsson, Per Lindahl, Petter Mostad
2007	A	`conf`	Optimized integration of test compression and sharing for SOC testing. DATE Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
2007	A	`conf`	Protocol requirements in an SJTAG/IJTAG environment. ITC Gunnar Carlsson, Johan Holmqvist, Erik Larsson
2007	J	`jnl`	Test data truncation for test quality maximisation under ATE memory depth constraint. IET Comput. Digit. Tech. Erik Larsson, Stina Edbom
2007	A	`conf`	Test quality analysis and improvement for an embedded asynchronous FIFO. DATE Tobias Dubois, Erik Jan Marinissen, Mohamed Azimane, Paul Wielage, Erik Larsson, Clemens Wouters
2007	B	`conf`	What impacts course evaluation? ITiCSE Erik Larsson, Mehdi Amirijoo, Daniel Karlsson, Petru Eles
2006	A	`conf`	Cycle-Accurate Test Power Modeling and its Application to SoC Test Scheduling. ITC Soheil Samii, Erik Larsson, Krishnendu Chakrabarty, Zebo Peng
2006	J	`jnl`	Power-Aware Test Planning in the Early System-on-Chip Design Exploration Process. IEEE Trans. Computers Erik Larsson, Zebo Peng
2006	J	`jnl`	System-on-chip test scheduling with reconfigurable core wrappers. IEEE Trans. Very Large Scale Integr. Syst. Erik Larsson, Hideo Fujiwara
2005	J	`jnl`	Abort-on-Fail Based Test Scheduling. J. Electron. Test. Erik Larsson, Julien Pouget, Zebo Peng
2005	C	`conf`	Combined Test Data Selection and Scheduling for Test Quality Optimization under ATE Memory Depth Constraint. VLSI-SoC Erik Larsson, Stina Edbom
2005	J	`jnl`	Multiple-Constraint Driven System-on-Chip Test Time Optimization. J. Electron. Test. Julien Pouget, Erik Larsson, Zebo Peng
2005	C	`conf`	Optimization of a Bus-based Test Data Transportation Mechanism in System-on-Chip. DSD Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
2005	A	`conf`	Remote boundary-scan system test control for the ATCA standard. ITC David Bäckström, Gunnar Carlsson, Erik Larsson
2005	—	`conf`	SOC Test Scheduling with Test Set Sharing and Broadcasting. Asian Test Symposium Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
2005	B	`conf`	Test scheduling for modular SOCs in an abort-on-fail environment. ETS Urban Ingelsson, Sandeep Kumar Goel, Erik Larsson, Erik Jan Marinissen
2004	—	`conf`	An Integrated Technique for Test Vector Selection and Test Scheduling under Test Time Constraint. Asian Test Symposium Stina Edbom, Erik Larsson
2004	Misc	`conf`	Defect-Aware SOC Test Scheduling. VTS Erik Larsson, Julien Pouget, Zebo Peng
2004	J	`jnl`	Efficient test solutions for core-based designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Erik Larsson, Klas Arvidsson, Hideo Fujiwara, Zebo Peng
2004	A	`conf`	Integrating Core Selection in the SOC Test Solution Design-Flow. ITC Erik Larsson
2004	J	`jnl`	Preemptive System-on-Chip Test Scheduling. IEICE Trans. Inf. Syst. Erik Larsson, Hideo Fujiwara
2004	B	`conf`	Student-oriented examination in a computer architecture course. ITiCSE Erik Larsson, Anders Larsson
2003	A	`conf`	A Reconfigurable Power-Conscious Core Wrapper and its Application to SOC Test Scheduling. ITC Erik Larsson, Zebo Peng
2003	—	`conf`	An efficient approach to SoC wrapper design, TAM configuration and test scheduling. ETW Julien Pouget, Erik Larsson, Zebo Peng, Marie-Lise Flottes, Bruno Rouzeyre
2003	—	`conf`	Buffer and Controller Minimisation for Time-Constrained Testing of System-On-Chip. DFT Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
2003	—	`conf`	Optimal System-on-Chip Test Scheduling. Asian Test Symposium Erik Larsson, Hideo Fujiwara
2003	—	`conf`	SOC Test Time Minimization Under Multiple Constraints. Asian Test Symposium Julien Pouget, Erik Larsson, Zebo Peng
2003	Misc	`conf`	Test Resource Partitioning and Optimization for SOC Designs. VTS Erik Larsson, Hideo Fujiwara
2002	J	`jnl`	An Integrated Framework for the Design and Optimization of SOC Test Solutions. J. Electron. Test. Erik Larsson, Zebo Peng
2002	—	`conf`	Integrated Test Scheduling, Test Parallelization and TAMDesign. Asian Test Symposium Erik Larsson, Klas Arvidsson, Hideo Fujiwara, Zebo Peng
2002	—	`conf`	Power constrained preemptive TAM scheduling. ETW Erik Larsson, Hideo Fujiwara
2001	A	`conf`	An integrated system-on-chip test framework. DATE Erik Larsson, Zebo Peng
2001	—	`conf`	Test Scheduling and Scan-Chain Division under Power Constraint. Asian Test Symposium Erik Larsson, Zebo Peng
2001	A	`conf`	The Design and Optimization of SOC Test Solutions. ICCAD Erik Larsson, Zebo Peng, Gunnar Carlsson
2000	—	`—`	An Integrated System-Level Design for Testability Methodology. Erik Larsson
2000	Misc	`conf`	Helpdesk.Drew.Edu: Home Growing a Helpdesk Solution Using Open-Source Technology. SIGUCCS John Saul, Betsy Black, Erik Larsson
1998	B	`conf`	Time of arrival estimation of narrowband TDMA signals for mobile positioning. PIMRC Sven Fischer, Hans Grubeck, Ari Kangas, Havish Koorapaty, Erik Larsson, Patrik Lundqvist
1997	—	`conf`	A controller testability analysis and enhancement technique. ED&TC Xinli Gu, Erik Larsson, Krzysztof Kuchcinski, Zebo Peng