Erik H. D'Hollander

59 papers A 1B 5C 3Misc 6Journal 15Unranked 25

Year	Rank	Type	Title / Venue / Authors
2024	—	`conf`	Exploring Large Language Models for Verilog Hardware Design Generation. IPDPS (Workshops) Erik H. D'Hollander, Ewout Danneels, Karel-Brecht Decorte, Senne Loobuyck, Arne Vanheule, Ian Van Kets, Dirk Stroobandt
2023	—	`conf`	ZyPy: Intercepting NumPy operations for acceleration on FPGAs. HEART Gerbrand De Laender, Erik H. D'Hollander
2019	—	`conf`	Empowering Parallel Computing with Field Programmable Gate Arrays. PARCO Erik H. D'Hollander
2019	J	`jnl`	Mapping a Guided Image Filter on the HARP Reconfigurable Architecture Using OpenCL. Algorithms Thomas Faict, Erik H. D'Hollander, Bart Goossens
2018	—	`conf`	Heterogeneous Cloud Computing: Design Methodology to Combine Hardware Accelerators. Cloudtech Bruno da Silva, Jan G. Cornelis, An Braeken, Erik H. D'Hollander, Jan Lemeire, Abdellah Touhafi
2017	—	`conf`	Calling hardware procedures in a reconfigurable accelerator using RPC-FPGA. FPT Erik H. D'Hollander, Bruno Chevalier, Koen De Bosschere
2017	—	`conf`	ParaFPGA 2017: Enlarging the Scope of Parallel Programming with FPGAs. PARCO Erik H. D'Hollander, Abdellah Touhafi
2016	J	`jnl`	High-Level Synthesis Optimization for Blocked Floating-Point Matrix Multiplication. SIGARCH Comput. Archit. News Erik H. D'Hollander
2015	—	`conf`	ParaFPGA15: Exploring threads and trends in programmable hardware. PARCO Erik H. D'Hollander, Dirk Stroobandt, Abdellah Touhafi
2013	B	`conf`	Comparing and combining GPU and FPGA accelerators in an image processing context. FPL Bruno da Silva, An Braeken, Erik H. D'Hollander, Abdellah Touhafi, Jan G. Cornelis, Jan Lemeire
2013	—	`conf`	ParaFPGA 2013: Harnessing Programs, Power and Performance in Parallel FPGA applications. PARCO Erik H. D'Hollander, Dirk Stroobandt, Abdellah Touhafi
2013	J	`jnl`	Performance Modeling for FPGAs: Extending the Roofline Model with High-Level Synthesis Tools. Int. J. Reconfigurable Comput. Bruno da Silva, An Braeken, Erik H. D'Hollander, Abdellah Touhafi
2013	—	`conf`	Performance and Resource Modeling for FPGAs using High-Level Synthesis tools. PARCO Bruno da Silva, An Braeken, Erik H. D'Hollander, Abdellah Touhafi
2013	A	`conf`	Performance and toolchain of a combined GPU/FPGA desktop (abstract only). FPGA Bruno da Silva, An Braeken, Erik H. D'Hollander, Abdellah Touhafi, Jan G. Cornelis, Jan Lemeire
2013	Misc	`ed.`	Transition of HPC Towards Exascale Computing - Selected Papers from the High Performance Computing Workshop, Cetraro, Italy, June 25-29, 2012. High Performance Computing Workshop (2) Erik H. D'Hollander, Jack J. Dongarra, Ian T. Foster, Lucio Grandinetti, Gerhard R. Joubert
2012	—	`ed.`	Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August - 3 September 2011, Ghent, Belgium PARCO Koen De Bosschere, Erik H. D'Hollander, Gerhard R. Joubert, David A. Padua, Frans J. Peters, Mark Sawyer
2012	Misc	`conf`	Performance and Programming Environment of a Combined GPU/FPGA Desktop. High Performance Computing Workshop (2) Bruno da Silva, An Braeken, Erik H. D'Hollander, Abdellah Touhafi, Jan G. Cornelis, Jan Lemeire
2011	—	`conf`	ParaFPGA 2011 - High Performance Computing with Multiple FPGAs: Design Methodology and Applications. PARCO Erik H. D'Hollander, Dirk Stroobandt, Abdellah Touhafi
2009	J	`jnl`	Efficient memory management for hardware accelerated Java Virtual Machines. ACM Trans. Design Autom. Electr. Syst. Peter Bertels, Wim Heirman, Erik H. D'Hollander, Dirk Stroobandt
2009	—	`conf`	ParaFPGA: Parallel Computing with Flexible Hardware. PARCO Erik H. D'Hollander, Dirk Stroobandt, Abdellah Touhafi
2009	J	`jnl`	Refactoring for Data Locality. Computer Kristof Beyls, Erik H. D'Hollander
2008	—	`conf`	Embedding Smart Buffers for Window Operations in a Stream-Oriented C-to-VHDL Compiler. DELTA Fabian Diet, Erik H. D'Hollander, Kristof Beyls, Harald Devos
2008	Misc	`conf`	High Performance Computing with FPGAs. High Performance Computing Workshop Erik H. D'Hollander, Kristof Beyls
2008	J	`jnl`	Refactoring Intermediately Executed Code to Reduce Cache Capacity Misses. J. Instr. Level Parallelism Kristof Beyls, Erik H. D'Hollander
2007	J	`jnl`	Finding and Applying Loop Transformations for Generating Optimized FPGA Implementations. Trans. High Perform. Embed. Archit. Compil. Harald Devos, Kristof Beyls, Mark Christiaens, Jan M. Van Campenhout, Erik H. D'Hollander, Dirk Stroobandt
2007	—	`conf`	Parallel Computing with FPGAs - Concepts and Applications. PARCO Erik H. D'Hollander, Dirk Stroobandt, Abdellah Touhafi
2006	C	`conf`	Discovery of Locality-Improving Refactorings by Reuse Path Analysis. HPCC Kristof Beyls, Erik H. D'Hollander
2006	—	`conf`	Intermediately executed code is the key to find refactorings that improve temporal data locality. Conf. Computing Frontiers Kristof Beyls, Erik H. D'Hollander
2005	J	`jnl`	Generating cache hints for improved program efficiency. J. Syst. Archit. Kristof Beyls, Erik H. D'Hollander
2005	J	`jnl`	Making XML document markup international. Softw. Pract. Exp. Yijun Yu, Jianguo Lu, John Mylopoulos, Weiwei Sun, Jing-Hao Xue, Erik H. D'Hollander
2005	Misc	`conf`	RDVIS: A Tool that Visualizes the Causes of Low Locality and Hints Program Optimizations. International Conference on Computational Science (2) Kristof Beyls, Erik H. D'Hollander, Frederik Vandeputte
2004	B	`conf`	Non-Uniform Dependences Partitioned by Recurrence Chains. ICPP Yijun Yu, Erik H. D'Hollander
2004	C	`conf`	Performance Visualizations using XML Representations. IV Yijun Yu, Kristof Beyls, Erik H. D'Hollander
2004	Misc	`conf`	Platform-Independent Cache Optimization by Pinpointing Low-Locality Reuse. International Conference on Computational Science Kristof Beyls, Erik H. D'Hollander
2004	J	`jnl`	Using Hammock Graphs to Structure Programs. IEEE Trans. Software Eng. Fubo Zhang, Erik H. D'Hollander
2002	—	`conf`	Reuse Distance-Based Cache Hint Selection. Euro-Par Kristof Beyls, Erik H. D'Hollander
2002	—	`conf`	Visualization Enables the Programmer to Reduce Cache Misses. IASTED PDCS Kristof Beyls, Erik H. D'Hollander, Yijun Yu
2001	J	`jnl`	Linear systems and associated problems - introduction. Parallel Comput. Henk J. Sips, Ruud Sommerhalder, Erik H. D'Hollander
2001	J	`jnl`	Loop Parallelization using the 3D Iteration Space Visualizer. J. Vis. Lang. Comput. Yijun Yu, Erik H. D'Hollander
2001	C	`conf`	Visualizing the Impact of the Cache on Program Execution. IV Yijun Yu, Kristof Beyls, Erik H. D'Hollander
2000	—	`conf`	Cache Remapping to Improve the Performance of Tiled Algorithms. Euro-Par Kristof Beyls, Erik H. D'Hollander
2000	J	`jnl`	Compiler Generated Multithreading to Alleviate Memory Latency. J. Univers. Comput. Sci. Kristof Beyls, Erik H. D'Hollander
2000	B	`conf`	Partitioning Loops with Variable Dependence Distances. ICPP Yijun Yu, Erik H. D'Hollander
1999	—	`conf`	JPT: A Java Parallelization Tool. PVM/MPI Kristof Beyls, Erik H. D'Hollander, Yijun Yu
1999	—	`ed.`	Parallel Computing: Fundamentals & Applications, Proceedings of the Conference ParCo'99, 17-20 August 1999, Delft, The Netherlands. PARCO Erik H. D'Hollander, Gerhard R. Joubert, Frans J. Peters, Henk J. Sips
1998	—	`ed.`	Parallel Computing: Fundamentals, Applications and New Directions, Proceedings of the Conference ParCo'97, 19-22 September 1997, Bonn, Germany. PARCO Erik H. D'Hollander, Gerhard R. Joubert, Frans J. Peters, Ulrich Trottenberg
1998	J	`jnl`	The FORTRAN Parallel Transformer and its Programming. Inf. Sci. Erik H. D'Hollander, Fubo Zhang, Qi Wang
1997	—	`conf`	Visualizing the Iteration Space in PEFPT. HPCN Europe Qi Wang, Yijun Yu, Erik H. D'Hollander
1996	Misc	`conf`	PVM Code Generator for the Fortran Parallel Transformer. PDPTA Erik H. D'Hollander, Fubo Zhang
1996	—	`ed.`	Parallel Computing: State-of-the-Art and Perspectives, Proceedings of the conference ParCo 1995, Gent, Belgium, September 1995 PARCO Erik H. D'Hollander, Gerhard R. Joubert, Frans J. Peters, Denis Trystram
1994	—	`conf`	Enhancing Parallelism by Removing Cyclic Data Dependencies. PARLE Fubo Zhang, Erik H. D'Hollander
1994	B	`conf`	Extracting the Parallelism in Program with Unstructured Control Statements. ICPADS Fubo Zhang, Erik H. D'Hollander
1993	—	`conf`	Performance Modeling of Microkernel Thread Schedulers for Shared Memory Multiprocessors. PARLE Wim Van de Velde, Johan Opsommer, Erik H. D'Hollander
1993	—	`conf`	Using Hammock Graphs to Eliminate Nonstructured Branch Statements. PARLE Fubo Zhang, Erik H. D'Hollander
1992	J	`jnl`	Partitioning and Labeling of Loops by Unimodular Transformations. IEEE Trans. Parallel Distributed Syst. Erik H. D'Hollander
1991	—	`conf`	Directed Taskgraph Scheduling Using Simulated Annealing. ICPP (2) Erik H. D'Hollander, Yves Devis
1989	—	`conf`	Partitioning and Labeling of Index Sets in DO Loops with Constant Dependence Vectors. ICPP (2) Erik H. D'Hollander
1987	B	`conf`	Implementation of An Automatic Program Partitioner on a Homogeneous Multiprocessor. ICPP Erik H. D'Hollander, Johan Opsommer
1983	—	`conf`	A Simulator of Homogeneous Multiprocessor Systems. ESC Erik H. D'Hollander, H. Simoens