Erich F. Haratsch

41 papers A* 4A 3B 6C 4Misc 3Journal 14Unranked 6
YearRankTypeTitle / Venue / Authors
2020 J jnl
Syndrome-Coupled Rate-Compatible Error-Correcting Codes: Theory and Application.
IEEE Trans. Inf. Theory
Pengfei Huang, Yi Liu, Xiaojie Zhang, Paul H. Siegel, Erich F. Haratsch
2018 J jnl
Characterizing, Exploiting, and Mitigating Vulnerabilities in MLC NAND Flash Memory Programming.
CoRR
Yu Cai, Saugata Ghose, Yixin Luo, Ken Mai, Onur Mutlu, Erich F. Haratsch
2018 J jnl
Experimental Characterization, Optimization, and Recovery of Data Retention Errors in MLC NAND Flash Memory.
CoRR
Yu Cai, Yixin Luo, Erich F. Haratsch, Ken Mai, Saugata Ghose, Onur Mutlu
2018 A* conf
HeatWatch: Improving 3D NAND Flash Memory Device Reliability by Exploiting Self-Recovery and Temperature Awareness.
HPCA
Yixin Luo, Saugata Ghose, Yu Cai, Erich F. Haratsch, Onur Mutlu
2018 — conf
Improving 3D NAND Flash Memory Lifetime by Tolerating Early Retention Loss and Process Variation.
SIGMETRICS (Abstracts)
Yixin Luo, Saugata Ghose, Yu Cai, Erich F. Haratsch, Onur Mutlu
2018 J jnl
Improving 3D NAND Flash Memory Lifetime by Tolerating Early Retention Loss and Process Variation.
CoRR
Yixin Luo, Saugata Ghose, Yu Cai, Erich F. Haratsch, Onur Mutlu
2018 J jnl
Improving 3D NAND Flash Memory Lifetime by Tolerating Early Retention Loss and Process Variation.
Proc. ACM Meas. Anal. Comput. Syst.
Yixin Luo, Saugata Ghose, Yu Cai, Erich F. Haratsch, Onur Mutlu
2018 J jnl
Read Disturb Errors in MLC NAND Flash Memory.
CoRR
Yu Cai, Yixin Luo, Saugata Ghose, Erich F. Haratsch, Ken Mai, Onur Mutlu
2017 Misc conf
Correcting errors by natural redundancy.
ITA
Anxiao Jiang, Pulakesh Upadhyaya, Erich F. Haratsch, Jehoshua Bruck
2017 J jnl
Error Characterization, Mitigation, and Recovery in Flash Memory Based Solid-State Drives.
CoRR
Yu Cai, Saugata Ghose, Erich F. Haratsch, Yixin Luo, Onur Mutlu
2017 J jnl
Error Characterization, Mitigation, and Recovery in Flash-Memory-Based Solid-State Drives.
Proc. IEEE
Yu Cai, Saugata Ghose, Erich F. Haratsch, Yixin Luo, Onur Mutlu
2017 J jnl
Errors in Flash-Memory-Based Solid-State Drives: Analysis, Mitigation, and Recovery.
CoRR
Yu Cai, Saugata Ghose, Erich F. Haratsch, Yixin Luo, Onur Mutlu
2017 J jnl
Syndrome-Coupled Rate-Compatible Error-Correcting Codes.
CoRR
Pengfei Huang, Yi Liu, Xiaojie Zhang, Paul H. Siegel, Erich F. Haratsch
2017 B conf
Syndrome-coupled rate-compatible error-correcting codes.
ITW
Pengfei Huang, Yi Liu, Xiaojie Zhang, Paul H. Siegel, Erich F. Haratsch
2017 A* conf
Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques.
HPCA
Yu Cai, Saugata Ghose, Yixin Luo, Ken Mai, Onur Mutlu, Erich F. Haratsch
2016 J jnl
Enabling Accurate and Practical Online Flash Channel Modeling for Modern MLC NAND Flash Memory.
IEEE J. Sel. Areas Commun.
Yixin Luo, Saugata Ghose, Yu Cai, Erich F. Haratsch, Onur Mutlu
2016 J jnl
Flash Memories: ISPP Renewal Theory and Flash Design Tradeoffs.
IEEE J. Sel. Areas Commun.
Meysam Asadi, Erich F. Haratsch, Aleksandar Kavcic, Narayana Prasad Santhanam
2015 Misc conf
A study of polar codes for MLC NAND flash memories.
ICNC
Yue Li, Hakim Alhussien, Erich F. Haratsch, Anxiao Andrew Jiang
2015 A* conf
Data retention in MLC NAND flash memory: Characterization, optimization, and recovery.
HPCA
Yu Cai, Yixin Luo, Erich F. Haratsch, Ken Mai, Onur Mutlu
2015 — conf
Joint decoding of content-replication codes for flash memories.
Allerton
Qing Li, Huan Chang, Anxiao Jiang, Erich F. Haratsch
2015 B conf
Write process modeling in MLC flash memories using renewal theory.
ISIT
Meysam Asadi, Erich F. Haratsch, Aleksandar Kavcic, Narayana P. Santhanam
2014 A* conf
Neighbor-cell assisted error correction for MLC NAND flash memories.
SIGMETRICS
Yu Cai, Gulay Yalcin, Onur Mutlu, Erich F. Haratsch, Osman S. Unsal, Adrián Cristal, Ken Mai
2014 B conf
Noise modeling and capacity analysis for NAND flash memories.
ISIT
Qing Li, Anxiao Jiang, Erich F. Haratsch
2013 C conf
Program interference in MLC NAND flash memory: Characterization, modeling, and mitigation.
ICCD
Yu Cai, Onur Mutlu, Erich F. Haratsch, Ken Mai
2013 A conf
Threshold voltage distribution in MLC NAND flash memory: characterization, analysis, and modeling.
DATE
Yu Cai, Erich F. Haratsch, Onur Mutlu, Ken Mai
2012 A conf
Error patterns in MLC NAND flash memory: Measurement, characterization, and analysis.
DATE
Yu Cai, Erich F. Haratsch, Onur Mutlu, Ken Mai
2012 C conf
Flash correct-and-refresh: Retention-aware error management for increased flash memory lifetime.
ICCD
Yu Cai, Gulay Yalcin, Onur Mutlu, Erich F. Haratsch, Adrián Cristal, Osman S. Ünsal, Ken Mai
2011 Misc conf
FPGA-Based Solid-State Drive Prototyping Platform.
FCCM
Yu Cai, Erich F. Haratsch, Mark P. McCartney, Ken Mai
2011 A conf
FPGA-based nand flash memory error characterization and solid-state drive prototyping platform (abstract only).
FPGA
Yu Cai, Erich F. Haratsch, Mark P. McCartney, Mudit Bhargava, Ken Mai
2007 B conf
A Bit-Node Centric Architecture for Low-Density Parity-Check Decoders.
GLOBECOM
Ruwan N. S. Ratnayake, Erich F. Haratsch, Gu-Yeon Wei
2007 B conf
Serial Sum-Product Architecture for Low-Density Parity-Check Codes.
ICCCN
Ruwan N. S. Ratnayake, Erich F. Haratsch, Gu-Yeon Wei
2006 C conf
High-rate quasi-cyclic LDPC codes for magnetic recording channel with low error floor.
ISCAS
Hao Zhong, Tong Zhang, Erich F. Haratsch
2006 — conf
VLSI Design of High-Rate Quasi-Cyclic LDPC Codes for Magnetic Recording Channel.
CICC
Hao Zhong, Tong Zhang, Erich F. Haratsch
2005 — conf
Digital signal processing in read channels.
CICC
Erich F. Haratsch, Z. A. Keirn
2004 — —
Trellis-based detection for high-speed data communications.
Erich F. Haratsch
2002 J jnl
Equalization and FEC techniques for optical transceivers.
IEEE J. Solid State Circuits
Kamran Azadet, Erich F. Haratsch, Helen Kim, Fadi Saibi, Jeffrey H. Saunders, Michael Shaffer, Leilei Song, Meng-Lin Yu
2001 J jnl
A 1-Gb/s joint equalizer and trellis decoder for 1000BASE-T Gigabit Ethernet.
IEEE J. Solid State Circuits
Erich F. Haratsch, Kamran Azadet
2000 — conf
A low complexity joint equalizer and decoder for 1000Base-T Gigabit Ethernet.
CICC
Erich F. Haratsch, Kamran Azadet
2000 C conf
High-speed reduced-state sequence estimation.
ISCAS
Erich F. Haratsch, Kamran Azadet
2000 B conf
Pipelined reduced-state sequence estimation.
GLOBECOM
Erich F. Haratsch, Kamran Azadet
2000 — conf
Reduced-State Sequence Estimation with Tap-Selectable Decision-Feedback.
ICC (1)
Erich F. Haratsch, Andrew J. Blanksby, Kamran Azadet