| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2025 | A* | conf |
MICRO
|
| 2025 | J | jnl |
IEEE Comput. Archit. Lett.
|
| 2025 | A | conf |
EuroSys
|
| 2024 | J | jnl |
IEEE Comput. Archit. Lett.
|
| 2024 | A | conf |
ICS
|
| 2024 | J | jnl |
IEEE Trans. Computers
|
| 2024 | A | conf |
HPDC
|
| 2023 | J | jnl |
IEEE Comput. Archit. Lett.
|
| 2023 | A* | conf |
MICRO
|
| 2023 | J | jnl |
ACM Trans. Embed. Comput. Syst.
|
| 2023 | A* | conf |
HPCA
|
| 2022 | A | conf |
FPGA
|
| 2022 | J | jnl |
IEEE Comput. Archit. Lett.
|
| 2021 | J | jnl |
Remote. Sens.
|
| 2021 | J | jnl |
IEEE Access
|
| 2021 | B | conf |
Accelerating Fully Homomorphic Encryption Through Microarchitecture-Aware Analysis and Optimization.
ISPASS
|
| 2021 | A* | conf |
HPCA
|
| 2021 | J | jnl |
CoRR
|
| 2021 | A* | conf |
ISCA
|
| 2021 | B | conf |
LCTES
|
| 2021 | A* | conf |
MICRO
|
| 2021 | J | jnl |
IEEE Comput. Archit. Lett.
|
| 2020 | J | jnl |
IEEE Access
|
| 2020 | A* | conf |
MICRO
|
| 2020 | J | jnl |
CoRR
|
| 2020 | J | jnl |
MViD: Sparse Matrix-Vector Multiplication in Mobile DRAM for Accelerating Recurrent Neural Networks.
IEEE Trans. Computers
|
| 2019 | A* | conf |
ISCA
|
| 2018 | J | jnl |
IEEE Comput. Archit. Lett.
|
| 2017 | A* | conf |
SOUP-N-SALAD: Allocation-Oblivious Access Latency Reduction with Asymmetric DRAM Microarchitectures.
HPCA
|
| 2017 | — | conf |
IISWC
|