Enver Cavus

20 papers B 4Journal 6Unranked 10
YearRankTypeTitle / Venue / Authors
2025 J jnl
A Novel CNN-Based Standalone Detector for Faster-Than-Nyquist Signaling.
IEEE Trans. Commun.
Osman Tokluoglu, Enver Cavus, Ebrahim Bedeer, Halim Yanikomeroglu
2025 B conf
A Novel Domain-Aware CNN Architecture for Faster-than-Nyquist Signaling Detection.
PIMRC
Osman Tokluoglu, Enver Cavus, Ebrahim Bedeer, Halim Yanikomeroglu
2024 — conf
Low Complexity Lookup Table Aided Soft Output Semidefinite Relaxation Based Faster-than-Nyquist Signaling Detector.
ICC
Adem Çiçek, Ian D. Marsland, Enver Cavus, Ebrahim Bedeer, Halim Yanikomeroglu
2023 J jnl
Coordinate Interleaved Faster-Than-Nyquist Signaling.
IEEE Commun. Lett.
Adem Çiçek, Enver Cavus, Ebrahim Bedeer, Ian D. Marsland, Halim Yanikomeroglu
2022 J jnl
Coordinate Interleaved Faster-than-Nyquist Signaling.
CoRR
Adem Çiçek, Enver Cavus, Ebrahim Bedeer, Ian D. Marsland, Halim Yanikomeroglu
2021 B conf
Coded Faster-than-Nyquist Signaling for Short Packet Communications.
PIMRC
Emre Cerci, Adem Çiçek, Enver Cavus, Ebrahim Bedeer, Halim Yanikomeroglu
2021 J jnl
Coded Faster-than-Nyquist Signaling for Short Packet Communications.
CoRR
Emre Cerci, Adem Çiçek, Enver Cavus, Ebrahim Bedeer, Halim Yanikomeroglu
2020 B conf
Polar Coded Faster-than-Nyquist (FTN) Signaling with Symbol-by-Symbol Detection.
WCNC
Abdulsamet Caglan, Adem Çiçek, Enver Cavus, Ebrahim Bedeer, Halim Yanikomeroglu
2018 — conf
Baseband implementation of high speed communication system on FPGA.
SIU
Mustafa Öztürk, Emre Kirkaya, Ersen Balcisoy, Mahir Sanli, Adem Çiçek, Enver Cavus
2018 — conf
FPGA implementation of MMSE channel estimation algorithm using system generator.
SIU
Mahir Sanli, Mustafa Öztürk, Ersen Balcisoy, Murat Can Karakoc, Emre Kirkaya, Adem Çiçek, Serdar Ozyurt, Enver Cavus
2018 — conf
FPGA implementation of symbol timing synchronization for OFDM systems.
SIU
Murat Can Karakoc, Emre Kirkaya, Özgün Ersoy, Mahir Sanli, Adem Çiçek, Enver Cavus, Serdar Ozyurt, Mehmet Ali Gulden
2017 — conf
Design of frequency upconversion and downconversion blocks for 240 GHz communication systems.
SIU
Özgün Ersoy, A. Behzat Gahin, Adem Çiçek, M. Can Karakoc, Enver Cavus, Serdar Ozyurt
2017 — conf
FPGA implementation of layered low density parity check error correction codes.
SIU
Abdulsamet Caglan, Ersen Balcisoy, Emre Kirkaya, Gurbannazar Charyyev, Adem Çiçek, Enver Cavus
2016 — conf
FPGA implementation of AWGN noise generator using Box-Muller method.
SIU
Abdulsamet Caglan, Erkan Inceoz, Ersen Balcisoy, Mehmet Efe Özbek, Enver Cavus
2016 — conf
Parallelizing LDPC Decoding Using OpenMP on Multicore Digital Signal Processors.
ICPP Workshops
Murat Sever, Enver Cavus
2009 J jnl
Low BER performance estimation of LDPC codes via application of importance sampling to trapping sets.
IEEE Trans. Commun.
Enver Cavus, Charles L. Haymes, Babak Daneshrad
2006 J jnl
A very low-complexity space-time block decoder (STBD) ASIC for wireless systems.
IEEE Trans. Circuits Syst. I Regul. Pap.
Enver Cavus, Babak Daneshrad
2006 — conf
An IS Simulation Technique for Very Low BER Performance Evaluation of LDPC Codes.
ICC
Enver Cavus, Charles L. Haymes, Babak Daneshrad
2005 B conf
A performance improvement and error floor avoidance technique for belief propagation decoding of LDPC codes.
PIMRC
Enver Cavus, Babak Daneshrad
2001 — conf
A computationally efficient algorithm for space-time block decoding.
ICC
Enver Cavus, Babak Daneshrad