Enrico Monaco

22 papers C 2Journal 6Unranked 14
YearRankTypeTitle / Venue / Authors
2026 — conf
23.2 A 2-Channel 800Gb/s Transceiver for Coherent-Lite Applications with <300ns Latency in 5nm FinFET.
ISSCC
Marco Sosio, Claudio Nani, Enrico Monaco, Nicola Ghittori, Domenico Albano, Alessio Di Pasquo, Alessandro Bosi, Travis Lovitt, Gabriele Gira, Fulvio Martinelli, Victor Karam, Devrishi Khanna, Mehdi N. Khiarak, Sasan Cyrusian, Mehdi Davoodi, Marco Garampazzi, Nimesh N. Miral, Fabio Giunco, Ivan Fabiano, Nicola Codega, Claudio Asero, Leonardo Daniel Herbas Burgos, Enrico Temporiti, Shawn Scouten, Kishore Kota, Yang Fu, Ruibin Jin, Josef Mueller, Michael Leung, Arash Farhoodfar, Stephen Jantzi, Ken Chang
2025 J jnl
A 5-nm 60-GS/s 7b 64-Way Time Interleaved Partial Loop Unrolled SAR ADC Achieving 35.2dB SNDR up to 32 GHz.
IEEE J. Solid State Circuits
Claudio Nani, Enrico Monaco, Nicola Ghittori, Alessandro Bosi, Domenico Albano, Claudio Asero, Nicola Codega, Alessio Di Pasquo, Ivan Fabiano, Marco Garampazzi, Fabio Giunco, Leonardo Daniel Herbas Burgos, Gabriele Minoia, Paolo Rossi, Marco Sosio, Leonardo Vignoli, Enrico Temporiti, Shawn Scouten, Stephen Jantzi
2025 J jnl
An Eight-Lane 800-Gb/s Transceiver for PAM-4 Optical Direct-Detection Applications in 5-nm FinFET Process.
IEEE J. Solid State Circuits
Fabio Giunco, Marco Sosio, Claudio Nani, Ivan Fabiano, Travis Lovitt, Victor Karam, Domenico Albano, Claudio Asero, Nicola Codega, Marco Garampazzi, Nicola Ghittori, Leonardo Daniel Herbas Burgos, Stanley S. K. Ho, Enrico Monaco, Benjamín T. Reyes, Paolo Rossi, Enrico Temporiti, Paolo Pascale, Fernando De Bernardinis, Shawn Scouten, Stephen Jantzi
2024 — conf
A 5nm 60GS/s 7b 64-Way Time Interleaved Partial Loop Unrolled SAR ADC Achieving 34dB SNDR up to 32GHz.
VLSI Technology and Circuits
Claudio Nani, Enrico Monaco, Nicola Ghittori, Alessandro Bosi, Domenico Albano, Claudio Asero, Nicola Codega, Alessio Di Pasquo, Ivan Fabiano, Marco Garampazzi, Fabio Giunco, Leonardo Daniel Herbas Burgos, Gabriele Minoia, Paolo Rossi, Marco Sosio, Leonardo Vignoli, Enrico Temporiti, Shawn Scouten, Stephen Jantzi
2024 — conf
A 800Gb/s Transceiver for PAM-4 Optical Direct-Detection Applications in 5nm FinFet Process.
VLSI Technology and Circuits
Fabio Giunco, Marco Sosio, Claudio Nani, Ivan Fabiano, Travis Lovitt, Victor Karam, D. Albano, C. Asero, Nicola Codega, Marco Garampazzi, Nicola Ghittori, D. Herbas, S. Ho, Enrico Monaco, Benjamín T. Reyes, P. Rossi, E. Temporiti, P. Pascale, Fernando De Bernardinis, S. Scouten, S. Jantzi
2023 — conf
A 0.94 V Dynamic Bias Double Tail Comparator for High-Speed Applications in 5 nm Technology.
ApplePies
Valentina Marazzi, Enrico Monaco, Claudio Nani, Danilo Manstretta
2023 — conf
Analysis and Design of a Low Power Double Tail Comparator with Dynamic Bias in 5nm FinFET Technology.
PRIME
Valentina Marazzi, Enrico Monaco, Claudio Nani, Danilo Manstretta
2021 J jnl
A 112 Gb/s PAM-4 RX Front-End With Unclocked Decision Feedback Equalizer.
IEEE Trans. Circuits Syst. II Express Briefs
Ibrahim Petricli, Hongyang Zhang, Enrico Monaco, Guido Albasini, Andrea Mazzanti
2021 C conf
A High Linearity Driver with Embedded Interleaved Track-and-Hold Array for High-Speed ADC.
ISCAS
Alessio Di Pasquo, Claudio Nani, Enrico Monaco, Luca Fanucci
2021 — conf
Delay-lines jitter modeling and efficiency analysis in FinFET technology.
ICECS
Alessio Di Pasquo, Enrico Monaco, Claudio Nani, Luca Fanucci
2018 — conf
A 4.9pJ/b 16-to-64Gb/s PAM-4 VSR transceiver in 28nm FDSOI CMOS.
ISSCC
Emanuele Depaoli, Enrico Monaco, Giovanni Steffan, Marco Mazzini, Hongyang Zhang, Walter Audoglio, Oscar Belotti, Augusto Andrea Rossi, Guido Albasini, Massimo Pozzoni, Simone Erba, Andrea Mazzanti
2018 C conf
Flexible Transversal Continuous-Time Linear Equalizer Operating up to 25Gb/s in 28nm CMOS.
ISCAS
H. Zhang, Enrico Monaco, Matteo Bassi, Andrea Mazzanti
2017 — conf
6.4 A 64Gb/s PAM-4 transmitter with 4-Tap FFE and 2.26pJ/b energy efficiency in 28nm CMOS FDSOI.
ISSCC
Giovanni Steffan, Emanuele Depaoli, Enrico Monaco, Nicolo Sabatino, Walter Audoglio, Augusto Andrea Rossi, Simone Erba, Matteo Bassi, Andrea Mazzanti
2017 J jnl
A 2-11 GHz 7-Bit High-Linearity Phase Rotator Based on Wideband Injection-Locking Multi-Phase Generation for High-Speed Serial Links in 28-nm CMOS FDSOI.
IEEE J. Solid State Circuits
Enrico Monaco, Gabriele Anzalone, Guido Albasini, Simone Erba, Matteo Bassi, Andrea Mazzanti
2016 — conf
A 0.2-11.7GHz, high accuracy injection-locking multi-phase generation with mixed analog/digital calibration loops in 28nm FDSOI CMOS.
ESSCIRC
Gabriele Anzalone, Enrico Monaco, Guido Albasini, Simone Erba, Andrea Mazzanti
2013 — conf
A 33.6-to-46.2GHz 32nm CMOS VCO with 177.5dBc/Hz minimum noise FOM using inductor splitting for tuning extension.
ISSCC
Enrico Mammei, Enrico Monaco, Andrea Mazzanti, Francesco Svelto
2011 — conf
A 6.5mW inductorless CMOS frequency divider-by-4 operating up to 70GHz.
ISSCC
Andrea Ghilioni, Ugo Decanis, Enrico Monaco, Andrea Mazzanti, Francesco Svelto
2011 J jnl
A Low-Noise Quadrature VCO Based on Magnetically Coupled Resonators and a Wideband Frequency Divider at Millimeter Waves.
IEEE J. Solid State Circuits
Ugo Decanis, Andrea Ghilioni, Enrico Monaco, Andrea Mazzanti, Francesco Svelto
2011 — conf
A mm-Wave quadrature VCO based on magnetically coupled resonators.
ISSCC
Ugo Decanis, Andrea Ghilioni, Enrico Monaco, Andrea Mazzanti, Francesco Svelto
2010 — conf
A 13.1% tuning range 115GHz frequency generator based on an injection-locked frequency doubler in 65nm CMOS.
ISSCC
Andrea Mazzanti, Enrico Monaco, Massimo Pozzoni, Francesco Svelto
2010 J jnl
Injection-Locked CMOS Frequency Doublers for μ -Wave and mm-Wave Applications.
IEEE J. Solid State Circuits
Enrico Monaco, Massimo Pozzoni, Francesco Svelto, Andrea Mazzanti
2009 — conf
A 5.2mW ku-band CMOS injection-locked frequency doubler with differential input / output.
CICC
Enrico Monaco, Mattia Borgarino, Francesco Svelto, Andrea Mazzanti