Endri Kaja - RankMe

17 papers A* 1C 5Journal 1Unranked 9

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Optimizing Software Self-Test Pattern Generation for Specific Components. DFT Jad Al Halabi, Melis Cetinkaya, Endri Kaja, Mounika Vaddeboina, Wolfgang Ecker
2024	—	`—`	Advanced Methods for Model-Driven Safety Analysis and Verification. Endri Kaja
2024	—	`conf`	An Automated Exhaustive Fault Analysis Technique guided by Processor Formal Verification Methods. ISQED Endri Kaja, Nicolas Gerlin, Bihan Zhao, Daniela Sanchez Lopera, Jad Al Halabi, Azam Sher Khan, Sebastian Prebeck, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker
2024	—	`conf`	An Automated and Effective Approach for SBST Generation Targeting RISC-V CPUs. DFT Endri Kaja, Nicolas Gerlin, Jad Al Halabi, Ares Tahiraga, Sebastian Prebeck, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker
2024	—	`conf`	Fake Timer: An Engine for Accurate Timing Estimation in Register Transfer Level Designs. ISQED Daniela Sanchez Lopera, Robert Kunzelmann, Endri Kaja, Wolfgang Ecker
2024	C	`conf`	PaGoRi:A Scalable Parallel Golomb-Rice Decoder. DDECS Mounika Vaddeboina, Endri Kaja, Alper Yilmazer, Uttal Ghosh, Wolfgang Ecker
2024	—	`conf`	Special Session: A Mixed Simulation-, Emulation-, and Formal-Based Fault Analysis Methodology for RISC-V. DFT Endri Kaja, Nicolas Gerlin, Ares Tahiraga, Jad Al Halabi, Sebastian Prebeck, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker
2023	C	`conf`	Bits, Flips and RISCs. DDECS Nicolas Gerlin, Endri Kaja, Fabian Vargas, Li Lu, Anselm Breitenreiter, Junchao Chen, Markus Ulbricht, Maribel Gomez, Ares Tahiraga, Sebastian Prebeck, Eyck Jentzsch, Milos Krstic, Wolfgang Ecker
2023	—	`conf`	Modelling Peripheral Designs using FSM-like Notation for Complete Property Set Generation. MCSoC Endri Kaja, Nicolas Gerlin, Robert Kunzelmann, Keerthikumara Devarajegowda, Wolfgang Ecker
2023	C	`conf`	Parallel Golomb-Rice Decoder with 8-bit Unary Decoding for Weight Compression in TinyML Applications. DSD Mounika Vaddeboina, Endri Kaja, Alper Yilmayer, Sebastian Prebeck, Wolfgang Ecker
2022	C	`conf`	Design of a Tightly-Coupled RISC-V Physical Memory Protection Unit for Online Error Detection. VLSI-SoC Nicolas Gerlin, Endri Kaja, Monideep Bora, Keerthikumara Devarajegowda, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker
2022	C	`conf`	Fast and Accurate Model-Driven FPGA-based System-Level Fault Emulation. VLSI-SoC Endri Kaja, Nicolas Gerlin, Monideep Bora, Gabriel Rutsch, Keerthikumara Devarajegowda, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker
2022	J	`jnl`	MetFI: Model-driven Fault Simulation Framework. CoRR Endri Kaja, Nicolas Gerlin, Luis Rivas, Monideep Bora, Keerthikumara Devarajegowda, Wolfgang Ecker
2022	—	`conf`	MetaFS: Model-driven Fault Simulation Framework. DFT Endri Kaja, Nicolas Gerlin, Monideep Bora, Keerthikumara Devarajegowda, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker
2021	—	`conf`	Extending Verilator to Enable Fault Simulation. MBMV Endri Kaja, Nicolas Ojeda Leon, Michael Werner, Bogdan-Andrei Tabacaru, Keerthikumara Devarajegowda, Wolfgang Ecker
2021	A*	`conf`	ISA Modeling with Trace Notation for Context Free Property Generation. DAC Keerthikumara Devarajegowda, Endri Kaja, Sebastian Siegfried Prebeck, Wolfgang Ecker
2021	—	`conf`	Towards Fault Simulation at Mixed Register-Transfer/Gate-Level Models. DFT Endri Kaja, Nicolas Gerlin, Mounika Vaddeboina, Luis Rivas, Sebastian Siegfried Prebeck, Zhao Han, Keerthikumara Devarajegowda, Wolfgang Ecker