Emna Amouri - RankMe

24 papers B 2C 1Journal 4Unranked 17

Year	Rank	Type	Title / Venue / Authors
2017	—	`conf`	On Exploiting Partitioning-Based Placement Approach for Performances Improvement of 3D FPGA. HPCS Sonda Chtourou, Mohamed Abid, Zied Marrakchi, Emna Amouri, Habib Mehrez
2017	J	`jnl`	Performance analysis and optimization of cluster-based mesh FPGA architectures: design methodology and CAD tool support. Turkish J. Electr. Eng. Comput. Sci. Sonda Chtourou, Zied Marrakchi, Emna Amouri, Vinod Pangracious, Mohamed Abid, Habib Mehrez
2016	—	`conf`	Design of advanced 2D and 3D FPGAs: Architecture-level exploration and algorithm-level optimization. IDT Sonda Chtourou, Mohamed Abid, Zied Marrakchi, Emna Amouri, Habib Mehrez
2016	C	`conf`	Exploration of Mesh-Based FPGA Architecture: Comparison of 2D and 3D Technologies in Terms of Power, Area and Performance. PDP Sonda Chtourou, Zied Marrakchi, Emna Amouri, Vinod Pangracious, Habib Mehrez, Mohamed Abid
2016	J	`jnl`	Improvement of cluster-based Mesh FPGA architecture using novel hierarchical interconnect topology and long routing wires. Microprocess. Microsystems Sonda Chtourou, Zied Marrakchi, Emna Amouri, Vinod Pangracious, Mohamed Abid, Habib Mehrez
2016	—	`conf`	The effect of interconnect depopulation on FPGA performances in terms of power, area and delay. HPCS Sonda Chtourou, Mohamed Abid, Zied Marrakchi, Emna Amouri, Habib Mehrez
2015	—	`conf`	Countering early propagation and routing imbalance of DPL designs in a tree-based FPGA. ICICDT Emna Amouri, Shivam Bhasin, Yves Mathieu, Tarik Graba, Jean-Luc Danger
2015	—	`conf`	Mesh of Clusters FPGA Architectures: Exploration Methodology and Interconnect Optimization. ARC Sonda Chtourou, Zied Marrakchi, Vinod Pangracious, Emna Amouri, Habib Mehrez, Mohamed Abid
2014	J	`jnl`	Architecture level optimization of 3-dimensional tree-based FPGA. Microelectron. J. Vinod Pangracious, Emna Amouri, Zied Marrakchi, Habib Mehrez
2014	B	`conf`	Balancing WDDL dual-rail logic in a tree-based FPGA to enhance physical security. FPL Emna Amouri, Shivam Bhasin, Yves Mathieu, Tarik Graba, Jean-Luc Danger, Habib Mehrez
2014	—	`conf`	Impact of Cluster Size on Routability, Testability and Robustness of a Cluster in a Mesh FPGA. ISVLSI Saif-Ur Rehman, Adrien Blanchardon, Arwa Ben Dhia, Mounir Benabdenbi, Roselyne Chotin-Avot, Lirida A. B. Naviner, Lorena Anghel, Habib Mehrez, Emna Amouri, Zied Marrakchi
2014	—	`conf`	Impact of defect tolerance techniques on the criticality of a SRAM-based mesh of cluster FPGA. ReConFig Adrien Blanchardon, Roselyne Chotin-Avot, Habib Mehrez, Emna Amouri
2014	B	`conf`	Improve defect tolerance in a cluster of a SRAM-based Mesh of Cluster FPGA using hardware redundancy. FPL Adrien Blanchardon, Roselyne Chotin-Avot, Habib Mehrez, Emna Amouri
2014	—	`conf`	Three-dimensional Mesh of Clusters: An alternative unified high performance interconnect architecture for 3D-FPGA implementation. 3DIC Sonda Chtourou, Mohamed Abid, Vinod Pangracious, Emna Amouri, Zied Marrakchi, Habib Mehrez
2013	—	`conf`	A defect-tolerant cluster in a mesh SRAM-based FPGA. FPT Arwa Ben Dhia, Saif-Ur Rehman, Adrien Blanchardon, Lirida A. B. Naviner, Mounir Benabdenbi, Roselyne Chotin-Avot, Emna Amouri, Habib Mehrez, Zied Marrakchi
2013	—	`conf`	Efficient multilevel interconnect topology for cluster-based mesh FPGA architecture. ReConFig Emna Amouri, Adrien Blanchardon, Roselyne Chotin-Avot, Habib Mehrez, Zied Marrakchi
2013	J	`jnl`	Impact of Dual Placement and Routing on WDDL Netlist Security in FPGA. Int. J. Reconfigurable Comput. Emna Amouri, Habib Mehrez, Zied Marrakchi
2013	—	`conf`	Performance Analysis and Optimization of High Density Tree-Based 3D Multilevel FPGA. ARC Vinod Pangracious, Zied Marrakchi, Emna Amouri, Habib Mehrez
2013	—	`conf`	Physical design exploration of 3D tree-based FPGA architecture. ACM Great Lakes Symposium on VLSI Vinod Pangracious, Emna Amouri, Habib Mehrez, Zied Marrakchi
2011	—	`conf`	Differential pair routing to balance dual signals of WDDL designs in cluster-based Mesh FPGA. ReCoSoC Emna Amouri, Zied Marrakchi, Habib Mehrez
2010	—	`conf`	Controlled placement and routing techniques to improve timing balance of WDDL designs in Mesh-based FPGA. APCCAS Emna Amouri, Zied Marrakchi, Habib Mehrez
2009	—	`conf`	Improving the Security of Dual Rail Logic in FPGA Using Controlled Placement and Routing. ReConFig Emna Amouri, Hayder Mrabet, Zied Marrakchi, Habib Mehrez
2009	—	`conf`	Placement and routing techniques to improve delay balance of WDDL netlist in MFPGA. ICECS Emna Amouri, Hayder Mrabet, Zied Marrakchi, Habib Mehrez
2008	—	`conf`	Efficient tree topology for FPGA interconnect network. ACM Great Lakes Symposium on VLSI Zied Marrakchi, Hayder Mrabet, Emna Amouri, Habib Mehrez