Emil Matús - RankMe

87 papers A* 2A 4B 4C 11Misc 3Journal 12Unranked 51

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Box Decoding With Probabilistic Tree Pruning for Scalable Sort-Free MIMO Detection. IEEE Wirel. Commun. Lett. Amit Sravan Bora, Shengchun Yang, Emil Matús, Gerhard P. Fettweis
2025	—	`conf`	A Low-Complexity K-Box Detector in High-Dimensional MIMO Systems. VTC2025-Fall Hanfu Zhang, Sheikh Faizan Qureshi, Emil Matús, Dmitry Utyansky, Pieter van der Wolf, Gerhard P. Fettweis
2025	J	`jnl`	Box Decoding with Low-Complexity Sort-free Candidate Pruning for MIMO Detection. CoRR Shengchun Yang, Amit Sravan Bora, Emil Matús, Gerhard P. Fettweis
2025	J	`jnl`	Conflict Management in Vector Register Files. ACM Trans. Archit. Code Optim. Viktor Razilov, Ipek Geçin, Emil Matús, Gerhard P. Fettweis
2025	—	`conf`	History-Correlated Stride Bank Prediction for Tightly Coupled Memory Systems. MCSoC Ipek Geçin, Emil Matús, Gerhard P. Fettweis
2025	J	`jnl`	Low-Complexity MIMO Detection in 5G IoT: The Box Decoding Approach. J. Signal Process. Syst. Sheikh Faizan Qureshi, Stefan A. Damjancevic, Emil Matús, Pieter van der Wolf, Dmitry Utyansky, Gerhard P. Fettweis
2025	—	`conf`	Routing in Multi-Chip Platforms with Hybrid Interconnects. MCSoC Joy Halder, Nayeem Ahmed, Viktor Razilov, Emil Matús, Gerhard P. Fettweis
2025	J	`jnl`	ZuSE-KI-Mobil: AI Chip Design Platform for Automotive and Industrial Applications. IEEE Trans. Very Large Scale Integr. Syst. Shaown Mojumder, Simon Friedrich, Emil Matús, Matthias Lüders, Martin Friedrich, Oliver Renke, Holger Blume, Markus Kock, Gregor Schewior, Darius Grantz, Jens Benndorf, Julian Höfer, Patrick Schmidt, Jürgen Becker, Nael Fasfous, Pierpaolo Morì, Hans-Jörg Vögel, Samira Ahmadifarsani, Leonidas Kontopoulos, Ulf Schlichtmann, Yun-Jin Li, Gerhard P. Fettweis
2024	—	`conf`	A 22 nm 10 TOPS Mixed-Precision Neural Network SoC for Image Processing with Energy-Efficient Dilated Convolution Support. COOL CHIPS Simon Friedrich, Robert Wittig, Emil Matús, Darius Grantz, Martin Zeller, Jens Benndorf, Gerhard P. Fettweis
2024	J	`jnl`	Access Interval Prediction by Partial Matching for Tightly Coupled Memory Systems. Int. J. Parallel Program. Viktor Razilov, Robert Wittig, Emil Matús, Gerhard P. Fettweis
2024	—	`conf`	Box Decoding: A Low-Complexity Algorithm for MIMO Detection. SiPS Sheikh Faizan Qureshi, Stefan A. Damjancevic, Emil Matús, Dmitry Utyansky, Pieter van der Wolf, Gerhard P. Fettweis
2024	J	`jnl`	Efficient Handover Mode Synchronization for NR-REDCAP on a Vector DSP. J. Signal Process. Syst. Sheikh Faizan Qureshi, Stefan A. Damjancevic, Emil Matús, Pieter van der Wolf, Dmitry Utyansky, Gerhard P. Fettweis
2024	—	`conf`	Implementation of the Tagged Geometric History Length Access Interval Predictor. NorCAS Viktor Razilov, Emil Matús, Gerhard P. Fettweis
2024	B	`conf`	On the Concurrent Multipath Entanglement Distribution in Quantum Networks. GLOBECOM Joy Halder, Emil Matús, Gerhard P. Fettweis
2024	—	`conf`	ZuSE-KI-Mobil AI Chip Design Platform: An Overview. NorCAS Shaown Mojumder, Simon Friedrich, Emil Matús, Gerhard P. Fettweis, Matthias Lüders, Martin Friedrich, Oliver Renke, Holger Blume, Julian Höfer, Patrick Schmidt, Jürgen Becker, Darius Grantz, Markus Kock, Jens Benndorf, Nael Fasfous, Pierpaolo Morì, Hans-Jörg Vögel, Samira Ahmadifarsani, Leonidas Kontopoulos, Ulf Schlichtmann, Kay Bierzynski
2023	C	`conf`	Access Interval Prediction with Neural Networks for Tightly Coupled Memory Systems. DSD Simon Friedrich, Chia-Ying Lin, Viktor Razilov, Robert Wittig, Emil Matús, Gerhard P. Fettweis
2023	—	`conf`	Dual Vector Load for Improved Pipelining in Vector Processors. COOL CHIPS Viktor Razilov, Juncen Zhong, Emil Matús, Gerhard P. Fettweis
2023	—	`conf`	Efficient Handover Mode Synchronization for NR-REDCAP on a Vector DSP. SAMOS Sheikh Faizan Qureshi, Stefan A. Damjancevic, Emil Matús, Dmitry Utyansky, Pieter van der Wolf, Gerhard P. Fettweis
2023	—	`conf`	Energy Efficiency Analysis of RF Power Amplifier Digital Predistortion in Full-Digital MIMO Transmitters. ICC Workshops Luis Godoy, Emil Matús, Gerhard P. Fettweis
2023	—	`conf`	Energy-Efficient Virtual Optical Network Embedding Over Mixed-Grid Optical Networks. NFV-SDN Joy Halder, Emil Matús, Gerhard P. Fettweis
2023	—	`conf`	Lightweight Instruction Set for Flexible Dilated Convolutions and Mixed-Precision Operands. ISQED Simon Friedrich, Shambhavi Balamuthu Sampath, Robert Wittig, Manoj Rohit Vemparala, Nael Fasfous, Emil Matús, Walter Stechele, Gerhard P. Fettweis
2023	—	`conf`	On-Chip Memory Access Reduction for Energy-Efficient Dilated Convolution Processing. SAMOS Simon Friedrich, Thomas Nalapat, Robert Wittig, Emil Matús, Gerhard P. Fettweis
2023	Misc	`conf`	Optimal SDNR Digital Predistortion via Direct Inversion. ACSSC Luis Godoy, Andrés Villamil, Emil Matús, Gerhard P. Fettweis
2023	A	`conf`	The ZuSE-KI-Mobil AI Accelerator SoC: Overview and a Functional Safety Perspective. DATE Fabian Kempf, Julian Höfer, Tanja Harbaum, Jürgen Becker, Nael Fasfous, Alexander Frickenstein, Hans-Jörg Vögel, Simon Friedrich, Robert Wittig, Emil Matús, Gerhard P. Fettweis, Matthias Lüders, Holger Blume, Jens Benndorf, Darius Grantz, Martin Zeller, Dietmar Engelke, Karl-Heinz Eickel
2022	J	`jnl`	Accurate Estimation of Service Rates in Interleaved Scratchpad Memory Systems. ACM Trans. Embed. Comput. Syst. Robert Wittig, Philipp Schulz, Emil Matús, Gerhard P. Fettweis
2022	B	`conf`	Communications Signal Processing Using RISC-V Vector Extension. IWCMC Viktor Razilov, Emil Matús, Gerhard P. Fettweis
2022	—	`conf`	Efficient Synchronization for NR-REDCAP Implemented on a Vector DSP. ASAP Sheikh Faizan Qureshi, Stefan A. Damjancevic, Emil Matús, Dmitry Utyansky, Pieter van der Wolf, Gerhard P. Fettweis
2022	—	`conf`	Tagged Geometric History Length Access Interval Prediction for Tightly Coupled Memory Systems. SAMOS Viktor Razilov, Robert Wittig, Emil Matús, Gerhard P. Fettweis
2021	J	`jnl`	Channel Estimation for Advanced 5G/6G Use Cases on a Vector Digital Signal Processor. IEEE Open J. Circuits Syst. Stefan A. Damjancevic, Emil Matús, Dmitry Utyansky, Pieter van der Wolf, Gerhard P. Fettweis
2021	—	`conf`	Digital Predistortion with Compressed Observations for Cloud-Based Learning. SiPS Arne Fischer-Bühner, Emil Matús, Manil Dev Gomony, Lauri Anttila, Gerhard P. Fettweis, Mikko Valkama
2021	—	`conf`	Energy efficiency optimization of radiofrequency power amplifiers for massive MIMO: a data based approach. SPAWC Luis Godoy, Emil Matús, Gerhard P. Fettweis
2021	—	`conf`	Flexible Channel Estimation for 3GPP 5G IoT on a Vector Digital Signal Processor. SiPS Stefan A. Damjancevic, Samuel Ajay Dasgupta, Emil Matús, Dmitry Utyanksy, Pieter van der Wolf, Gerhard P. Fettweis
2021	—	`conf`	Minimized Region of Path-search Algorithm for ASIP-based Connection Allocator in NoCs. ISVLSI Seungseok Nam, Emil Matús, Gerhard P. Fettweis
2020	—	`conf`	An ASIP Approach to Path Allocation in TDM NoCs using Adaptive Search Region. ACM Great Lakes Symposium on VLSI Seungseok Nam, Emil Matús, Gerhard P. Fettweis
2020	—	`conf`	Balancing Dynamic Scheduling Overhead to Maximize SDF Performance. 6G SUMMIT Mattis Hasler, Robert Wittig, Emil Matús, Gerhard P. Fettweis
2020	B	`conf`	Blind Packet-Based Receiver Chain Optimization Using Machine Learning. WCNC Mohammed Radi, Emil Matús, Gerhard P. Fettweis
2020	—	`conf`	Channel Profile Independent Usage of Convolutional Neural Networks for Receiver Chain Optimization. LATINCOM Mohammed Radi, Emil Matús, Gerhard P. Fettweis
2020	J	`jnl`	High Performance Dynamic Resource Allocation for Guaranteed Service in Network-on-Chips. IEEE Trans. Emerg. Top. Comput. Yong Chen, Emil Matús, Sadia Moriam, Gerhard P. Fettweis
2020	—	`conf`	Low Complexity Convolutional Neural Networks for Wireless Receiver Chain Optimization. IEEE ANTS Mohammed Radi, Emil Matús, Gerhard P. Fettweis
2020	—	`conf`	Modem Design in the Era of 5G and Beyond: The Need for a Formal Approach. ICT Robert Wittig, Andrés Goens, Christian Menard, Emil Matús, Gerhard P. Fettweis, Jerónimo Castrillón
2020	—	`conf`	Path-Spreading Search Algorithm and ASIP Approach for Connection Allocation in TDM-NoCs. ISVLSI Seungseok Nam, Emil Matús, Sadia Moriam, Gerhard P. Fettweis
2020	—	`conf`	Scalable 5G Signal Processing on Multiprocessor System: A Clustering Approach. 5G World Forum Nairuhi Grigoryan, Emil Matús, Gerhard P. Fettweis
2020	J	`jnl`	Slicing FIFOs for On-Chip Memory Bandwidth Exhaustion. IEEE Trans. Circuits Syst. I Regul. Pap. Mattis Hasler, Robert Wittig, Emil Matús, Gerhard P. Fettweis
2019	C	`conf`	5G-and-Beyond Scalable Machines. VLSI-SoC Gerhard P. Fettweis, Emil Matús, Robert Wittig, Mattis Hasler, Stefan A. Damjancevic, Seungseok Nam, Sebastian Haas
2019	—	`conf`	A Hybrid Execution Approach to Improve the Performance of Dataflow Applications. ISOCC Mattis Hasler, Robert Wittig, Emil Matús, Gerhard P. Fettweis
2019	Misc	`conf`	A Low-Power Scalable Signal Processing Chip Platform for 5G and Beyond - Kachel. ACSSC Gerhard P. Fettweis, Mattis Hasler, Robert Wittig, Emil Matús, Stefan A. Damjancevic, Sebastian Haas, Friedrich Pauls, Seungseok Nam, Nairuhi Grigoryan
2019	—	`conf`	Access Interval Prediction for Tightly Coupled Memory Systems. SAMOS Robert Wittig, Friedrich Pauls, Emil Matús, Gerhard P. Fettweis
2019	—	`conf`	Application Specific Instruction Processor for Dynamic Connection Allocation in TDM-NoCs. SoCC Seungseok Nam, Emil Matús, Gerhard P. Fettweis
2019	—	`conf`	DF4CRAN: Dataflow Framework for Cloud-RAN Signal Processing. 5G World Forum Nairuhi Grigoryan, Emil Matús, Gerhard P. Fettweis
2019	B	`conf`	General Multicarrier Modulation Hardware Accelerator for the Internet of Things. GLOBECOM Robert Wittig, Stefan A. Damjancevic, Emil Matús, Gerhard P. Fettweis
2019	C	`conf`	Probabilistic Models for Off-Line Arbiters in Embedded Systems. VLSI-SoC Robert Wittig, Mattis Hasler, Emil Matús, Gerhard P. Fettweis
2019	A	`conf`	Queue Based Memory Management Unit for Heterogeneous MPSoCs. DATE Robert Wittig, Mattis Hasler, Emil Matús, Gerhard P. Fettweis
2019	—	`conf`	Statistical Access Interval Prediction for Tightly Coupled Memory Systems. COOL CHIPS Robert Wittig, Mattis Hasler, Emil Matús, Gerhard P. Fettweis
2019	—	`conf`	Towards GFDM for Handsets - Efficient and Scalable Implementation on a Vector DSP. VTC Fall Stefan A. Damjancevic, Emil Matús, Dmitry Utyansky, Pieter van der Wolf, Gerhard P. Fettweis
2018	—	`conf`	Slicing FIFOs for on-chip memory bandwidth exhaustion. ICECS Mattis Hasler, Robert Wittig, Emil Matús, Gerhard P. Fettweis
2017	A*	`conf`	A Heterogeneous SDR MPSoC in 28 nm CMOS for Low-Latency Wireless Applications. DAC Sebastian Haas, Tobias Seifert, Benedikt Nöthen, Stefan Scholze, Sebastian Höppner, Andreas Dixius, Esther Pérez Adeva, Thomas R. Augustin, Friedrich Pauls, Sadia Moriam, Mattis Hasler, Erik Fischer, Yong Chen, Emil Matús, Georg Ellguth, Stephan Hartmann, Stefan Schiefer, Love Cederström, Dennis Walter, Stephan Henker, Stefan Hänzsche, Johannes Uhlig, Holger Eisenreich, Stefan Weithoffer, Norbert Wehn, René Schüffny, Christian Mayr, Gerhard P. Fettweis
2017	—	`conf`	Combined Centralized and Distributed Connection Allocation in Large TDM Circuit Switching NoCs. ACM Great Lakes Symposium on VLSI Yong Chen, Emil Matús, Gerhard P. Fettweis
2017	—	`conf`	Combined TDM and SDM Circuit Switching NoCs with Dedicated Connection Allocator. ISVLSI Yong Chen, Emil Matús, Gerhard P. Fettweis
2017	C	`conf`	Combined packet and TDM circuit switching NoCs with novel connection configuration mechanism. ISCAS Yong Chen, Emil Matús, Gerhard P. Fettweis
2017	C	`conf`	Register-Exchange Based Connection Allocator for Circuit Switching NoCs. PDP Yong Chen, Emil Matús, Gerhard P. Fettweis
2017	Misc	`conf`	Scalable 5G MPSoC architecture. ACSSC Gerhard P. Fettweis, Emil Matús
2016	—	`conf`	A database accelerator for energy-efficient query processing and optimization. NORCAS Sebastian Haas, Oliver Arnold, Stefan Scholze, Sebastian Höppner, Georg Ellguth, Andreas Dixius, Annett Ungethüm, Eric Mier, Benedikt Noethen, Emil Matús, Stefan Schiefer, Love Cederstroem, Fabian Pilz, Christian Mayr, René Schüffny, Wolfgang Lehner, Gerhard P. Fettweis
2016	A*	`conf`	An MPSoC for energy-efficient database query processing. DAC Sebastian Haas, Oliver Arnold, Benedikt Nöthen, Stefan Scholze, Georg Ellguth, Andreas Dixius, Sebastian Höppner, Stefan Schiefer, Stephan Hartmann, Stephan Henker, Thomas Hocker, Jörg Schreiter, Holger Eisenreich, Jens-Uwe Schlüßler, Dennis Walter, Tobias Seifert, Friedrich Pauls, Mattis Hasler, Yong Chen, Hermann Hensel, Sadia Moriam, Emil Matús, Christian Mayr, René Schüffny, Gerhard P. Fettweis
2016	—	`conf`	Centralized parallel multi-path multi-slot allocation approach for TDM NoCs. CCECE Yong Chen, Emil Matús, Gerhard P. Fettweis
2016	A	`conf`	EUROSERVER: Share-anything scale-out micro-server design. DATE Manolis Marazakis, John Goodacre, Didier Fuin, Paul M. Carpenter, John Thomson, Emil Matús, Antimo Bruno, Per Stenström, Jérôme Martin, Yves Durand, Isabelle Dor
2016	—	`conf`	Trellis-search based Dynamic Multi-Path Connection Allocation for TDM-NoCs. ACM Great Lakes Symposium on VLSI Yong Chen, Emil Matús, Gerhard P. Fettweis
2014	—	`conf`	10.7 A 105GOPS 36mm ISSCC Benedikt Noethen, Oliver Arnold, Esther P. Adeva, Tobias Seifert, Erik Fischer, Steffen Kunze, Emil Matús, Gerhard P. Fettweis, Holger Eisenreich, Georg Ellguth, Stephan Hartmann, Sebastian Höppner, Stefan Schiefer, J.-U. Schlusler, Stefan Scholze, Dennis Walter, René Schüffny
2014	C	`conf`	EUROSERVER: Energy Efficient Node for European Micro-Servers. DSD Yves Durand, Paul M. Carpenter, Stefano Adami, Angelos Bilas, Denis Dutoit, Alexis Farcy, Georgi Gaydadjiev, John Goodacre, Manolis Katevenis, Manolis Marazakis, Emil Matús, Iakovos Mavroidis, John Thomson
2014	J	`jnl`	Tomahawk: Parallelism and heterogeneity in communications signal processing MPSoCs. ACM Trans. Embed. Comput. Syst. Oliver Arnold, Emil Matús, Benedikt Noethen, Markus Winter, Torsten Limberg, Gerhard P. Fettweis
2013	—	`conf`	Towards elastic SDR architectures using dynamic task management. GlobalSIP Oliver Arnold, Emil Matús, Benedikt Noethen, Friedrich Pauls, Gerhard P. Fettweis
2012	—	`conf`	A 335Mb/s 3.9mm ISSCC Markus Winter, Steffen Kunze, Esther P. Adeva, Björn Mennenga, Emil Matús, Gerhard P. Fettweis, Holger Eisenreich, Georg Ellguth, Sebastian Höppner, Stefan Scholze, René Schüffny, Tomoyoshi Kobori
2012	—	`conf`	Two-stage detector for SC-FDMA transmission over MIMO ISI channels. ISWCS Marcel Jar, Emil Matús, Esther P. Adeva, Eckhard Ohlmer, Gerhard P. Fettweis
2011	—	`conf`	Combining LDPC, turbo and Viterbi decoders: Benefits and costs. SiPS Steffen Kunze, Emil Matús, Gerhard P. Fettweis, Tomoyoshi Kobori
2009	C	`conf`	ASIP Decoder Architecture for Convolutional and LDPC Codes. ISCAS Steffen Kunze, Emil Matús, Gerhard P. Fettweis
2009	A	`conf`	ICT-Emuco. An innovative solution for future smart phones. ICME Maria Elizabeth Gonzalez, Attila Bilgic, Adam Lackorzynski, Dacian Tudor, Emil Matús, Irv Badr
2009	C	`conf`	On the Structured Parallelism of Decoders for LDPC Convolutional Codes - an Algebraic Description. ISCAS Marcos B. S. Tavares, Emil Matús, Gerhard P. Fettweis
2009	—	`conf`	On the performance and numerical stability of soft-decision Reed-Solomon decoding. EUSIPCO Marcel Bimberg, Emil Matús, Gerhard P. Fettweis
2009	C	`conf`	Vectorization of the Sphere Detection Algorithm. ISCAS Björn Mennenga, Emil Matús, Gerhard P. Fettweis
2008	C	`conf`	A dual-core programmable decoder for LDPC convolutional codes. ISCAS Marcos B. S. Tavares, Emil Matús, Steffen Kunze, Gerhard P. Fettweis
2008	—	`conf`	A fully programmable 40 GOPS SDR single chip baseband for LTE/WiMAX terminals. ESSCIRC Torsten Limberg, Markus Winter, Marcel Bimberg, Reimund Klemm, Emil Matús, Marcos B. S. Tavares, Gerhard P. Fettweis, Hendrik Ahlendorf, Pablo Robelly
2008	—	`conf`	Architecture and VLSI realization of a high-speed programmable decoder for LDPC convolutional codes. ASAP Marcos B. S. Tavares, Steffen Kunze, Emil Matús, Gerhard P. Fettweis
2007	—	`conf`	A High-Throughput Programmable Decoder for LDPC Convolutional Codes. ASAP Marcel Bimberg, Marcos B. S. Tavares, Emil Matús, Gerhard P. Fettweis
2007	C	`conf`	Towards a GBit/s Programmable Decoder for LDPC Convolutional Codes. ISCAS Emil Matús, Marcos B. S. Tavares, Marcel Bimberg, Gerhard P. Fettweis
2006	—	`conf`	Code Generation for STA Architecture. Euro-Par Jie Guo, Torsten Limberg, Emil Matús, Björn Mennenga, Reimund Klemm, Gerhard P. Fettweis
2005	—	`conf`	A Compiler-friendly and Low-power DSP architecture. GI Jahrestagung (1) Emil Matús, Gordon Cichon, Hendrik Seidel, Pablo Robelly, Torsten Limberg, Gerhard P. Fettweis
2004	—	`conf`	Generated DSP Cores for Implementation of an OFDM Communication System. SAMOS Hendrik Seidel, Emil Matús, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard P. Fettweis
2004	—	`conf`	Synchronous Transfer Architecture (STA). SAMOS Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil Matús, Marcus Bronzel, Gerhard P. Fettweis