Emil Gizdarski

22 papers A* 3B 1Misc 8Journal 6Unranked 4
YearRankTypeTitle / Venue / Authors
2017 A* conf
A New Paradigm for Synthesis of Linear Decompressors.
DAC
Emil Gizdarski, Peter Wohl, John A. Waicukauski
2014 Misc conf
A shared memory based parallel diagnosis system.
VTS
Xiaolei Cai, Emil Gizdarski, Dan Landau
2014 — conf
Two-Step Dynamic Encoding for Linear Decompressors.
ATS
Emil Gizdarski
2011 J jnl
Construction and Analysis of Augmented Time Compactors.
J. Electron. Test.
Emil Gizdarski
2010 B conf
Constructing augmented time compactors.
ETS
Emil Gizdarski
2010 A* conf
Fully X-tolerant, very high scan compression.
DAC
Peter Wohl, John A. Waicukauski, Frederic Neuveux, Emil Gizdarski
2008 Misc conf
Constructing Augmented Multimode Compactors.
VTS
Emil Gizdarski
2007 Misc conf
Minimizing the Impact of Scan Compression.
VTS
Peter Wohl, John A. Waicukauski, Rohit Kapur, Sanjay Ramnath, Emil Gizdarski, Thomas W. Williams, P. Jaini
2005 Misc conf
Hierarchical Compactor Design for Diagnosis in Deterministic Logic BIST.
VTS
Peter Wohl, John A. Waicukauski, Sanjay Patel, Cy Hay, Emil Gizdarski, Ben Mathew
2004 Misc conf
Changing the Scan Enable during Shift.
VTS
Nodari Sitchinava, Samitha Samaranayake, Rohit Kapur, Emil Gizdarski, Frederic Neuveux, Thomas W. Williams
2004 J jnl
Understanding Yield Losses in Logic Circuits.
IEEE Des. Test Comput.
Davide Appello, Alessandra Fudoli, Katia Giarda, Vincenzo Tancorre, Emil Gizdarski, Ben Mathew
2004 Misc conf
Yield Analysis of Logic Circuits.
VTS
Davide Appello, Alessandra Fudoli, Katia Giarda, Emil Gizdarski, Ben Mathew, Vincenzo Tancorre
2003 Misc conf
A Reconfigurable Shared Scan-in Architecture.
VTS
Samitha Samaranayake, Emil Gizdarski, Nodari Sitchinava, Frederic Neuveux, Rohit Kapur, Thomas W. Williams
2002 — conf
Fault Set Partition for Efficient Width Compression.
Asian Test Symposium
Emil Gizdarski, Hideo Fujiwara
2002 J jnl
SPIRIT: a highly robust combinational test generation algorithm.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Emil Gizdarski, Hideo Fujiwara
2002 J jnl
Sequential Circuits with Combinational Test Generation Complexity under Single-Fault Assumption.
J. Electron. Test.
Michiko Inoue, Emil Gizdarski, Hideo Fujiwara
2001 A* conf
A Framework for Low Complexity Static Learning.
DAC
Emil Gizdarski, Hideo Fujiwara
2001 Misc conf
SPIRIT: A Highly Robust Combinational Test Generation Algorithm.
VTS
Emil Gizdarski, Hideo Fujiwara
2000 — conf
A class of sequential circuits with combinational test generation complexity under single-fault assumption.
Asian Test Symposium
Michiko Inoue, Emil Gizdarski, Hideo Fujiwara
2000 J jnl
Detection of Delay Faults in Memory Address Decoders.
J. Electron. Test.
Emil Gizdarski
2000 — conf
Spirit: satisfiability problem implementation for redundancy identification and test generation.
Asian Test Symposium
Emil Gizdarski, Hideo Fujiwara
1996 J jnl
Built-in self-test for folded bit-line Mbit DRAMs.
Integr.
Emil Gizdarski