Eleonora Testa

29 papers A* 4A 7Journal 8Unranked 9
YearRankTypeTitle / Venue / Authors
2026 J jnl
Scalable Sequential Logic Synthesis Using Observability Don't Care Conditions.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Dewmini Sudara Marakkalage, Eleonora Testa, Giulia Meuli, Walter Lau Neto, Alan Mishchenko, Giovanni De Micheli, Luca G. Amarù
2025 — conf
ML-Inspired Logic Synthesis: Improving Multiplier Circuits.
MLCAD
Yukio Miyasaka, Walter Lau Neto, Eleonora Testa, Anika Prasad, Michael Shuster, Reto Zimmermann, Patrick Vuillod, Alan Mishchenko, John Wawrzynek, Luca G. Amarù
2024 A conf
Scalable Sequential Optimization Under Observability Don't Cares.
DATE
Dewmini Sudara Marakkalage, Eleonora Testa, Walter Lau Neto, Alan Mishchenko, Giovanni De Micheli, Luca G. Amarù
2023 J jnl
Scalable Sequential Optimization Under Observability Don't Cares.
CoRR
Dewmini Sudara Marakkalage, Eleonora Testa, Walter Lau Neto, Alan Mishchenko, Giovanni De Micheli, Luca G. Amarù
2021 — conf
Algebraic and Boolean Optimization Methods for AQFP Superconducting Circuits.
ASP-DAC
Eleonora Testa, Siang-Yun Lee, Heinz Riener, Giovanni De Micheli
2021 A* conf
LUT-Based Optimization For ASIC Design Flow.
DAC
Luca Gaetano Amarù, Vinicius N. Possani, Eleonora Testa, Felipe S. Marranghello, Christopher Casares, Jiong Luo, Patrick Vuillod, Alan Mishchenko, Giovanni De Micheli
2021 J jnl
Three-Input Gates for Logic Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Dewmini Sudara Marakkalage, Eleonora Testa, Heinz Riener, Alan Mishchenko, Mathias Soeken, Giovanni De Micheli
2020 A conf
A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks.
DATE
Eleonora Testa, Mathias Soeken, Heinz Riener, Luca G. Amarù, Giovanni De Micheli
2020 J jnl
A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks.
IACR Cryptol. ePrint Arch.
Eleonora Testa, Mathias Soeken, Heinz Riener, Luca G. Amarù, Giovanni De Micheli
2020 — —
Data Structures and Algorithms for Logic Synthesis in Advanced Technologies.
Eleonora Testa
2020 J jnl
Extending Boolean Methods for Scalable Logic Synthesis.
IEEE Access
Eleonora Testa, Luca G. Amarù, Mathias Soeken, Alan Mishchenko, Patrick Vuillod, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2020 A conf
Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic : (Special Session Paper).
DATE
Eleonora Testa, Samantha Lubaba Noor, Odysseas Zografos, Mathias Soeken, Francky Catthoor, Azad Naeemi, Giovanni De Micheli
2020 A* conf
SAT-Sweeping Enhanced for Logic Synthesis.
DAC
Luca G. Amarù, Felipe S. Marranghello, Eleonora Testa, Christopher Casares, Vinicius N. Possani, Jiong Luo, Patrick Vuillod, Alan Mishchenko, Giovanni De Micheli
2019 — conf
A Hybrid Method for Spectral Translation Equivalent Boolean Functions.
PACRIM
Mathias Soeken, Eleonora Testa, D. Michael Miller
2019 — conf
Logic Optimization of Majority-Inverter Graphs.
MBMV
Heinz Riener, Eleonora Testa, Winston Haaswijk, Alan Mishchenko, Luca G. Amarù, Giovanni De Micheli, Mathias Soeken
2019 J jnl
Logic Synthesis for Established and Emerging Computing.
Proc. IEEE
Eleonora Testa, Mathias Soeken, Luca Gaetano Amarù, Giovanni De Micheli
2019 J jnl
Mapping Monotone Boolean Functions into Majority.
IEEE Trans. Computers
Eleonora Testa, Mathias Soeken, Luca Gaetano Amarù, Winston Haaswijk, Giovanni De Micheli
2019 A* conf
Reducing the Multiplicative Complexity in Logic Networks for Cryptography and Security Applications.
DAC
Eleonora Testa, Mathias Soeken, Luca G. Amarù, Giovanni De Micheli
2019 A conf
Scalable Boolean Methods in a Modern Synthesis Flow.
DATE
Eleonora Testa, Luca G. Amarù, Mathias Soeken, Alan Mishchenko, Patrick Vuillod, Jiong Luo, Christopher Casares, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2019 A* conf
Scalable Generic Logic Synthesis: One Approach to Rule Them All.
DAC
Heinz Riener, Eleonora Testa, Winston Haaswijk, Alan Mishchenko, Luca G. Amarù, Giovanni De Micheli, Mathias Soeken
2018 A conf
Majority logic synthesis.
ICCAD
Luca G. Amarù, Eleonora Testa, Miguel Couceiro, Odysseas Zografos, Giovanni De Micheli, Mathias Soeken
2018 J jnl
Pairs of majority-decomposing functions.
Inf. Process. Lett.
Mathias Soeken, Eleonora Testa, Alan Mishchenko, Giovanni De Micheli
2018 A conf
Practical exact synthesis.
DATE
Mathias Soeken, Winston Haaswijk, Eleonora Testa, Alan Mishchenko, Luca Gaetano Amarù, Robert K. Brayton, Giovanni De Micheli
2018 — conf
Size Optimization of MIGs with an Application to QCA and STMG Technologies.
NANOARCH
Heinz Riener, Eleonora Testa, Luca G. Amarù, Mathias Soeken, Giovanni De Micheli
2017 — conf
Classifying Functions with Exact Synthesis.
ISMVL
Winston Haaswijk, Eleonora Testa, Mathias Soeken, Giovanni De Micheli
2017 — conf
Inverter Propagation and Fan-Out Constraints for Beyond-CMOS Majority-Based Technologies.
ISVLSI
Eleonora Testa, Odysseas Zografos, Mathias Soeken, Adrien Vaysset, Mauricio Manfrini, Rudy Lauwereins, Giovanni De Micheli
2017 — conf
Multi-level logic benchmarks: An exactness study.
ASP-DAC
Luca Gaetano Amarù, Mathias Soeken, Winston Haaswijk, Eleonora Testa, Patrick Vuillod, Jiong Luo, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2017 A conf
Wave pipelining for majority-based beyond-CMOS technologies.
DATE
Odysseas Zografos, A. De Meester, Eleonora Testa, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Luca Gaetano Amarù, Praveen Raghavan, Francky Catthoor, Rudy Lauwereins
2016 — conf
Inversion optimization in Majority-Inverter Graphs.
NANOARCH
Eleonora Testa, Mathias Soeken, Odysseas Zografos, Luca Gaetano Amarù, Praveen Raghavan, Rudy Lauwereins, Pierre-Emmanuel Gaillardon, Giovanni De Micheli