Eiichi Sano

26 papers Journal 17Unranked 9
YearRankTypeTitle / Venue / Authors
2019 — conf
A 32×32-Pixel 0.9THz Imager with Pixel-Parallel 12b VCO-Based ADC in 0.18μm CMOS.
ISSCC
Sayuri Yokoyama, Masayuki Ikebe, Yuri Kanazawa, Takahiro Ikegami, Prasoon Ambalathankandy, Shota Hiramatsu, Eiichi Sano, Yuma Takida, Hiroaki Minamide
2014 — conf
A 12-bit, 5.5-μW single-slope ADC using intermittent working TDC with multi-phase clock signals.
ICECS
Daisuke Uchida, Masayuki Ikebe, Junichi Motohisa, Eiichi Sano
2013 — conf
60-GHz, 9-µW wake-up receiver for short-range wireless communications.
ESSCIRC
Toshiki Wada, Masayuki Ikebe, Eiichi Sano
2012 — conf
A 11b 5.1µW multi-slope ADC with a TDC using multi-phase clock signals.
ICECS
Kisu Kim, Masayuki Ikebe, Junichi Motohisa, Eiichi Sano
2011 — conf
A 0.6-4.5 GHz inductorless CMOS low noise amplifier with gyrator-C network.
ICECS
Akira Kondou, Masayuki Ikebe, Junichi Motohisa, Yoshihito Amemiya, Eiichi Sano
2010 — conf
Column parallel single-slope ADC with time to digital converter for CMOS imager.
ICECS
Muung Shin, Masayuki Ikebe, Junichi Motohisa, Eiichi Sano
2009 — conf
A 3.1-10.6 GHz RF CMOS circuits monolithically integrated with dipole antenna.
ICECS
Masayuki Ikebe, Daisuke Ueo, Kazuhiro Takahagi, Masaki Ohuno, Yusuke Takada, Eiichi Sano
2009 — conf
Offset cancellation with subthreshold-operated feedback circuit for fully differential amplifiers.
ICECS
Tomoki Iida, Tetsuya Asai, Eiichi Sano, Yoshihito Amemiya
2007 J jnl
Evaluation of Digitally Controlled PLL by Clock-Period Comparison.
IEICE Trans. Electron.
Yukinobu Makihara, Masayuki Ikebe, Eiichi Sano
2007 J jnl
Possibility of Terahertz Injection-Locked Oscillation in an InGaP/InGaAs/GaAs Two-Dimensional Plasmon-Resonant Photomixer.
IEICE Trans. Electron.
Mitsuhiro Hanabe, Yahya Moubarak Meziani, Taiichi Otsuji, Eiichi Sano, Tanemasa Asano
2006 J jnl
A chaotic wireless communication system based on collective synchronization among wireless nodes.
IEICE Electron. Express
Eiichi Sano
2006 J jnl
Structure-Sensitive Design for Wider Tunable Operation of Terahertz Plasmon-Resonant Photomixer.
IEICE Trans. Electron.
Mitsuhiro Hanabe, Takuya Nishimura, Masaki Miyamoto, Taiichi Otsuji, Eiichi Sano
2006 J jnl
Terahertz Frequency Multiplier Operation of Two Dimensional Plasmon Resonant Photomixer.
IEICE Trans. Electron.
Takuya Nishimura, Mitsuhiro Hanabe, Masaki Miyamoto, Taiichi Otsuji, Eiichi Sano
2006 J jnl
W-Band Active Integrated Antenna Oscillator Based on Full-Wave Design Methodology and 0.1-µm Gate InP-Based HEMTs.
IEICE Trans. Electron.
Koji Inafune, Eiichi Sano, Hideaki Matsuzaki, Toshihiko Kosugi, Takatomo Enoki
2004 J jnl
A 39-to-45-Gbit/s multi-data-rate clock and data recovery circuit with a robust lock detector.
IEEE J. Solid State Circuits
Hideyuki Nosaka, Eiichi Sano, Kiyoshi Ishii, Minoru Ida, Kenji Kurishima, Shoji Yamahata, Tsugumichi Shibata, Hiroyuki Fukuyama, Mikio Yoneyama, Takatomo Enoki, Masahiro Muraguchi
2004 J jnl
RF CMOS inductor shielded by a high-impedance surface.
IEICE Electron. Express
Eiichi Sano, Koji Inafune, Masamichi Akazawa
2002 J jnl
Low-power 1: 16 DEMUX and one-chip CDR with 1: 4 DEMUX using InP-InGaAs heterojunction bipolar transistors.
IEEE J. Solid State Circuits
Kiyoshi Ishii, Hideyuki Nosaka, Hiroki Nakajima, Kenji Kurishima, Minoru Ida, Noriyuki Watanabe, Yasurou Yamane, Eiichi Sano, Takatomo Enoki
2001 J jnl
An 80-Gb/s optoelectronic delayed flip-flop IC using resonant tunneling diodes and uni-traveling-carrier photodiode.
IEEE J. Solid State Circuits
Kimikazu Sano, Koichi Murata, Taiichi Otsuji, Tomoyuki Akeyoshi, Naofumi Shimizu, Eiichi Sano
2001 J jnl
High-speed lightwave communication ICs based on III-V compound semiconductors.
IEEE Commun. Mag.
Eiichi Sano
1999 — conf
Circuit design technologies for high-speed lightwave communications beyond 40 Gbit/s.
ISCAS (2)
Shunji Kimura, Taiichi Otsuji, Hiroyuki Kikuchi, Koichi Murata, Eiichi Sano
1997 J jnl
40-Gb/s ICs for future lightwave communications systems.
IEEE J. Solid State Circuits
Taiichi Otsuji, Yuhki Imai, Eiichi Sano, Shunji Kimura, Satoshi Yamaguchi, Mikio Yoneyama, Takatomo Enoki, Yohtaro Umeda
1997 J jnl
A super-dynamic flip-flop circuit for broad-band applications up to 24 Gb/s utilizing production-level 0.2-μm GaAs MESFETs.
IEEE J. Solid State Circuits
Taiichi Otsuji, Mikio Yoneyama, Koichi Murata, Eiichi Sano
1995 J jnl
A novel high-speed latching operation flip-flop (HLO-FF) circuit and its application to a 19-Gb/s decision circuit using a 0.2-μm GaAs MESFET.
IEEE J. Solid State Circuits
Koichi Murata, Taiichi Otsuji, Eiichi Sano, Masanobu Ohhata, Minoru Togashi, Masao Suzuki
1992 J jnl
A design technique for a high-gain, 10-GHz class-bandwidth GaAs MESFET amplifier IC module.
IEEE J. Solid State Circuits
Noboru Ishihara, Eiichi Sano, Yuhki Imai, Hiroyuki Kikuchi, Yasuro Yamane
1992 J jnl
A limiting amplifier with low phase deviation using an AlGaAs/GaAs HBT.
IEEE J. Solid State Circuits
Makoto Nakamura, Yuhki Imai, Eiichi Sano, Yoshiki Yamauchi, Osaake Nakajima
1988 J jnl
Performance limits of mixed analog/digital circuits with scaled MOSFETs.
IEEE J. Solid State Circuits
Eiichi Sano, Tsuneo Tsukahara, Atsushi Iwata