Efstathios D. Kyriakis-Bitzaros

18 papers A 1C 1Journal 7Unranked 9

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Real-Time FPGA-Based Strain Monitoring System. MOCAST Evangelia-Agni Alexopoulou, Ermioni D. Pasiou, Ilias Daradimos, Ilias Stavrakas, Efstathios D. Kyriakis-Bitzaros
2023	—	`conf`	Performance of MicroMegas Electronics in a High-Radiation Environment. MOCAST Foteini Kolitsi, Theodoros Alexopoulos, Valerio D'Amico, Francesco Fallavollita, Ralf Hertenberger, George Iakovidis, Nikolaos Kanellos, Chara Kitsaki, Spyridon Kompogiannis, Efstathios D. Kyriakis-Bitzaros, Ioannis P. Mesolongitis, Givi Sekhniaidze, Fabian Vogel, Katerina Zachariadou
2020	—	`conf`	Validation of the Production-Phase Level-1 Data Driver Cards for the Readout and Trigger System of the ATLAS New Small Wheel Detector. MOCAST Panagiotis Gkountoumis, D. Matakias, Nikolaos Kanellos, Andreas Vgenopoulos, I. Drivas Koulouris, Theodoros Alexopoulos, Ioannis P. Mesolongitis, E. Politis, Katerina Zachariadou, Efstathios D. Kyriakis-Bitzaros, V. Lefkovits, C. Kourkoumelis, D. Fassouliotis, I. Gkialas, M. Prapa, T. Geralis
2018	—	`conf`	Design and implementation of a re-configurable embedded system for capacitive sensor array interface. MOCAST Ioannis Zafeirakis, Myrto-Kyriaki Filippidou, Stavros Chatzandroulis, Efstathios D. Kyriakis-Bitzaros, Nikolaos A. Stathopoulos, Savvas Vassiliadis
2017	—	`conf`	Testing the Level-1 Data Driver Card for the New Small Wheel of the ATLAS detector. MOCAST Ioannis P. Mesolongitis, Achilleas Gkountis, Efstathios D. Kyriakis-Bitzaros, Katerina Zachariadou, Panagiotis Gkountoumis, Theodoros Alexopoulos
2011	J	`jnl`	A Reconfigurable Multichannel Capacitive Sensor Array Interface. IEEE Trans. Instrum. Meas. Efstathios D. Kyriakis-Bitzaros, Nikolaos A. Stathopoulos, Spyridon Pavlos, Dimitrios Goustouridis, Stavros Chatzandroulis
2007	—	`conf`	VCSEL device modeling and parameter extraction technique. ICECS Kyriaki Minoglou, Georgios Halkias, Efstathios D. Kyriakis-Bitzaros
2000	C	`conf`	1.7 GHz bipolar optoelectronic receiver using conventional 0.8 μm BiCMOS process. ISCAS Georgios Halkias, Nikos Haralabidis, Efstathios D. Kyriakis-Bitzaros, Stavros Katsafouros
2000	J	`jnl`	Estimation of signal transition activity in FIR filters implementedby a MAC architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Spiridon Nikolaidis, E. Karaolis, Efstathios D. Kyriakis-Bitzaros
1999	J	`jnl`	A Charge Recycling Technique for the Design of Low Power CMOS Clock Drivers. J. Circuits Syst. Comput. Spiridon Nikolaidis, Efstathios D. Kyriakis-Bitzaros
1999	J	`jnl`	A Space-Time Representation Method of Iterative Algorithms for the Design of Processor Arrays. J. VLSI Signal Process. Efstathios D. Kyriakis-Bitzaros, Constantinos E. Goutis
1999	—	`conf`	Estimation of the transition activity in MAC architectures implementing FIR filters. ICECS Spiros Nikolaidis, E. Karaolis, Efstathios D. Kyriakis-Bitzaros
1998	A	`conf`	Accurate calculation of bit-level transition activity using word-level statistics and entropy function. ICCAD Efstathios D. Kyriakis-Bitzaros, Spiridon Nikolaidis, Anna Tatsaki
1996	J	`jnl`	Transformation of Nested Loops into Uniform Recurrences and their Mapping to Regular Processor Arrays. J. Circuits Syst. Comput. Efstathios D. Kyriakis-Bitzaros, Dimitrios Soudris, Constantinos E. Goutis
1993	—	`conf`	Space-Time Representation of Iterative Algorithms and The Design of Regular Processor Arrays. ICPP (3) Efstathios D. Kyriakis-Bitzaros, Odysseas G. Koufopavlou, Constantinos E. Goutis
1992	J	`jnl`	A Systematic Partitioning Method for Designing Fixed-Size Processor Arrays. J. Circuits Syst. Comput. Efstathios D. Kyriakis-Bitzaros, Constantinos E. Goutis
1992	J	`jnl`	An Efficient Decompostion Technique for Mapping Nested Loops with Constant Dependencies into Regular Processor Arrays. J. Parallel Distributed Comput. Efstathios D. Kyriakis-Bitzaros, Constantinos E. Goutis
1991	—	`conf`	A real time speech decoder using instantaneous frequency and energy. EUROSPEECH Anastasios Tsopanoglou, Efstathios D. Kyriakis-Bitzaros, John Mourjopoulos, George K. Kokkinakis

Nicolò Altamura is a security engineer and computer science researcher specializing in software protection, reverse engineering, program analysis, and binary deobfuscation. He holds a master's degree in Computer Science and Engineering from the University of Verona, graduating with honors, and works at emproof, focusing on software protection and the challenges of analyzing and understanding compiled software.

His research explores the relationship between program analysis and code obfuscation, with particular emphasis on how software transformations affect the ability of automated tools to recover program behavior. His interests span static analysis, binary analysis, decompilation, reverse engineering, and techniques for analyzing and simplifying obfuscated code.

Beyond academic research, Nicolò develops and contributes to tools for reverse engineering and software analysis. His projects include obfuscation_analysis, a Binary Ninja plugin for analyzing and simplifying obfuscated code; Pocket, an obfuscator for mixed Boolean-arithmetic expressions; and ptxNinja, a tool for reverse engineering NVIDIA GPU code represented in the PTX virtual instruction set.

His research also extends to binary datasets and software evolution. In 2026, he co-authored ASSEMBLAGE-DEEPHISTORY: A Cross-Build Binary Dataset with Temporal Coverage, a research work addressing the availability of binary data across multiple software builds and points in time, supporting research into binary analysis and changes between program versions.

Across his research, engineering work, and open-source contributions, Nicolò focuses on advancing the understanding, analysis, and protection of software against increasingly sophisticated obfuscation and reverse-engineering challenges.

Nicolò Altamura is not a football player. Please avoid reporting this kind of infromation.