Edward J. McCluskey

216 papers A* 4A 65B 1C 2Misc 41Journal 71Unranked 29

Year	Rank	Type	Title / Venue / Authors
2016	J	`jnl`	State of the Journal. IEEE Trans. Computers Paolo Montuschi, Edward J. McCluskey, Samarjit Chakraborty, Jason Cong, Ramón M. Rodríguez-Dagnino, Fred Douglis, Lieven Eeckhout, Gernot Heiser, Sushil Jajodia, Ruby B. Lee, Dinesh Manocha, Tomás F. Pena, Isabelle Puaut, Hanan Samet, Donatella Sciuto
2010	J	`jnl`	Test Set Compression Through Alternation Between Deterministic and Pseudorandom Test Patterns. J. Electron. Test. Ahmad A. Al-Yamani, Edward J. McCluskey
2008	Misc	`conf`	Error Sequence Analysis. VTS Jaekwang Lee, Intaik Park, Edward J. McCluskey
2008	A	`conf`	Failing Frequency Signature Analysis. ITC Jaekwang Lee, Edward J. McCluskey
2008	Misc	`conf`	How Many Test Patterns are Useless? VTS François-Fabien Ferhani, Nirmal R. Saxena, Edward J. McCluskey, Phil Nigh
2008	Misc	`conf`	Inconsistent Fail due to Limited Tester Timing Accuracy. VTS Intaik Park, Donghwi Lee, Erik Chmelar, Edward J. McCluskey
2008	A	`conf`	Launch-on-Shift-Capture Transition Tests. ITC Intaik Park, Edward J. McCluskey
2007	A	`conf`	California scan architecture for high quality and low power testing. ITC Kyoung Youn Cho, Subhasish Mitra, Edward J. McCluskey
2007	Misc	`conf`	Test Set Reordering Using the Gate Exhaustive Test Metric. VTS Kyoung Youn Cho, Edward J. McCluskey
2006	A	`conf`	Classifying Bad Chips and Ordering Test Sets. ITC François-Fabien Ferhani, Edward J. McCluskey
2006	Misc	`conf`	Session Abstract. VTS Erik Chmelar, Edward J. McCluskey
2005	—	`conf`	BIST-Guided ATPG. ISQED Ahmad A. Al-Yamani, Edward J. McCluskey
2005	J	`jnl`	Diagnosis of resistive-open and stuck-open defects in digital CMOS ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Chien-Mo James Li, Edward J. McCluskey
2005	Misc	`conf`	Effective TARO Pattern Generation. VTS Intaik Park, Ahmad A. Al-Yamani, Edward J. McCluskey
2005	A	`conf`	Gate exhaustive testing. ITC Kyoung Youn Cho, Subhasish Mitra, Edward J. McCluskey
2005	J	`jnl`	Optimized reseeding by seed ordering and encoding. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey
2005	J	`jnl`	Test chip experimental results on high-level structural test. ACM Trans. Design Autom. Electr. Syst. Ahmad A. Al-Yamani, Edward J. McCluskey
2004	Misc	`conf`	A Multi-Configuration Strategy for an Application Dependent Testing of FPGAs. VTS Mehdi Baradaran Tahoori, Edward J. McCluskey, Michel Renovell, Philippe Faure
2004	Misc	`conf`	Delay Defect Screening using Process Monitor Structures. VTS Subhasish Mitra, Erik H. Volkerink, Edward J. McCluskey, Stefan Eichenberger
2004	Misc	`conf`	ELF-Murphy Data on Defects and Test Sets. VTS Edward J. McCluskey, Ahmad A. Al-Yamani, Chien-Mo James Li, Chao-Wen Tseng, Erik H. Volkerink, François-Fabien Ferhani, Edward Li, Subhasish Mitra
2004	J	`jnl`	Efficient Design Diversity Estimation for Combinational Circuits. IEEE Trans. Computers Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey
2004	J	`jnl`	Reconfigurable Architecture for Autonomous Self-Repair. IEEE Des. Test Comput. Subhasish Mitra, Wei-Je Huang, Nirmal R. Saxena, Shu-Yi Yu, Edward J. McCluskey
2004	A	`conf`	Speed Clustering of Integrated Circuits. ITC Kenneth A. Brand, Erik H. Volkerink, Edward J. McCluskey, Subhasish Mitra
2004	—	`conf`	Test quality for high level structural test. HLDVT Ahmad A. Al-Yamani, Edward J. McCluskey
2003	Misc	`conf`	Bist Reseeding with very few Seeds. VTS Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey
2003	Misc	`conf`	Built-In Reseeding for Serial Bist. VTS Ahmad A. Al-Yamani, Edward J. McCluskey
2003	A*	`conf`	Seed encoding with LFSRs and cellular automata. DAC Ahmad A. Al-Yamani, Edward J. McCluskey
2002	J	`jnl`	A Design Diversity Metric and Analysis of Redundant Systems. IEEE Trans. Computers Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey
2002	J	`jnl`	Control-flow checking by software signatures. IEEE Trans. Reliab. Nahmsuk Oh, Philip P. Shirvani, Edward J. McCluskey
2002	Misc	`conf`	Debating the Future of Burn-In. VTS Edward J. McCluskey, Subhasish Mitra, Bob Madge, Peter C. Maxwell, Phil Nigh, Mike Rodgers
2002	—	`conf`	Dependable Reconfigurable Computing Design Diversity and Self Repair. Evolvable Hardware Subhasish Mitra, Edward J. McCluskey
2002	Misc	`conf`	Design for Testability and Testing of IEEE 1149.1 Tap Controller. VTS Subhasish Mitra, Edward J. McCluskey, Samy Makar
2002	Misc	`conf`	Diagnosis of Sequence-Dependent Chips. VTS Chien-Mo James Li, Edward J. McCluskey
2002	J	`jnl`	ED4I: Error Detection by Diverse Data and Duplicated Instructions. IEEE Trans. Computers Nahmsuk Oh, Subhasish Mitra, Edward J. McCluskey
2002	J	`jnl`	Error detection by duplicated instructions in super-scalar processors. IEEE Trans. Reliab. Nahmsuk Oh, Philip P. Shirvani, Edward J. McCluskey
2002	J	`jnl`	Error detection by selective procedure call duplication for low energy consumption. IEEE Trans. Reliab. Nahmsuk Oh, Edward J. McCluskey
2002	Misc	`conf`	Experimental Results for Slow-Speed Testing. VTS Chao-Wen Tseng, James Li, Edward J. McCluskey
2002	A	`conf`	Fault Grading FPGA Interconnect Test Configurations. ITC Mehdi Baradaran Tahoori, Subhasish Mitra, Shahin Toutounchi, Edward J. McCluskey
2002	—	`conf`	Testing Digital Circuits with Constraints. DFT Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey
2001	A	`conf`	A memory coherence technique for online transient error recovery of FPGA configurations. FPGA Wei-Je Huang, Edward J. McCluskey
2001	Misc	`conf`	An Evaluation of Pseudo Random Testing for Detecting Real Defects. VTS Chao-Wen Tseng, Subhasish Mitra, Edward J. McCluskey, Scott Davidson
2001	J	`jnl`	Bit-fixing in pseudorandom sequences for scan BIST. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Nur A. Touba, Edward J. McCluskey
2001	Misc	`conf`	Column-Based Precompiled Configuration Techniques for FPGA. FCCM Wei-Je Huang, Edward J. McCluskey
2001	Misc	`conf`	Design Diversity for Concurrent Error Detection in Sequential Logic Circuts. VTS Subhasish Mitra, Edward J. McCluskey
2001	Misc	`conf`	Design of Redundant Systems Protected Against Common-Mode Failures. VTS Subhasish Mitra, Edward J. McCluskey
2001	Misc	`conf`	Diagnosis of Tunneling Opens. VTS Chien-Mo James Li, Edward J. McCluskey
2001	—	`conf`	Diversity Techniques for Concurrent Error Detection. ISQED Subhasish Mitra, Edward J. McCluskey
2001	—	`conf`	Fast Run-Time Fault Location in Dependable FPGA-Based Applications. DFT Wei-Je Huang, Subhasish Mitra, Edward J. McCluskey
2001	Misc	`conf`	MINVDD Testing for Weak CMOS ICs. VTS Chao-Wen Tseng, Ray Chen, Edward J. McCluskey, Phil Nigh
2001	A	`conf`	Multiple-output propagation transition fault test. ITC Chao-Wen Tseng, Edward J. McCluskey
2001	A	`conf`	On-line testing and recovery in TMR systems for real-time applications. ITC Shu-Yi Yu, Edward J. McCluskey
2001	—	`conf`	Performance Evaluation of Checksum-Based ABFT. DFT Ahmad A. Al-Yamani, Nahmsuk Oh, Edward J. McCluskey
2001	—	`conf`	Permanent Fault Repair for FPGAs with Limited Redundant Area. DFT Shu-Yi Yu, Edward J. McCluskey
2001	—	`conf`	Procedure Call Duplication: Minimization of Energy Consumption with Constrained Error Detection Latency. DFT Nahmsuk Oh, Edward J. McCluskey
2001	A	`conf`	Techniques for Estimation of Design Diversity for Combinational Logic Circuits. DSN Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey
2001	A	`conf`	Testing for resistive opens and stuck opens. ITC Chao-Wen Tseng, Chien-Mo James Li, Mike Purtell, Edward J. McCluskey
2000	Misc	`conf`	A Reliable LZ Data Compressor on Reconfigurable Coprocessors. FCCM Wei-Je Huang, Nirmal R. Saxena, Edward J. McCluskey
2000	Misc	`conf`	An ACS Robotic Control Algorithm with Fault Tolerant Capabilities. FCCM Shu-Yi Yu, Nirmal R. Saxena, Edward J. McCluskey
2000	Misc	`conf`	Cold Delay Defect Screening. VTS Chao-Wen Tseng, Edward J. McCluskey, Xiaoping Shao, David M. Wu
2000	A	`conf`	Combinational logic synthesis for diversity in duplex systems. ITC Subhasish Mitra, Edward J. McCluskey
2000	J	`jnl`	Common-mode failures in redundant VLSI systems: a survey. IEEE Trans. Reliab. Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey
2000	J	`jnl`	Dependable Computing and Online Testing in Adaptive and Configurable Systems. IEEE Des. Test Comput. Nirmal R. Saxena, Santiago Fernández-Gomez, Wei-Je Huang, Subhasish Mitra, Shu-Yi Yu, Edward J. McCluskey
2000	J	`jnl`	Efficient Multiplexer Synthesis Techniques. IEEE Des. Test Comput. Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey
2000	Misc	`conf`	Fault Escapes in Duplex Systems. VTS Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey
2000	J	`jnl`	Software-implemented EDAC protection against SEUs. IEEE Trans. Reliab. Philip P. Shirvani, Nirmal R. Saxena, Edward J. McCluskey
2000	A	`conf`	Stuck-fault tests vs. actual defects. ITC Edward J. McCluskey, Chao-Wen Tseng
2000	A	`conf`	Testing for tunneling opens. ITC Chien-Mo James Li, Edward J. McCluskey
2000	C	`conf`	Transient errors and rollback recovery in LZ compression. PRDC Wei-Je Huang, Edward J. McCluskey
2000	A	`conf`	Which concurrent error detection scheme to choose ? ITC Subhasish Mitra, Edward J. McCluskey
2000	Misc	`conf`	Word Voter: A New Voter Design for Triple Modular Redundant Systems. VTS Subhasish Mitra, Edward J. McCluskey
1999	A	`conf`	A design diversity metric and reliability analysis for redundant systems. ITC Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey
1999	J	`jnl`	An output encoding problem and a solution technique. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey
1999	A	`conf`	Finite state machine synthesis with concurrent error detection. ITC Chaohuang Zeng, Nirmal R. Saxena, Edward J. McCluskey
1999	Misc	`conf`	PADded Cache: A New Fault-Tolerance Technique for Cache Memories. VTS Philip P. Shirvani, Edward J. McCluskey
1999	J	`jnl`	RP-SYN: synthesis of random pattern testable circuits with test point insertion. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Nur A. Touba, Edward J. McCluskey
1998	A	`conf`	Analysis of pattern-dependent and timing-dependent failures in an experimental test chip. ITC Jonathan T.-Y. Chang, Chao-Wen Tseng, Chien-Mo James Li, Mike Purtell, Edward J. McCluskey
1998	B	`conf`	Dependable adaptive computing systems-the ROAR project. SMC Nirmal R. Saxena, Edward J. McCluskey
1998	A	`conf`	Detecting resistive shorts for CMOS domino circuits. ITC Jonathan T.-Y. Chang, Edward J. McCluskey
1998	Misc	`conf`	Experimental Results for IDDQ and VLV Testing. VTS Jonathan T.-Y. Chang, Chao-Wen Tseng, Yi-Chin Chu, Sanjay Wattal, Mike Purtell, Edward J. McCluskey
1997	Misc	`conf`	ATPG for scan chain latches and flip-flops. VTS Samy Makar, Edward J. McCluskey
1997	A	`conf`	An output encoding problem and a solution technique. ICCAD Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey
1997	Misc	`conf`	High-Level Synthesis for Orthogonal Sca. VTS Robert B. Norwood, Edward J. McCluskey
1997	J	`jnl`	Logic synthesis of multilevel circuits with concurrent error detection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Nur A. Touba, Edward J. McCluskey
1997	J	`jnl`	Parallel Signatur Analysis Design with Bounds on Aliasing. IEEE Trans. Computers Nirmal R. Saxena, Edward J. McCluskey
1997	C	`conf`	Pseudo-Random Pattern Testing of Bridging Faults. ICCD Nur A. Touba, Edward J. McCluskey
1997	Misc	`conf`	SHOrt voltage elevation (SHOVE) test for weak CMOS ICs. VTS Jonathan T.-Y. Chang, Edward J. McCluskey
1997	A	`conf`	Scan Synthesis for One-Hot Signals. ITC Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey
1996	A	`conf`	Altering a Pseudo-Random Bit Sequence for Scan-Based BIST. ITC Nur A. Touba, Edward J. McCluskey
1996	A	`conf`	Analysis and Detection of Timing Failures in an Experimental Test Chip. ITC Piero Franco, Siyad C. Ma, Jonathan Chang, Yi-Chin Chu, Sanjay Wattal, Edward J. McCluskey, Robert L. Stokes, William D. Farwell
1996	Misc	`conf`	Applying two-pattern tests using scan-mapping. VTS Nur A. Touba, Edward J. McCluskey
1996	J	`jnl`	Counting Two-State Transition-Tour Sequences. IEEE Trans. Computers Nirmal R. Saxena, Edward J. McCluskey
1996	A	`conf`	Detecting Delay Flaws by Very-Low-Voltage Testing. ITC Jonathan T.-Y. Chang, Edward J. McCluskey
1996	A	`conf`	Orthogonal Scan: Low-Overhead Scan for Data Paths. ITC Robert B. Norwood, Edward J. McCluskey
1996	Misc	`conf`	Quantitative analysis of very-low-voltage testing. VTS Jonathan T.-Y. Chang, Edward J. McCluskey
1996	Misc	`conf`	Synthesis-for-scan and scan chain ordering. VTS Robert B. Norwood, Edward J. McCluskey
1996	Misc	`conf`	Test point insertion based on path tracing. VTS Nur A. Touba, Edward J. McCluskey
1995	—	`conf`	A simple technique for locating gate-level faults in combinational circuits. Asian Test Symposium Teruhiko Yamada, Koji Yamazaki, Edward J. McCluskey
1995	A	`conf`	An Experimental Chip to Evaluate Test Techniques: Chip and Experiment Design. ITC Piero Franco, William D. Farwell, Robert L. Stokes, Edward J. McCluskey
1995	A	`conf`	An Experimental Chip to Evaluate Test Techniques: Experiment Results. ITC Siyad C. Ma, Piero Franco, Edward J. McCluskey
1995	Misc	`conf`	An apparatus for pseudo-deterministic testing. VTS Shridhar K. Mukund, Edward J. McCluskey, T. R. N. Rao
1995	Misc	`conf`	Checking experiments to test latches. VTS Samy Makar, Edward J. McCluskey
1995	J	`jnl`	Design of Autonomous TPG Circuits for Use in Two-Pattern Testing. IEICE Trans. Inf. Syst. Kiyoshi Furuya, Seiji Seki, Edward J. McCluskey
1995	J	`jnl`	Floating Point Fault Tolerance with Backward Error Assertions. IEEE Trans. Computers Daniel Boley, Gene H. Golub, Samy Makar, Nirmal R. Saxena, Edward J. McCluskey
1995	A	`conf`	Functional Tests for Scan Chain Latches. ITC Samy Makar, Edward J. McCluskey
1995	J	`jnl`	Open faults in BiCMOS gates. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Siyad C. Ma, Edward J. McCluskey
1995	A	`conf`	Synthesis of Mapping Logic for Generating Transformed Pseudo-Random Patterns for BIST. ITC Nur A. Touba, Edward J. McCluskey
1995	Misc	`conf`	Transformed pseudo-random patterns for BIST. VTS Nur A. Touba, Edward J. McCluskey
1994	A	`conf`	Automated Logic Synthesis of Random-Pattern-Testable Circuits. ITC Nur A. Touba, Edward J. McCluskey
1994	J	`jnl`	Linear Complexity Assertions for Sorting. IEEE Trans. Software Eng. Nirmal R. Saxena, Edward J. McCluskey
1994	A	`conf`	Logic synthesis techniques for reduced area implementation of multilevel circuits with concurrent error detection. ICCAD Nur A. Touba, Edward J. McCluskey
1994	Misc	`conf`	On-line delay testing of digital circuits. VTS Piero Franco, Edward J. McCluskey
1994	Misc	`conf`	Open faults in BiCMOS gates. VTS Siyad C. Ma, Edward J. McCluskey
1994	Misc	`conf`	Three-pattern tests for delay faults. VTS Piero Franco, Edward J. McCluskey
1993	J	`jnl`	Analysis of Gate Oxide Shorts in CMOS Circuits. IEEE Trans. Computers Hong Hao, Edward J. McCluskey
1993	A	`conf`	Quality and Single-Stuck Faults. ITC Edward J. McCluskey
1993	A	`conf`	Synthesizing for Scan Dependence in Built-In Self-Testable Desings. ITC LaNae J. Avra, Edward J. McCluskey
1993	A	`conf`	Very-Low-Voltage Testing for Weak CMOS Logic ICs. ITC Hong Hao, Edward J. McCluskey
1992	A	`conf`	Non-Conventional Faults in BiCMOS Digital Circuits. ITC Siyad C. Ma, Edward J. McCluskey
1992	J	`jnl`	Simple Bounds on Serial Signature Analysis Aliasing for Random Testing. IEEE Trans. Computers Nirmal R. Saxena, Piero Franco, Edward J. McCluskey
1991	A	`conf`	"Resistive Shorts" Within CMOS Gates. ITC Hong Hao, Edward J. McCluskey
1991	—	`conf`	Bounds on Signature Analysis Aliasing for Random Testing. FTCS Nirmal R. Saxena, Piero Franco, Edward J. McCluskey
1991	—	`conf`	Bridging, Transition, and Stuck-Open Faults in Self-Testing CMOS Checkers. FTCS Steven D. Millman, Edward J. McCluskey
1991	A	`conf`	Delay Testing of Digital Circuits by Output Waveform Analysis. ITC Piero Franco, Edward J. McCluskey
1991	A	`conf`	Refined Bounds on Signature Analysis Aliasing for Random Testing. ITC Nirmal R. Saxena, Piero Franco, Edward J. McCluskey
1991	A	`conf`	Two-Pattern Test Capabilities of Autonomous TPG Circuits. ITC Kiyoshi Furuya, Edward J. McCluskey
1990	J	`jnl`	Analysis of Checksums, Extended-Precision Checksums, and Cyclic Redundancy Checks. IEEE Trans. Computers Nirmal R. Saxena, Edward J. McCluskey
1990	—	`conf`	Behavioral synthesis of testable systems with VHDL. Compcon LaNae J. Avra, Edward J. McCluskey
1990	J	`jnl`	Control-Flow Checking Using Watchdog Assists and Extended-Precision Checksums. IEEE Trans. Computers Nirmal R. Saxena, Edward J. McCluskey
1990	J	`jnl`	Design Techniques for Testable Embedded Error Checkers. Computer Edward J. McCluskey
1990	A	`conf`	Diagnosing CMOS bridging faults with stuck-at fault dictionaries. ITC Steven D. Millman, Edward J. McCluskey, John M. Acken
1989	A	`conf`	Arithmetic and galois checksums. ICCAD Nirmal R. Saxena, Edward J. McCluskey
1989	—	`conf`	Control-flow checking using watchdog assists and extended-precision checksums. FTCS Nirmal R. Saxena, Edward J. McCluskey
1989	—	`conf`	Pseudo-exhaustive test and segmentation: formal definitions and extended fault coverage results. FTCS Jon G. Jr. Udell, Edward J. McCluskey
1989	A	`conf`	The critical path for multiple faults. ICCAD Samy Makar, Edward J. McCluskey
1988	J	`jnl`	Circuits for pseudoexhaustive test pattern generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Laung-Terng Wang, Edward J. McCluskey
1988	J	`jnl`	Concurrent Error Detection Using Watchdog Processors - A Survey. IEEE Trans. Computers Aamer Mahmood, Edward J. McCluskey
1988	J	`jnl`	Design of large embedded CMOS PLAs for built-in self-test. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Dick L. Liu, Edward J. McCluskey
1988	A	`conf`	Detecting Bridging Faults with Stuck-at Test Sets. ITC Steven D. Millman, Edward J. McCluskey
1988	J	`jnl`	Hybrid designs generating maximum-length sequences. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Laung-Terng Wang, Edward J. McCluskey
1988	A	`conf`	IC Quality and Test Transparency. ITC Edward J. McCluskey, Fred Buelow
1988	J	`jnl`	Linear Feedback Shift Register Design Using Cyclic Codes. IEEE Trans. Computers Laung-Terng Wang, Edward J. McCluskey
1988	—	`conf`	Multiple stuck-at fault testability of self-testing checkers. FTCS Takashi Nanya, Samiha Mourad, Edward J. McCluskey
1988	A	`conf`	On Benchmarking Digital Testing Systems. ITC Samiha Mourad, Edward J. McCluskey
1988	A	`conf`	On the Testing of Multiplexers. ITC Samy Makar, Edward J. McCluskey
1988	A	`conf`	Partial Hardware Partitioning: A New Pseudo-Exhaustive Test Implementation. ITC Jon G. Udeli Jr., Edward J. McCluskey
1988	A	`conf`	Practice and Theory. ITC Edward J. McCluskey
1988	J	`jnl`	Probability models for pseudorandom test sequences. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Edward J. McCluskey, Samy Makar, Samiha Mourad, Kenneth D. Wagner
1987	J	`jnl`	Designing CMOS Circuits for Switch-Level Testability. IEEE Des. Test Dick L. Liu, Edward J. McCluskey
1987	A*	`conf`	Modeling the Effect of Chip Failures on Cache Memory Systems. ICDE Hassanein H. Amer, Edward J. McCluskey
1987	J	`jnl`	Pseudorandom Testing. IEEE Trans. Computers Kenneth D. Wagner, Cary K. Chin, Edward J. McCluskey
1987	J	`jnl`	Test Length for Pseudorandom Testing. IEEE Trans. Computers Cary K. Chin, Edward J. McCluskey
1986	A	`conf`	A Hybrid Design of Maximum-Length Sequence Generators. ITC Laung-Terng Wang, Edward J. McCluskey
1986	A	`conf`	An Experiment on Intermittent-Failure Mechanisms. ITC Mario Lúcio Côrtes, Edward J. McCluskey
1986	A	`conf`	Circuits for Pseudo-Exhaustive Test Pattern Generation. ITC Laung-Terng Wang, Edward J. McCluskey
1986	J	`jnl`	Condensed Linear Feedback Shift Register (LFSR) Testing - A Pseudoexhaustive Test Technique. IEEE Trans. Computers Laung-Terng Wang, Edward J. McCluskey
1986	—	`book`	Logic design principles - with emphasis on testable semicustom circuits. Edward J. McCluskey
1986	J	`jnl`	Lower Overhead Design for Testability of Programmable Logic Arrays. IEEE Trans. Computers Saied Bozorgui-Nesbat, Edward J. McCluskey
1986	—	`conf`	Multiple Fault Detection in Parity Trees. COMPCON Samiha Mourad, Joseph L. A. Hughes, Edward J. McCluskey
1986	A	`conf`	Multiple Stuck-At Fault Coverage of Single Stuck-At Fault Test Sets. ITC Joseph L. A. Hughes, Edward J. McCluskey
1986	—	`conf`	Stuck-At Fault Detection in Parity Trees. FJCC Samiha Mourad, Joseph L. A. Hughes, Edward J. McCluskey
1986	A	`conf`	Two CMOS Metastability Sensors. ITC Greg G. Freeman, Dick L. Liu, Bruce A. Wooley, Edward J. McCluskey
1985	—	`conf`	An Experimental Study Comparing 74LS181 Test Sets. COMPCON Joseph L. A. Hughes, Samiha Mourad, Edward J. McCluskey
1985	J	`jnl`	Built-In Self-Test Structures. IEEE Des. Test Edward J. McCluskey
1985	J	`jnl`	Built-In Self-Test Techniques. IEEE Des. Test Edward J. McCluskey
1985	A	`conf`	Concurrent System-Level Error Detection Using a Watchdog Processor. ITC Aamer Mahmood, Edward J. McCluskey, Aydin Ersoz
1985	—	`conf`	Hardware Fault-Tolerance. COMPCON Edward J. McCluskey
1985	A	`conf`	Test Length for Pseudo Random Testing. ITC Cary K. Chin, Edward J. McCluskey
1985	A	`conf`	Test Teaching. ITC Edward J. McCluskey
1984	A	`conf`	An Analysis of the Multiple Fault Detection Capabilities of Single Stuck-at Fault Test Sets. ITC Joseph L. A. Hughes, Edward J. McCluskey
1984	J	`jnl`	Design of Totally Self-Checking Comparators with an Arbitrary Number of Inputs. IEEE Trans. Computers Joseph L. A. Hughes, Edward J. McCluskey, David J. Lu
1984	A	`conf`	Lower Overhead Design for Testability of Programmable Logic Arrays. ITC Saied Bozorgui-Nesbat, Edward J. McCluskey
1984	A	`conf`	Pseudo-Exhaustive Testing of Sequential Machines Using Signature Analysis. ITC Syed Zahoor Hassan, Edward J. McCluskey
1984	J	`jnl`	Quantitative Evaluation of Self-Checking Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. David J. Lu, Edward J. McCluskey
1984	J	`jnl`	Self-Testing Embedded Parity Checkers. IEEE Trans. Computers Javad Khakbaz, Edward J. McCluskey
1984	J	`jnl`	Verification Testing - A Pseudoexhaustive Test Technique. IEEE Trans. Computers Edward J. McCluskey
1983	A	`conf`	Concurrent Fault Detection Using a Watchdog Processor and Assertions. ITC Aamer Mahmood, Edward J. McCluskey, David J. Lu
1983	A	`conf`	Recurrent Test Patterns. ITC Edward J. McCluskey, David J. Lu
1983	A	`conf`	Teaching Testing. ITC Edward J. McCluskey
1982	J	`jnl`	A Statistical Failure/Load Relationship: Results of a Multicomputer Study. IEEE Trans. Computers Ravishankar K. Iyer, Steven E. Butner, Edward J. McCluskey
1982	A	`conf`	Built-In Verification Test. ITC Edward J. McCluskey
1982	A*	`conf`	Verification testing. DAC Edward J. McCluskey
1981	J	`jnl`	Design for Autonomous Test. IEEE Trans. Computers Edward J. McCluskey, Saied Bozorgui-Nesbat
1980	A	`conf`	Summary of Structural integrity Checking. RTSS David J. Lu, Edward J. McCluskey, Masood Namjoo
1980	J	`jnl`	Testability Considerotions in Microprocessor-Based Design. Computer John P. Hayes, Edward J. McCluskey
1979	J	`jnl`	Logic Design of Multivalued I IEEE Trans. Computers Edward J. McCluskey
1978	J	`jnl`	Boolean Network Probabilities and Network Design. IEEE Trans. Computers Edward J. McCluskey, Kenneth P. Parker, John J. Shedletsky
1978	—	`conf`	Logic design of multi-valued I2L logic circuits. MVL Edward J. McCluskey
1978	—	`ed.`	Proceedings of the 5th Annual Symposium on Computer Architecture, Palo Alto, CA, USA, April 1978 ISCA Edward J. McCluskey, John F. Wakerly, E. David Crockett, Thomas H. Bredt, David J. Lu, William M. van Cleemput, Susan S. Owicki, Roy C. Ogus, Ravi Apte, M. Danielle Beaurdy, Jacques Losq
1978	J	`jnl`	Sequential Circuit Output Probabilities From Regular Expressions. IEEE Trans. Computers Kenneth P. Parker, Edward J. McCluskey
1977	J	`jnl`	Microcomputers in the Computer Engineering Curriculum. Computer John F. Wakerly, Edward J. McCluskey
1977	J	`jnl`	Multivalued Integrated Injection Logic. IEEE Trans. Computers Tich T. Dao, Edward J. McCluskey, Lewis K. Russel
1977	—	`conf`	Panel Discussions. Design Automation and Microprocessors John Teets, Charles W. Rose, Edward J. McCluskey
1975	J	`jnl`	Analysis of Logic Circuits with Faults Using Input Signal Probabilities. IEEE Trans. Computers Kenneth P. Parker, Edward J. McCluskey
1975	—	`book`	Design of Digital Computers - An Introduction Hans W. Gschwind, Edward J. McCluskey
1975	J	`jnl`	Probabilistic Treatment of General Combinational Networks. IEEE Trans. Computers Kenneth P. Parker, Edward J. McCluskey
1974	—	`conf`	Design of Low-Cost General-Purpose Self-Diagnosing Computers. IFIP Congress John F. Wakerly, Edward J. McCluskey
1974	—	`conf`	University computer curricula. AFIPS National Computer Conference Dick B. Simmons, Edward J. McCluskey, Aaron Finerman, Michael L. Dertouzos, Jürg Nievergelt
1973	J	`jnl`	An Iterative Cell Switch Design for Hybrid Redundancy. IEEE Trans. Computers Daniel P. Siewiorek, Edward J. McCluskey
1973	J	`jnl`	Cosine survey of electrical engineering departments. Computer Martha E. Sloan, Clarence L. Coates, Edward J. McCluskey
1973	J	`jnl`	Minicomputers in the Digital Laboratory Program. Computer Taylor L. Booth, C. Gordon Bell, Cecil H. Coker, Robert M. Glorioso, Edward J. McCluskey, Frederic J. Mowle, David M. Robinson
1973	J	`jnl`	Switch Complexity in Systems with Hybrid Redundancy. IEEE Trans. Computers Daniel P. Siewiorek, Edward J. McCluskey
1972	A*	`ed.`	Proceedings of the Third Symposium on Operating System Principles, SOSP 1971, Stanford University, Palo Alto, California, USA, October 18-20, 1971 SOSP Edward J. McCluskey, Nicholas A. Fortis, Butler W. Lampson, Thomas H. Bredt
1971	J	`jnl`	Fault Equivalence in Combinational Logic Networks. IEEE Trans. Computers Edward J. McCluskey, Frederick W. Clegg
1971	J	`jnl`	Test and Diagnosis Procedure for Digital Networks. Computer Edward J. McCluskey
1968	J	`jnl`	Curriculum 68: Recommendations for academic programs in computer science: a report of the ACM curriculum committee on computer science. Commun. ACM William F. Atchison, Samuel D. Conte, John W. Hamblen, Thomas E. Hull, Thomas A. Keenan, William B. Kehl, Edward J. McCluskey, Silvio O. Navarro, Werner C. Rheinboldt, Earl J. Schweppe, William Viavant, David M. Young
1964	J	`jnl`	About Signal Flow Graph Techniques for Sequential Circuits. IEEE Trans. Electron. Comput. Janusz A. Brzozowski, Edward J. McCluskey
1964	—	`conf`	Derivation of optimum test sequences for sequential machines SWCT J. F. Poage, Edward J. McCluskey
1964	J	`jnl`	The Coding of Internal States of Sequential Circuits. IEEE Trans. Electron. Comput. Ted A. Dolotta, Edward J. McCluskey
1963	—	`conf`	Logical design theory of NOR gate networks with no complemented inputs SWCT Edward J. McCluskey
1963	J	`jnl`	Reduction of Feedback Loops in Sequential Circuits and Carry Leads in Iterative Networks Inf. Control. Edward J. McCluskey
1963	J	`jnl`	Signal Flow Graph Techniques for Sequential Circuit State Diagrams. IEEE Trans. Electron. Comput. Janusz A. Brzozowski, Edward J. McCluskey
1962	—	`conf`	Fundamental Mode and Pulse Mode Operations of Sequential Circuits. IFIP Congress Edward J. McCluskey
1962	—	`conf`	Reduction of feedback loops in sequential circuits and carry leads in iterative networks SWCT Edward J. McCluskey
1961	—	`conf`	Minimal sums for Boolean functions having many unspecified fundamental products SWCT Edward J. McCluskey
1958	J	`jnl`	Iterative Combinational Switching Networksߞ General Design Considerations. IRE Trans. Electron. Comput. Edward J. McCluskey
1957	J	`jnl`	Comments on Determination of Redundancies in a Set of Patterns. IRE Trans. Inf. Theory Edward J. McCluskey