Edward Hrynkiewicz

20 papers C 5Misc 1Journal 3Unranked 10

Year	Rank	Type	Title / Venue / Authors
2017	J	`jnl`	Nonlinearity Measurement of a Voltage Ramp Using a Digital Technique. J. Circuits Syst. Comput. Adam Milik, Edward Hrynkiewicz
2016	—	`conf`	About some peculiar approaches to seeking the Ashenhurst decomposition of logic functions in the Reed-Muller spectrum domain. MIXDES Dariusz Polok, Edward Hrynkiewicz
2016	J	`jnl`	Implementation of a microcontroller-based simplified FITA-FIS model. Microprocess. Microsystems Bernard Wyrwol, Edward Hrynkiewicz
2015	Misc	`conf`	Popular microcontrollers execute IEC 61131-3 standard operators and functional blocks in simply automatic control tasks. MMAR Miroslaw Chmiel, Edward Hrynkiewicz, Dariusz Polok, Jan Mocha
2014	—	`conf`	Industrial Implementation of Failure Detection Algorithm in Communication System. CN Blazej Kwiecien, Marcin Sidzina, Edward Hrynkiewicz
2014	—	`conf`	Seeking for decomposition of a Boolean function in the reed-müller spectral domain by Means of permutation between function variables. MIXDES Edward Hrynkiewicz, Dariusz Polok
2013	—	`conf`	About Implementation of IEC 61131-3 IL Operators in Standard Microcontrollers. PDeS Miroslaw Chmiel, Jan Mocha, Edward Hrynkiewicz, Dariusz Polok
2013	C	`conf`	Area-speed efficient modular architecture for GF(2 DDECS Danuta Pamula, Edward Hrynkiewicz
2013	J	`jnl`	Decomposition of the fuzzy inference system for implementation in the FPGA structure. Int. J. Appl. Math. Comput. Sci. Bernard Wyrwol, Edward Hrynkiewicz
2012	—	`conf`	Analysis of GF (2233) multipliers regarding elliptic curve cryptosystem applications. PDeS Danuta Pamula, Edward Hrynkiewicz, Arnaud Tisserand
2012	—	`conf`	The dynamic properties investigation of the PLC CPU implemented in FPGA. PDeS Miroslaw Chmiel, Edward Hrynkiewicz
2011	C	`conf`	Decomposition of multi-output logic function in Reed-Muller spectral domain. DDECS Stefan Kolodzinski, Edward Hrynkiewicz
2010	—	`ed.`	10th IFAC Workshop on Programmable Devices and Embedded Systems, PDeS 2010, Gliwice, Poland, October 6-7, 2010. PDeS Adam Milik, Edward Hrynkiewicz
2010	—	`conf`	A FPGA-based bit-word PLC CPUs development platform. PDeS Miroslaw Chmiel, Jan Mocha, Edward Hrynkiewicz
2010	—	`conf`	Multiplication in GF(2m): Area and time dependency/efficiency/complexity analysis. PDeS Danuta Pamula, Edward Hrynkiewicz, Arnaud Tisserand
2010	C	`conf`	Non-disjoint decomposition of logic functions in Reed-Muller spectral domain. DDECS Edward Hrynkiewicz, Stefan Kolodzinski
2009	—	`conf`	An idea of event-driven program tasks execution. PDeS Miroslaw Chmiel, Edward Hrynkiewicz
2009	C	`conf`	An utilisation of Boolean differential calculus in variables partition calculation for decomposition of logic functions. DDECS Stefan Kolodzinski, Edward Hrynkiewicz
2007	—	`conf`	A Web Services based Approach for System on a Chip Design Planning. CCE Maciej Witczynski, Edward Hrynkiewicz, Adam Pawlak
2007	C	`conf`	Decomposition of Logic Functions in Reed-Muller Spectral Domain. DDECS Edward Hrynkiewicz, Stefan Kolodzinski