Eduardo Marques

47 papers B 10C 5Misc 2Journal 10Unranked 19

Year	Rank	Type	Title / Venue / Authors
2022	J	`jnl`	A multi-layer probing approach for video over 5G in vehicular scenarios. Veh. Commun. Rui Lopes, Filipe Rocha, Susana Sargento, Miguel Luís, Ricardo Leitão, Eduardo Marques, Bruno Antunes
2019	—	`conf`	Tourism Guidance Tracking and Safety Platform. INTSYS Frederica Gonçalves, Ana Lúcia Martins, João Carlos Ferreira, Eduardo Marques, Magno Andrade, Luís Mota
2017	C	`conf`	A Hardware/Software Codesign for the Chemical Reactivity of BRAMS. DSD Carlos Alberto Oliveira De Souza, Erinaldo Pereira, Eduardo Marques
2017	C	`conf`	Exploiting Kant and Kimura's Matrix Inversion Algorithm on FPGA. DSD André B. Perina, Paulo Matias, Eduardo Marques, Vanderlei Bonato, João Miguel Gago Pontes de Brito Lima
2016	B	`conf`	A hardware/software codesign framework for vision-based ADAS. FPL Leandro Andrade Martinez, Eduardo Marques
2016	—	`conf`	A pipelined multi-softcore approach for the HOG algorithm. DASIP José Arnaldo Mascagni de Holanda, João Manuel Paiva Cardoso, Eduardo Marques
2016	J	`jnl`	Clustering-Based Selection for the Exploration of Compiler Optimization Sequences. ACM Trans. Archit. Code Optim. Luiz G. A. Martins, Ricardo Nobre, João M. P. Cardoso, Alexandre C. B. Delbem, Eduardo Marques
2016	C	`conf`	Towards a multi-softcore FPGA approach for the HOG algorithm. INDIN José Arnaldo Mascagni de Holanda, João Manuel Paiva Cardoso, Eduardo Marques
2015	C	`conf`	A special-purpose language for implementing pipelined FPGA-based accelerators. FDL Cristiano Bacelar de Oliveira, Ricardo Menotti, João M. P. Cardoso, Eduardo Marques
2015	J	`jnl`	Heterogeneous programming with Single Operation Multiple Data. J. Comput. Syst. Sci. Hervé Paulino, Eduardo Marques
2015	—	`conf`	Reconfigurable Hardware Assist for Linux Process Scheduling in Heterogeneous Multicore SoCs. ARC Maikon Adiles Fernandez Bueno, Carlos R. P. Almeida Jr., José A. M. de Holanda, Eduardo Marques
2014	B	`conf`	A clustering-based approach for exploring sequences of compiler optimizations. IEEE Congress on Evolutionary Computation Luiz G. A. Martins, Ricardo Nobre, Alexandre C. B. Delbem, Eduardo Marques, João M. P. Cardoso
2014	—	`conf`	Adapting Processor Grain via Reconfiguration. ARC Jecel Mattos de Assumpção Jr., Merik Voswinkel, Eduardo Marques
2014	B	`conf`	Exploration of compiler optimization sequences using clustering-based selection. LCTES Luiz G. A. Martins, Ricardo Nobre, Alexandre C. B. Delbem, Eduardo Marques, João M. P. Cardoso
2014	—	`conf`	High-Level Synthesis from C vs. a DSL-Based Approach. IPDPS Workshops Cristiano Bacelar de Oliveira, João M. P. Cardoso, Eduardo Marques
2014	B	`conf`	Operating system support to an online hardware-software co-design scheduler for heterogeneous multicore architectures. RTCSA Maikon Adiles Fernandez Bueno, José A. M. de Holanda, Erinaldo Pereira, Eduardo Marques
2014	J	`jnl`	Practical Education Fostered by Research Projects in an Embedded Systems Course. Int. J. Reconfigurable Comput. Vanderlei Bonato, Marcio Merino Fernandes, João M. P. Cardoso, Eduardo Marques
2014	—	`conf`	Tactile Interface for Navigation in Underground Mines. SVR Victor Adriel de J. Oliveira, Eduardo Marques, Rodrigo de Lemos Peroni, Anderson Maciel
2013	J	`jnl`	A Mersenne Twister Hardware Implementation for the Monte Carlo Localization Algorithm. J. Signal Process. Syst. Vanderlei Bonato, Bruno F. Mazzotti, Marcio Merino Fernandes, Eduardo Marques
2013	B	`conf`	Design Space Exploration based on multiobjective genetic algorithms and clustering-based high-level estimation. FPL Luiz G. A. Martins, Eduardo Marques
2013	J	`jnl`	Heterogeneous Programming with Single Operation Multiple Data. CoRR Hervé Paulino, Eduardo Marques
2012	B	`conf`	Combining data and computation transformations for fine-grain reconfigurable architectures. FPL Cristiano B. Oliveira, Eduardo Marques
2012	J	`jnl`	LALP: A Language to Program Custom FPGA-Based Acceleration Engines. Int. J. Parallel Program. Ricardo Menotti, João M. P. Cardoso, Marcio Merino Fernandes, Eduardo Marques
2012	—	`conf`	Single Operation Multiple Data - Data Parallelism at Subroutine Level. HPCC-ICESS Eduardo Marques, Hervé Paulino
2012	—	`conf`	The RPG DSL: a case study of language engineering using MDD for generating RPG games for mobile phones. DSM@SPLASH Eduardo Marques, Valter Balegas, Bruno Fontes Barroca, Ankica Barisic, Vasco Amaral
2011	—	`conf`	A PID Controller Applied to the Gain Control of a CMOS Camera Using Reconfigurable Computing. ReConFig Drausio Linardi Rossi, Vanderlei Bonato, Eduardo Marques, João Miguel Gago Pontes de Brito Lima
2009	J	`jnl`	A Floating-point Extended Kalman Filter Implementation for Autonomous Mobile Robots. J. Signal Process. Syst. Vanderlei Bonato, Eduardo Marques, George A. Constantinides
2009	B	`conf`	Automatic generation of FPGA hardware accelerators using a domain specific language. FPL Ricardo Menotti, João M. P. Cardoso, Marcio Merino Fernandes, Eduardo Marques
2009	C	`conf`	LALP: A Novel Language to Program Custom FPGA-Based Architectures. SBAC-PAD Ricardo Menotti, João M. P. Cardoso, Marcio Merino Fernandes, Eduardo Marques
2009	—	`conf`	RoboArch: A component-based tool proposal for developing hardware architecture for mobile robots. SIES Vanderlei Bonato, Eduardo Marques
2008	—	`conf`	A Parallel Hardware Architecture for Image Feature Detection. ARC Vanderlei Bonato, Eduardo Marques, George A. Constantinides
2008	J	`jnl`	A Parallel Hardware Architecture for Scale and Rotation Invariant Feature Detection. IEEE Trans. Circuits Syst. Video Technol. Vanderlei Bonato, Eduardo Marques, George A. Constantinides
2007	B	`conf`	A floating-point Extended Kalman Filter implementation for autonomous mobile robots. FPL Vanderlei Bonato, Eduardo Marques, George A. Constantinides
2007	B	`conf`	Aggressive Loop Pipelining for Reconfigurable Architectures. FPL Ricardo Menotti, Eduardo Marques, João M. P. Cardoso
2007	—	`conf`	An FPGA Implementation for a Kalman Filter with Application to Mobile Robotics. SIES Vanderlei Bonato, Rafael Peron, Denis F. Wolf, José A. M. de Holanda, Eduardo Marques, João M. P. Cardoso
2007	—	`conf`	On Adapting Power Estimation Models for Embedded Soft-Core Processors. SIES José A. M. de Holanda, Jecel Assumpcao, Denis F. Wolf, Eduardo Marques, João M. P. Cardoso
2007	—	`ed.`	Reconfigurable Computing: Architectures, Tools and Applications, Third International Workshop, ARC 2007, Mangaratiba, Brazil, March 27-29, 2007. ARC Pedro C. Diniz, Eduardo Marques, Koen Bertels, Marcio Merino Fernandes, João M. P. Cardoso
2007	—	`conf`	Towards a Hardware Accelerated Obstacle Avoidance System for Mobile Robots using Monocular Vision. SIES Jecel Assumpcao, Denis F. Wolf, Eduardo Marques
2006	B	`conf`	A Methodology to Design FPGA-based PID Controllers. SMC João Miguel Gago Pontes de Brito Lima, Ricardo Menotti, João M. P. Cardoso, Eduardo Marques
2006	—	`conf`	An Embedded Multi-camera System for Simultaneous Localization and Mapping. ARC Vanderlei Bonato, José A. M. de Holanda, Eduardo Marques
2006	—	`conf`	Executing Algorithms for Dynamic Dataflow Reconfigurable Hardware -The Operators Protocol. ReConFig Jorge Luiz e Silva, Eduardo Marques
2004	—	`conf`	A Real Time Gesture Recognition System for Mobile Robots. ICINCO (2) Vanderlei Bonato, Adriano K. Sanches, Marcio Merino Fernandes, João M. P. Cardoso, Eduardo do Valle Simões, Eduardo Marques
2004	Misc	`conf`	Teaching embedded systems with FPGAs throughout a computer science course. WCAE Vanderlei Bonato, Ricardo Menotti, Eduardo do Valle Simões, Marcio Merino Fernandes, Eduardo Marques
2003	Misc	`conf`	ARCHITECT-R: A System for Reconfigurable Robots Design. SAC R. A. Gonçalves, P. A. Moraes, João M. P. Cardoso, Denis F. Wolf, Marcio Merino Fernandes, Roseli A. Francelin Romero, Eduardo Marques
2003	—	`conf`	Web Navigation Patterns. ICEIS (4) Ana Cristina Bicharra Garcia, Eduardo Marques
1997	—	`conf`	UB1 - a recurrent neural network based parallel machine for solving simultaneous linear equations. SBRN Donald L. Hung, Antonio Arsgao, Jorge L. Silva, Eduardo Marques, Karl Hillesland
1986	J	`jnl`	Design of a distributed system support based on a centralized parallel bus. SIGARCH Comput. Archit. News Claudio Kirner, Eduardo Marques