Eduardo Augusto Bezerra

47 papers Misc 1Journal 29Unranked 17

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Graph neural networks for the offline nanosatellite task scheduling problem. Appl. Soft Comput. Bruno Machado Pacheco, Laio Oriel Seman, Cezar Antônio Rigo, Eduardo Camponogara, Eduardo Augusto Bezerra, Leandro dos Santos Coelho
2024	J	`jnl`	A real-time SVM-based hardware accelerator for hyperspectral images classification in FPGA. Microprocess. Microsystems Lucas Amilton Martins, Felipe Viel, Laio Oriel Seman, Eduardo Augusto Bezerra, César Albenes Zeferino
2024	J	`jnl`	Benders decomposition for the energy aware task scheduling of constellations of nanosatellites. Comput. Oper. Res. Laio Oriel Seman, Cezar Antônio Rigo, Eduardo Camponogara, Eduardo Augusto Bezerra
2024	J	`jnl`	FloripaSat-2: An Open-Source Platform for CubeSats. IEEE Embed. Syst. Lett. Gabriel Mariano Marcelino, André Martins Pio de Mattos, João Cláudio Elsen Barcellos, Brenda Fernandes Ribeiro, Laio Oriel Seman, Edemar Morsch Filho, Eduardo Augusto Bezerra
2024	J	`jnl`	Hardware-in-the-Loop Simulation of an On-Board Energy-Driven Scheduling Algorithm for CubeSats. IEEE Embed. Syst. Lett. Vinicius Pimenta Bernardo, Laio Oriel Seman, Eduardo Augusto Bezerra, Brenda Fernandes Ribeiro
2024	—	`conf`	TinyML Applied in Hyperspectral Image Classification on COTS Microcontroller. SBESC João Victor Santos Hütner, Felipe Viel, Cesar A. Zeferino, Eduardo Augusto Bezerra
2023	J	`jnl`	A Graph Neural Network Approach to Nanosatellite Task Scheduling: Insights into Learning Mixed-Integer Models. CoRR Bruno Machado Pacheco, Laio Oriel Seman, Cezar Antônio Rigo, Eduardo Camponogara, Eduardo Augusto Bezerra, Leandro dos Santos Coelho
2023	J	`jnl`	Explainable column-generation-based genetic algorithm for knapsack-like energy aware nanosatellite task scheduling. Appl. Soft Comput. Laio Oriel Seman, Cezar Antônio Rigo, Eduardo Camponogara, Eduardo Augusto Bezerra, Leandro dos Santos Coelho
2023	J	`jnl`	Hyperspectral Image Classification: An Analysis Employing CNN, LSTM, Transformer, and Attention Mechanism. IEEE Access Felipe Viel, Renato Cotrim Maciel, Laio Oriel Seman, César Albenes Zeferino, Eduardo Augusto Bezerra, Valderi Reis Quietinho Leithardt
2023	J	`jnl`	Improving energy aware nanosatellite task scheduling by a branch-cut-and-price algorithm. Comput. Oper. Res. Laio Oriel Seman, Cezar Antônio Rigo, Eduardo Camponogara, Pedro Munari, Eduardo Augusto Bezerra
2023	J	`jnl`	MPPT aware task scheduling for nanosatellites using MIP-based ReLU proxy models. Expert Syst. Appl. Cezar Antônio Rigo, Laio Oriel Seman, Edemar Morsch Filho, Eduardo Camponogara, Eduardo Augusto Bezerra
2023	J	`jnl`	On-board energy scheduling optimization algorithm for nanosatellites. Int. J. Circuit Theory Appl. Sara Vega Martínez, Laio Oriel Seman, Edemar Morsch Filho, Leonardo Kessler Slongo, Eduardo Augusto Bezerra
2023	J	`jnl`	Payload-XL: A Platform for the In-Orbit Validation of the BRAVE FPGA. IEEE Embed. Syst. Lett. Felipe Viel, Kleber R. Gouveia, Edilberto Costa, Márcio Oliveira, Miguel Boing, André Martins Pio de Mattos, Gabriel Mariano Marcelino, David Merodio Codinachs, Laio Oriel Seman, Eduardo Augusto Bezerra
2023	J	`jnl`	RNS processor using moduli sets of the form 2 Int. J. Circuit Theory Appl. Vanessa Prediger, Fábio Bairros, Laio Oriel Seman, Eduardo Augusto Bezerra, Héctor Pettenghi
2022	J	`jnl`	A branch-and-price algorithm for nanosatellite task scheduling to improve mission quality-of-service. Eur. J. Oper. Res. Cezar Antônio Rigo, Laio Oriel Seman, Eduardo Camponogara, Edemar Morsch Filho, Eduardo Augusto Bezerra, Pedro Munari
2022	J	`jnl`	A continuous-time formulation for optimal task scheduling and quality-of-service assurance in nanosatellites. Comput. Oper. Res. Eduardo Camponogara, Laio Oriel Seman, Cezar Antônio Rigo, Edemar Morsch Filho, Brenda Fernandes Ribeiro, Eduardo Augusto Bezerra
2021	J	`jnl`	A nanosatellite task scheduling framework to improve mission value using fuzzy constraints. Expert Syst. Appl. Cezar Antônio Rigo, Laio Oriel Seman, Eduardo Camponogara, Edemar Morsch Filho, Eduardo Augusto Bezerra
2021	—	`conf`	Design and Evaluation of Implementation Impact on a Fault-Tolerant Network-on-Chip Router. DTIS Douglas Rossi Melo, César Albenes Zeferino, Eduardo Augusto Bezerra, Luigi Dilillo
2021	J	`jnl`	MPI hardware framework for many-core based embedded systems. Int. J. Sens. Networks Rodrigo V. M. Pereira, Laio Oriel Seman, Marcelo Daniel Berejuck, Douglas Rossi de Melo, Analúcia Schiaffino Morales, Eduardo Augusto Bezerra
2021	J	`jnl`	Static Attitude Determination Using Convolutional Neural Networks. Sensors Guilherme Henrique dos Santos, Laio Oriel Seman, Eduardo Augusto Bezerra, Valderi Reis Quietinho Leithardt, André Sales Mendes, Stéfano Frizzo Stefenon
2021	—	`conf`	Technology Impact on Neutron-Induced Effects in SDRAMs: A Comparative Study. DTIS Lucas Matana Luza, Daniel Söderström, André Martins Pio de Mattos, Eduardo Augusto Bezerra, Carlo Cazzaniga, Maria Kastriotou, Christian Poivey, Luigi Dilillo
2021	J	`jnl`	Universal Verification Platform and Star Simulator for Fast Star Tracker Design. Sensors Victor Hugo Schulz, Gabriel Mariano Marcelino, Laio Oriel Seman, Jeferson Santos Barros, Sangkyun Kim, Mengu Cho, Gabriel Villarrubia-González, Valderi Reis Quietinho Leithardt, Eduardo Augusto Bezerra
2020	J	`jnl`	Centroid determination hardware algorithm for star trackers. Int. J. Sens. Networks Gabriel Mariano Marcelino, Victor Hugo Schulz, Laio Oriel Seman, Eduardo Augusto Bezerra
2020	J	`jnl`	Nanosatellite electrical power system architectures: Models, simulations, and tests. Int. J. Circuit Theory Appl. Leonardo Kessler Slongo, Sara Vega Martínez, Bruno Vale Barbosa Eiterer, Eduardo Augusto Bezerra
2019	—	`conf`	Analyzing the Error Propagation in a Parameterizable Network-on-Chip Router. LATS Douglas Rossi de Melo, César Albenes Zeferino, Luigi Dilillo, Eduardo Augusto Bezerra
2019	J	`jnl`	Fault Tolerant Soft-Core Processor Architecture Based on Temporal Redundancy. J. Electron. Test. Paulo Ricardo Cechelero Villa, Rodrigo Travessini, Roger C. Goerl, Fabian Luis Vargas, Eduardo Augusto Bezerra
2018	J	`jnl`	A dynamic partial reconfiguration design flow for permanent faults mitigation in FPGAs. Microelectron. Reliab. Victor M. Goncalves Martins, Paulo Ricardo Cechelero Villa, Rodrigo Travessini, Marcelo Daniel Berejuck, Eduardo Augusto Bezerra
2018	J	`jnl`	Agent-Based Simulation of Learning Dissemination in a Project-Based Learning Context Considering the Human Aspects. IEEE Trans. Educ. Laio Oriel Seman, Romeu Hausmann, Eduardo Augusto Bezerra
2018	J	`jnl`	An efficient EDAC approach for handling multiple bit upsets in memory array. Microelectron. Reliab. Roger C. Goerl, Paulo Ricardo Cechelero Villa, Letícia Maria Veiras Bolzani, Eduardo Augusto Bezerra, Fabian Luis Vargas
2018	J	`jnl`	On the students' perceptions of the knowledge formation when submitted to a Project-Based Learning environment using web applications. Comput. Educ. Laio Oriel Seman, Romeu Hausmann, Eduardo Augusto Bezerra
2018	—	`conf`	Processor checkpoint recovery for transient faults in critical applications. LATS Paulo Ricardo Cechelero Villa, Rodrigo Travessini, Fabian Luis Vargas, Eduardo Augusto Bezerra
2018	—	`conf`	Processor core profiling for SEU effect analysis. LATS Rodrigo Travessini, Paulo Ricardo Cechelero Villa, Fabian Luis Vargas, Eduardo Augusto Bezerra
2017	—	`conf`	A Digital Implementation of Eddystone Standard Using IBM 180nm Cell Library. SBESC Rodrigo V. M. Pereira, Fernando Rangel de Sousa, Eduardo Augusto Bezerra, Marcelo Daniel Berejuck
2017	—	`conf`	Analysis of single-event upsets in a Microsemi ProAsic3E FPGA. LATS Paulo Ricardo Cechelero Villa, Roger C. Goerl, Fabian Vargas, Leticia B. Poehls, Nilberto H. Medina, Nemitala Added, Vitor A. P. de Aguiar, Eduardo L. A. Macchione, Fernando Aguirre, Marcilei Aparecida Guazzelli da Silveira, Eduardo Augusto Bezerra
2015	—	`conf`	A TMR Strategy with Enhanced Dependability Features Based on a Partial Reconfiguration Flow. ISVLSI Victor M. Goncalves Martins, Paulo Ricardo Cechelero Villa, Horácio C. Neto, Eduardo Augusto Bezerra
2015	—	`conf`	A reconfigurable hardware platform for power converter control systems. ICIT Paulo Ricardo Cechelero Villa, Eduardo Augusto Bezerra, Djones Vinicius Lettnin, Samir Ahmad Mussa
2015	Misc	`conf`	Designing Partial Bitstreams for Multiple Xilinx FPGA Partitions. FCCM Victor M. Goncalves Martins, Joao Gabriel Reis, Horácio C. Neto, Eduardo Augusto Bezerra
2015	J	`jnl`	Experimental analysis of solar energy harvesting circuits efficiency for low power applications. Comput. Electr. Eng. Antônio Augusto Fröhlich, Eduardo Augusto Bezerra, Leonardo Kessler Slongo
2015	—	`conf`	FPGA redundancy recovery based on partial bitstreams for multiple partitions. LATS Victor M. Goncalves Martins, Joao Gabriel Reis, Horácio C. Neto, Eduardo Augusto Bezerra
2014	—	`conf`	Low cost fault detector guided by permanent faults at the end of FPGAs life cycle. LATW Victor M. Goncalves Martins, Frederico Ferlini, Djones Vinicius Lettnin, Eduardo Augusto Bezerra
2013	—	`conf`	Automatic property generation for formal verification applied to HDL-based design of an on-board computer for space applications. LATW Wesley Silva, Eduardo Augusto Bezerra, Markus Winterholer, Djones Lettnin
2012	—	`conf`	Non-intrusive fault tolerance in soft processors through circuit duplication. LATW Frederico Ferlini, Felipe A. da Silva, Eduardo Augusto Bezerra, Djones Vinicius Lettnin
2010	—	`conf`	An adaptive communications module for on-board computers of satellites. AHS Eduardo Augusto Bezerra, Gabriel Marchesan Almeida, Luciano Rigelo Azevedo
2007	—	`conf`	A Reed-Solomon Algorithm for FPGA Area Optimization in Space Applications. AHS Gabriel Marchesan Almeida, Eduardo Augusto Bezerra, Luis Vitorio Cargnini, Rubem Dutra Ribeiro Fagundes, Daniel Gomes Mesquita
2004	—	`conf`	Towards service and user discovery on wireless networks. Mobility Management & Wireless Access Protocols Andrei Oliveira da Silva, Paulo Henrique de Souza Schneider, Fabricio D'Avila Cabral, Ana Cristina Benso da Silva, João Batista S. de Oliveira, Eduardo Augusto Bezerra
2001	J	`jnl`	Improving Reconfigurable Systems Reliability by Combining Periodical Test and Redundancy Techniques: A Case Study. J. Electron. Test. Eduardo Augusto Bezerra, Fabian Vargas, Michael Paul Gough
2000	J	`jnl`	A guide to migrating from microprocessor to FPGA coping with the support tool limitations. Microprocess. Microsystems Eduardo Augusto Bezerra, Michael Paul Gough