Edison Mera

11 papers B 3C 3Journal 4Unranked 1
YearRankTypeTitle / Venue / Authors
2013 J jnl
Porting and refactoring Prolog programs: the PROSYN case study.
Theory Pract. Log. Program.
Edison Mera, Jan Wielemaker
2012 J jnl
An overview of Ciao and its design philosophy.
Theory Pract. Log. Program.
Manuel V. Hermenegildo, Francisco Bueno, Manuel Carro, Pedro López-García, Edison Mera, José F. Morales, Germán Puebla
2011 — conf
An Overview of the Ciao System.
RuleML Europe
Manuel V. Hermenegildo, Francisco Bueno, Manuel Carro, Pedro López-García, Rémy Haemmerlé, Edison Mera, José F. Morales, Germán Puebla
2011 J jnl
An overview of Ciao and its design philosophy
CoRR
Manuel V. Hermenegildo, Francisco Bueno, Manuel Carro, Pedro López-García, Edison Mera, José F. Morales, German Puebla
2011 C conf
Profiling for Run-Time Checking of Computational Properties and Performance Debugging in Logic Programs.
PADL
Edison Mera, Teresa Trigo, Pedro López-García, Manuel V. Hermenegildo
2009 B conf
Integrating Software Testing and Run-Time Checking in an Assertion Verification Framework.
ICLP
Edison Mera, Pedro López-García, Manuel V. Hermenegildo
2008 C conf
Towards execution time estimation in abstract machine-based languages.
PPDP
Edison Mera, Pedro López-García, Manuel Carro, Manuel V. Hermenegildo
2007 C conf
Combining Static Analysis and Profiling for Estimating Execution Times.
PADL
Edison Mera, Pedro López-García, Germán Puebla, Manuel Carro, Manuel V. Hermenegildo
2007 J jnl
Towards Execution Time Estimation for Logic Programs via Static Analysis and Profiling
CoRR
Edison Mera, Pedro López-García, Germán Puebla, Manuel Carro, Manuel V. Hermenegildo
2007 B conf
User-Definable Resource Bounds Analysis for Logic Programs.
ICLP
Jorge A. Navas, Edison Mera, Pedro López-García, Manuel V. Hermenegildo
2006 B conf
Using Combined Static Analysis and Profiling for Logic Program Execution Time Estimation.
ICLP
Edison Mera, Pedro López-García, Germán Puebla, Manuel Carro, Manuel V. Hermenegildo