Ecenur Ustun - RankMe

12 papers A* 1A 4Misc 3Journal 4

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Full System Architecture Modeling for Wearable Egocentric Contextual AI. CoRR Vincent T. Lee, Tanfer Alan, Sung Kim, Ecenur Ustun, Amr Suleiman, Ajit Krisshna, Tim Balbekov, Armin Alaghi, Richard Newcombe
2023	A*	`conf`	Equality Saturation for Datapath Synthesis: A Pathway to Pareto Optimality. DAC Ecenur Ustun, Cunxi Yu, Zhiru Zhang
2023	J	`jnl`	TAPA: A Scalable Task-parallel Dataflow Programming Framework for Modern FPGAs with Co-optimization of HLS and Physical Design. ACM Trans. Reconfigurable Technol. Syst. Licheng Guo, Yuze Chi, Jason Lau, Linghao Song, Xingyu Tian, Moazin Khatti, Weikang Qiao, Jie Wang, Ecenur Ustun, Zhenman Fang, Zhiru Zhang, Jason Cong
2022	Misc	`conf`	IMpress: Large Integer Multiplication Expression Rewriting for FPGA HLS. FCCM Ecenur Ustun, Ismail San, Jiaqi Yin, Cunxi Yu, Zhiru Zhang
2022	J	`jnl`	TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design. CoRR Licheng Guo, Yuze Chi, Jason Lau, Linghao Song, Xingyu Tian, Moazin Khatti, Weikang Qiao, Jie Wang, Ecenur Ustun, Zhenman Fang, Zhiru Zhang, Jason Cong
2021	A	`conf`	AutoBridge: Coupling Coarse-Grained Floorplanning and Pipelining for High-Frequency HLS Design on Multi-Die FPGAs. FPGA Licheng Guo, Yuze Chi, Jie Wang, Jason Lau, Weikang Qiao, Ecenur Ustun, Zhiru Zhang, Jason Cong
2021	A	`conf`	GraphLily: Accelerating Graph Linear Algebra on HBM-Equipped FPGAs. ICCAD Yuwei Hu, Yixiao Du, Ecenur Ustun, Zhiru Zhang
2021	J	`jnl`	Programming and Synthesis for Software-defined FPGA Acceleration: Status and Future Prospects. ACM Trans. Reconfigurable Technol. Syst. Yi-Hsiang Lai, Ecenur Ustun, Shaojie Xiang, Zhenman Fang, Hongbo Rong, Zhiru Zhang
2020	A	`conf`	Accurate Operation Delay Prediction for FPGA HLS Using Graph Neural Networks. ICCAD Ecenur Ustun, Chenhui Deng, Debjit Pal, Zhijing Li, Zhiru Zhang
2019	Misc	`conf`	LAMDA: Learning-Assisted Multi-stage Autotuning for FPGA Design Closure. FCCM Ecenur Ustun, Shaojie Xiang, Jinny Gui, Cunxi Yu, Zhiru Zhang
2018	A	`conf`	DATuner: An Extensible Distributed Autotuning Framework for FPGA Design and Design Automation: (Abstract Only). FPGA Gai Liu, Ecenur Ustun, Shaojie Xiang, Chang Xu, Guojie Luo, Zhiru Zhang
2018	Misc	`conf`	Fast and Accurate Estimation of Quality of Results in High-Level Synthesis with Machine Learning. FCCM Steve Dai, Yuan Zhou, Hang Zhang, Ecenur Ustun, Evangeline F. Y. Young, Zhiru Zhang