Dwight D. Hill

28 papers A* 8A 1B 2C 4Journal 10Unranked 2

Year	Rank	Type	Title / Venue / Authors
2012	—	`conf`	Clock mesh framework. ISQED Pinaki Chakrabarti, Vikram Bhatt, Dwight D. Hill, Aiqun Cao
2004	J	`jnl`	Guest Editors' Introduction: RTL to GDSII - From Foilware to Standard Practice. IEEE Des. Test Comput. Dwight D. Hill, Andrew B. Kahng
2000	J	`jnl`	An industrial view of electronic design automation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Don MacMillen, Raul Camposano, Dwight D. Hill, Thomas W. Williams
2000	J	`jnl`	Editorial. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Martin D. F. Wong, Dwight D. Hill
2000	—	`ed.`	Proceedings of the 2000 International Symposium on Physical Design, ISPD 2000, San Diego, CA, USA, April 9-12, 2000 ISPD Manfred Wiesel, Dwight D. Hill
1997	A	`conf`	Architectural and Physical Design Challenges for One-Million Gate FPGAs and Beyond. FPGA Jonathan Rose, Dwight D. Hill
1993	J	`jnl`	The benefits of flexibility in lookup table-based FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Dwight D. Hill, Nam Sung Woo
1992	A*	`conf`	FPGA Design Principles (A Tutorial). DAC Dwight D. Hill, Ewald Detjens
1992	B	`conf`	ORCA: A New Architecture for High-Performance FPLs. FPL Dwight D. Hill, Barry K. Britton, William Oswald, Nam Sung Woo, Satwant Singh, Che-Tsung Chen, Bob Krambeck
1992	C	`conf`	Routable Technologie Mapping for LUT FPGAs. ICCD Narasimha B. Bhat, Dwight D. Hill
1992	J	`jnl`	Three Decades of HDLs: Part II, Conlan Through Verilog. IEEE Des. Test Comput. Dominique Borrione, Robert Piloty, Dwight D. Hill, Karl J. Lieberherr, Philip Moorby
1991	A*	`conf`	A CAD System for the Design of Field Programmable Gate Arrays. DAC Dwight D. Hill
1990	A*	`conf`	Benchmarks for Cell Synthesis. DAC Dwight D. Hill, Bryan Preas
1990	A*	`conf`	Global Routing Considerations in a Cell Synthesis System. DAC Dwight D. Hill, Don Shugard
1990	C	`conf`	Placement algorithms for CMOS cell synthesis. ICCD Dwight D. Hill, Marw A. Aranha, Donald D. Shugard
1990	C	`conf`	Preliminary description of Tabula Rasa, an electrically reconfigurable hardware engine. ICCD Dwight D. Hill, Daniel R. Cassiday
1988	C	`conf`	Alternative strategies for applying min-cut to VLSI placement. ICCD Dwight D. Hill
1985	B	`conf`	Design and Implementation of Switching Systems for Parallel Processors. ICPP Ran Ginosar, Dwight D. Hill
1985	A*	`conf`	Effective use of virtual grid compaction in macro-module generators. DAC Dwight D. Hill, John P. Fishburn, Mary Diane Palmer Leland
1985	—	`conf`	Prolog in CMOS Circuit Design. COMPCON Dwight D. Hill, Shaibal Roy
1984	A*	`conf`	An Architecture and Protocol for a high Speed Local Area Network Supporting Integrated Traffic. INFOCOM John O. Limb, Dwight D. Hill, Jon W. Mark, D. K. Sharma, H. A. Wilder
1984	J	`jnl`	Icon: A Tool for Design at Schematic, Virtual Grid, and Layout Levels. IEEE Des. Test Dwight D. Hill
1983	J	`jnl`	An analysis of C machine support for other block-structured languages. SIGARCH Comput. Archit. News Dwight D. Hill
1983	A*	`conf`	Edisim and Edicap: Graphical simulator interfaces. DAC Dwight D. Hill
1983	J	`jnl`	Edisim: A Graphical Simulator Interface for LSI Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Dwight D. Hill
1982	J	`jnl`	Dragnet: a local network with protection. Comput. Commun. Rev. Dwight D. Hill
1981	J	`jnl`	A hardware mechanism for supporting range checks. SIGARCH Comput. Archit. News Dwight D. Hill
1979	A*	`conf`	SABLE: A tool for generating structured, multi-level simulations. DAC Dwight D. Hill, William M. van Cleemput