Dusan Bozilov

11 papers C 1Misc 1Journal 7Unranked 2
YearRankTypeTitle / Venue / Authors
2022 J jnl
Optimized threshold implementations: securing cryptographic accelerators for low-energy and low-latency applications.
J. Cryptogr. Eng.
Dusan Bozilov, Miroslav Knezevic, Ventzislav Nikov
2021 J jnl
New First-Order Secure AES Performance Records.
IACR Cryptol. ePrint Arch.
Aein Rezaei Shahmirzadi, Dusan Bozilov, Amir Moradi
2021 J jnl
New First-Order Secure AES Performance Records.
IACR Trans. Cryptogr. Hardw. Embed. Syst.
Aein Rezaei Shahmirzadi, Dusan Bozilov, Amir Moradi
2020 J jnl
On Optimality of d + 1 TI Shared Functions of 8 Bits or Less.
IACR Cryptol. ePrint Arch.
Dusan Bozilov
2020 Misc conf
PRINCEv2 - More Security for (Almost) No Overhead.
SAC
Dusan Bozilov, Maria Eichlseder, Miroslav Knezevic, Baptiste Lambin, Gregor Leander, Thorben Moos, Ventzislav Nikov, Shahram Rasoolzadeh, Yosuke Todo, Friedrich Wiemer
2020 J jnl
PRINCEv2 - More Security for (Almost) No Overhead.
IACR Cryptol. ePrint Arch.
Dusan Bozilov, Maria Eichlseder, Miroslav Knezevic, Baptiste Lambin, Gregor Leander, Thorben Moos, Ventzislav Nikov, Shahram Rasoolzadeh, Yosuke Todo, Friedrich Wiemer
2019 — conf
Design Trade-offs in Threshold Implementations.
ICECS
Dusan Bozilov, Ventzislav Nikov, Vincent Rijmen
2019 C conf
Optimized Threshold Implementations: Minimizing the Latency of Secure Cryptographic Accelerators.
CARDIS
Dusan Bozilov, Miroslav Knezevic, Ventzislav Nikov
2018 J jnl
Optimized Threshold Implementations: Securing Cryptographic Accelerators for Low-Energy and Low-Latency Applications.
IACR Cryptol. ePrint Arch.
Dusan Bozilov, Miroslav Knezevic, Ventzislav Nikov
2018 — conf
Teaching HW/SW codesign with a Zynq ARM/FPGA SoC.
EWME
Josep Balasch, Arthur Beckers, Dusan Bozilov, Sujoy Sinha Roy, Furkan Turan, Ingrid Verbauwhede
2017 J jnl
A Note on 5-bit Quadratic Permutations' Classification.
IACR Trans. Symmetric Cryptol.
Dusan Bozilov, Begül Bilgin, Haci Ali Sahin