Duncan G. Elliott

42 papers B 1C 6Misc 1Journal 21Unranked 13
YearRankTypeTitle / Venue / Authors
2020 J jnl
Analytic Model for Low Earth Orbit Satellite Solar Power.
IEEE Trans. Aerosp. Electron. Syst.
John Petrus Grey, Ian R. Mann, Michael D. Fleischauer, Duncan G. Elliott
2019 J jnl
A High-Performance and Energy-Efficient FIR Adaptive Filter Using Approximate Distributed Arithmetic Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap.
Honglan Jiang, Leibo Liu, Pieter P. Jonker, Duncan G. Elliott, Fabrizio Lombardi, Jie Han
2019 — conf
Design and Verification of a Robust Release Mechanism for CubeSat Deployables.
CCECE
Stefan Damkjar, Collin Cupido, Charles Nokes, Ian R. Mann, Duncan G. Elliott
2018 C conf
Frequency Synthesis Based on A Novel Differential Locking Mechanism.
ISCAS
Jinghang Liang, Duncan G. Elliott
2018 J jnl
High-Efficiency Charge Pumps for Low-Power On-Chip Applications.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xiaoxue Jiang, Xiaojian Yu, Kambiz Moez, Duncan G. Elliott, Jie Chen
2016 C conf
Coresidual alias-locked loops.
ISCAS
Jinghang Liang, Duncan G. Elliott
2016 J jnl
Design, evaluation and fault-tolerance analysis of stochastic FIR filters.
Microelectron. Reliab.
Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott
2016 C conf
HV-CMOS single-chip electronics platform for lab-on-chip DNA analysis.
ISCAS
David L. Sloan, Benjamin Martin, Gordon Hall, Andrew Hakman, Philip A. Marshall, Stephane Martel, Christopher J. Backhouse, Vincent C. Gaudet, Duncan G. Elliott
2016 J jnl
Stochastic Circuit Design and Performance Evaluation of Vector Quantization for Different Error Measures.
IEEE Trans. Very Large Scale Integr. Syst.
Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott
2015 — conf
Design and evaluation of stochastic FIR filters.
PACRIM
Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott
2015 — conf
Stochastic circuit design and performance evaluation of vector quantization.
ASAP
Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott
2013 J jnl
A 6.0-13.5 GHz Alias-Locked Loop Frequency Synthesizer in 130 nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jinghang Liang, Zhiyin Zhou, Jie Han, Duncan G. Elliott
2012 J jnl
Deeply Pipelined Digit-Serial LDPC Decoding.
IEEE Trans. Circuits Syst. I Regul. Pap.
Philip A. Marshall, Vincent C. Gaudet, Duncan G. Elliott
2012 — conf
Effects of Varying Message Precision in Digit-Online LDPC Decoders.
SiPS
Philip A. Marshall, Vincent C. Gaudet, Duncan G. Elliott
2012 — conf
Power Characterization of a Gbit/s FPGA Convolutional LDPC Decoder.
SiPS
Si-Yun J. Li, Tyler L. Brandon, Duncan G. Elliott, Vincent C. Gaudet
2011 J jnl
Design and Characterization of a Multilevel DRAM.
IEEE Trans. Very Large Scale Integr. Syst.
John C. Koob, Sue Ann Ung, Bruce F. Cockburn, Duncan G. Elliott
2010 J jnl
Jointly Designed Architecture-Aware LDPC Convolutional Codes and High-Throughput Parallel Encoders/Decoders.
IEEE Trans. Circuits Syst. I Regul. Pap.
Zhengang Chen, Tyler L. Brandon, Duncan G. Elliott, Stephen Bates, Witold A. Krzymien, Bruce F. Cockburn
2009 J jnl
A Compact 1.1-Gb/s Encoder and a Memory-Based 600-Mb/s Decoder for LDPC Convolutional Codes.
IEEE Trans. Circuits Syst. I Regul. Pap.
Tyler L. Brandon, John C. Koob, Leendert van den Berg, Zhengang Chen, Amirhossein Alimohammad, Ramkrishna Swamy, Jason Klaus, Stephen Bates, Vincent C. Gaudet, Bruce F. Cockburn, Duncan G. Elliott
2009 J jnl
High-Voltage CMOS Controller for Microfluidics.
IEEE Trans. Biomed. Circuits Syst.
Maziyar Khorasani, Mohammad Behnam, Leendert van den Berg, Christopher J. Backhouse, Duncan G. Elliott
2008 C conf
A 600-Mb/s encoder and decoder for low-density parity-check convolutional codes.
ISCAS
Tyler L. Brandon, John C. Koob, Leendert van den Berg, Zhengang Chen, Amirhossein Alimohammad, Ramkrishna Swamy, Jason Klaus, Stephen Bates, Vincent C. Gaudet, Bruce F. Cockburn, Duncan G. Elliott
2008 J jnl
A scalable LDPC decoder ASIC architecture with bit-serial message exchange.
Integr.
Tyler L. Brandon, Robert Hang, Gary Block, Vincent C. Gaudet, Bruce F. Cockburn, Sheryl L. Howard, Christian Giasson, Keith Boyle, Paul Goud, Siavash Sheikh Zeinoddin, Anthony Rapley, Stephen Bates, Duncan G. Elliott, Christian Schlegel
2008 C conf
An alias-locked loop frequency synthesis architecture.
ISCAS
Leendert van den Berg, Duncan G. Elliott
2008 J jnl
Efficient Implementation of Low-Density Parity-Check Convolutional Code Encoders With Built-In Termination.
IEEE Trans. Circuits Syst. I Regul. Pap.
Zhengang Chen, Tyler L. Brandon, Stephen Bates, Duncan G. Elliott, Bruce F. Cockburn
2008 C conf
Low-power static and dynamic high-voltage CMOS level-shifter circuits.
ISCAS
Maziyar Khorasani, Leendert van den Berg, Philip A. Marshall, Meysam Zargham, Vincent C. Gaudet, Duncan G. Elliott, Stephane Martel
2007 J jnl
Clock-Logic Domino Circuits for High-Speed and Energy-Efficient Microprocessor Pipelines.
IEEE Trans. Circuits Syst. II Express Briefs
Raymond J. Sung, Duncan G. Elliott
2007 J jnl
Design and Test of a 175-Mb/s, Rate-1/2 (128, 3, 6) Low-Density Parity-Check Convolutional Code Encoder and Decoder.
IEEE J. Solid State Circuits
Ramkrishna Swamy, Stephen Bates, Tyler L. Brandon, Bruce F. Cockburn, Duncan G. Elliott, John C. Koob, Zhengang Chen
2006 B conf
Efficient Encoding and Termination of Low-Density Parity-Check Convolutional Codes.
GLOBECOM
Zhengang Chen, Stephen Bates, Duncan G. Elliott, Tyler L. Brandon
2006 J jnl
Termination Sequence Generation Circuits for Low-Density Parity-Check Convolutional Codes.
IEEE Trans. Circuits Syst. I Regul. Pap.
Stephen Bates, Duncan G. Elliott, Ramkrishna Swamy
2006 J jnl
Using Stacked Bitlines and Hybrid ROM Cells to Form ROM and SRAM-ROM With Increased Storage Density.
IEEE Trans. Circuits Syst. I Regul. Pap.
Tyler L. Brandon, Duncan G. Elliott, Bruce F. Cockburn
2005 J jnl
Design of a 3-D fully depleted SOI computational RAM.
IEEE Trans. Very Large Scale Integr. Syst.
John C. Koob, Daniel A. Leder, Raymond J. Sung, Tyler L. Brandon, Duncan G. Elliott, Bruce F. Cockburn, Lisa G. McIlrath
2005 Misc conf
Test and Characterization of a Variable-Capacity Multilevel DRAM.
VTS
John C. Koob, Sue Ann Ung, Ashwin S. Rao, Daniel A. Leder, Craig S. Joly, Kristopher C. Breen, Tyler L. Brandon, Michael Hume, Bruce F. Cockburn, Duncan G. Elliott
2003 — conf
A Multilevel DRAM with Hierarchical Bitlines and Serial Sensing.
MTDT
Bruce F. Cockburn, Jesús Hernández Tapia, Duncan G. Elliott
2003 J jnl
Aliasing and anti-aliasing in branch history table prediction.
SIGARCH Comput. Archit. News
Kristopher C. Breen, Duncan G. Elliott
2003 — conf
An Efficient Functional Test for the Massively-Parallel C ?RAM Logic-Enhanced Memory Architecture.
DFT
Xiaoling Sun, Bruce F. Cockburn, Duncan G. Elliott
2002 — conf
An Investigation into Crosstalk Noise in DRAM Structures.
MTDT
Michael Redeker, Bruce F. Cockburn, Duncan G. Elliott
2002 — conf
Fault Modeling and Pattern-Sensitivity Testing for a Multilevel DRAM.
MTDT
Michael Redeker, Bruce F. Cockburn, Duncan G. Elliott, Yunan Xiang, Sue Ann Ung
2001 — conf
Design of an Embedded Fully-Depleted SOI SRAM.
MTDT
Raymond J. Sung, John C. Koob, Tyler L. Brandon, Duncan G. Elliott, Bruce F. Cockburn
1999 — conf
A Comparative Simulation Study of Four Multilevel DRAMs.
MTDT
Gershom Birk, Duncan G. Elliott, Bruce F. Cockburn
1999 J jnl
Computational RAM: Implementing Processors in Memory.
IEEE Des. Test Comput.
Duncan G. Elliott, Michael Stumm, W. Martin Snelgrove, Christian Cojocaru, Robert McKenzie
1999 — conf
Cost Models for Large File Memory DRAMs with ECC and Bad Block Marking.
DFT
C. Wickman, Duncan G. Elliott, Bruce F. Cockburn
1999 J jnl
Fault Models and Tests for a 2-Bit-per-Cell MLDRAM.
IEEE Des. Test Comput.
Michael Redeker, Bruce F. Cockburn, Duncan G. Elliott
1999 — conf
Minimizing the effect of the host bus on the performance of a computational RAM logic-in-memory parallel-processing system.
CICC
Peter M. Nyasulu, Ralph Mason, W. Martin Snelgrove, Duncan G. Elliott