Douglas R. Melo

29 papers C 1Journal 7Unranked 21

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A resource-constrained CNN accelerator for real-time license plate character recognition on FPGA platforms. Integr. George B. Nardes, Thiago H. Rausch, Bruna Henning Pereira, Douglas R. Melo, Cesar A. Zeferino
2026	—	`conf`	Characterization of a Fault-Tolerant RISC-V SoC in an SRAM-based FPGA Under Proton Irradiation. LATS Wesley Grignani, Douglas A. dos Santos, Carolina Imianosky, Douglas R. Melo, Frédéric Wrobel, Luigi Dilillo
2026	—	`conf`	Design and Reliability Analysis of a Pipeline RISC-V Processor Core. LATS Douglas A. dos Santos, Wesley Grignani, Carolina Imianosky, Douglas R. Melo, Luigi Dilillo
2026	—	`conf`	Resilience Analysis of a Fault-Tolerant MPSoC Interconnection Architecture Under SEU Fault Injection. LATS Thiago H. Rausch, Wesley Grignani, Luigi Dilillo, Douglas R. Melo
2025	J	`jnl`	A Dependable and Low-Cost CCSDS 123 Hyperspectral Image Compressor. IEEE Embed. Syst. Lett. Wesley Grignani, Douglas A. dos Santos, Felipe Viel, Luigi Dilillo, Douglas R. Melo
2025	—	`conf`	A Low-Cost Accelerator for License Plate Character Recognition Using Convolutional Neural Networks. LASCAS George B. Nardes, Thiago H. Rausch, Douglas R. Melo, Cesar A. Zeferino
2025	J	`jnl`	A fault-tolerant CCSDS 123 hardware accelerator for space applications. Integr. Wesley Grignani, Felipe Viel, Douglas A. dos Santos, Luigi Dilillo, Douglas R. Melo
2025	J	`jnl`	Energy-Efficient CNN Hardware Accelerator for Real-Time Construction Progress Monitoring. IEEE Access George B. Nardes, Luiz Fernando Heidrich Duarte, Wesley Grignani, Douglas R. Melo, Cesar A. Zeferino
2025	—	`conf`	Evaluating FPGA Architectures for Quantized CNN Inference in Construction Monitoring Applications. ICECS George B. Nardes, Wesley Grignani, Thiago H. Rausch, Luiz Fernando Heidrich Duarte, Douglas R. Melo, Cesar A. Zeferino
2025	—	`conf`	FPGA-Based Platform for Food Classification Using Hyperspectral Images. ICECS Leonardo Januário, Bruna Henning Pereira, Bruno J. Mello, Douglas R. Melo, Felipe Viel, Cesar A. Zeferino
2025	—	`conf`	Hardening an AMBA-AXI Network Interface for a Reliable Network-on-Chip. LASCAS Thiago H. Rausch, Wesley Grignani, Gustavo H. S. Müller, Douglas A. dos Santos, Luigi Dilillo, Douglas R. Melo
2025	—	`conf`	Reliability and Performance Evaluation of a Fault-Tolerant MPSoC Interconnection Architecture. DFT Thiago H. Rausch, Wesley Grignani, Luigi Dilillo, Douglas R. Melo
2024	—	`conf`	Deep Nibble: A 4-bit Number Format for Efficient DNN Training and Inference in FPGA. SBCCI Luiz Fernando Heidrich Duarte, George B. Nardes, Wesley Grignani, Douglas R. Melo, Cesar A. Zeferino
2024	—	`conf`	Implementation and Reliability Evaluation of a ChaCha20 Stream Cipher Hardware Accelerator. DFT Wesley Grignani, Khalil G. Queiroz de Santana, Douglas A. dos Santos, Luigi Dilillo, Douglas R. Melo
2024	—	`conf`	Reliability Analysis of a Low-Cost CCSDS 123 Hyperspectral Image Compressor. DFT Wesley Grignani, Douglas A. dos Santos, Luigi Dilillo, Douglas R. Melo
2024	—	`conf`	Special Session: Reliability and Performance Evaluation of a RISC-V Vector Extension Unit for Vector Multiplication. DFT Carolina Imianosky, Douglas A. dos Santos, Douglas R. Melo, Felipe Viel, Luigi Dilillo
2023	—	`conf`	A Low-Cost Hardware Accelerator for CCSDS 123 Lossless Hyperspectral Image Compression. DFT Wesley Grignani, Douglas A. dos Santos, Luigi Dilillo, Felipe Viel, Douglas R. Melo
2023	—	`conf`	Characterization of a Fault-Tolerant RISC-V System-on-Chip for Space Environments. DFT Douglas A. dos Santos, André Martins Pio de Mattos, Douglas R. Melo, Luigi Dilillo
2023	—	`conf`	Hardening a Real-Time Operating System for a Dependable RISC-V System-on-Chip. DFT Benjamin W. Mezger, Douglas A. dos Santos, Luigi Dilillo, Douglas R. Melo
2023	—	`conf`	Implementation and Reliability Evaluation of a RISC-V Vector Extension Unit. DFT Carolina Imianosky, Douglas A. dos Santos, Douglas R. Melo, Felipe Viel, Luigi Dilillo
2023	—	`conf`	Using HARV-SoC for Reliable Sensing Applications in Radiation Harsh Environments. IWASI André Martins Pio de Mattos, Douglas A. dos Santos, Carolina Imianosky, Douglas R. Melo, Luigi Dilillo
2022	J	`jnl`	A Survey of the RISC-V Architecture Software Support. IEEE Access Benjamin W. Mezger, Douglas A. dos Santos, Luigi Dilillo, Cesar A. Zeferino, Douglas R. Melo
2022	—	`conf`	Neutron Irradiation Testing and Analysis of a Fault-Tolerant RISC-V System-on-Chip. DFT Douglas A. dos Santos, André Martins Pio de Mattos, Lucas M. Luza, Carlo Cazzaniga, Maria Kastriotou, Douglas R. Melo, Luigi Dilillo
2021	—	`conf`	Characterization of a RISC-V System-on-Chip under Neutron Radiation. DTIS Douglas A. dos Santos, Lucas M. Luza, Maria Kastriotou, Carlo Cazzaniga, Cesar A. Zeferino, Douglas R. Melo, Luigi Dilillo
2019	C	`conf`	A Low-Cost Hardware Accelerator for CCSDS 123 Predictor in FPGA. ISCAS Lucas M. V. Pereira, Douglas A. dos Santos, Cesar A. Zeferino, Douglas R. Melo
2019	—	`conf`	Characterization of a RISC-V Microcontroller Through Fault Injection. ApplePies Dario Asciolla, Luigi Dilillo, Douglas A. dos Santos, Douglas R. Melo, Alessandra Menicucci, Marco Ottavi
2019	J	`jnl`	Maximizing the Inner Resilience of a Network-on-Chip through Router Controllers Design. Sensors Douglas R. Melo, Cesar A. Zeferino, Luigi Dilillo, Eduardo A. Bezerra
2018	—	`conf`	Analysis of LEON3 systems integration for a Network-on-Chip. LATS Lucas M. V. Pereira, Douglas R. Melo, Cesar A. Zeferino, Eduardo A. Bezerra
2014	J	`jnl`	XIRU: Interface de Rede Extensível para Integração de Núcleos a uma Rede-em-Chip. RITA Douglas R. Melo, Michelle S. Wangham, Cesar A. Zeferino