Doris Schmitt-Landsiedel

109 papers A* 1A 6B 1C 9Journal 34Unranked 56

Year	Rank	Type	Title / Venue / Authors
2017	—	`conf`	A 92.1% efficient DC-DC converter for ultra-low power microcontrollers with fast wake-up. CICC Francesco Santoro, Rüdiger Kuhn, Neil Gibson, Nicola Rasera, Thomas Tost, Doris Schmitt-Landsiedel, Ralf Brederlow
2017	J	`jnl`	Emulation of an ASIC power and temperature monitoring system (eTPMon) for FPGA prototyping. Microprocess. Microsystems Elisabeth Glocker, Qingqing Chen, Ulf Schlichtmann, Doris Schmitt-Landsiedel
2016	—	`conf`	2.9 A 2GHz 244fs-resolution 1.2ps-Peak-INL edge-interpolator-based digital-to-time converter in 28nm CMOS. ISSCC Sebastian Sievert, Ofir B. Degani, Assaf Ben Bassat, Rotem Banin, Ashoke Ravi, Bernd-Ulrich Klepser, Zdravko Boos, Doris Schmitt-Landsiedel
2016	J	`jnl`	A 2 GHz 244 fs-Resolution 1.2 ps-Peak-INL Edge Interpolator-Based Digital-to-Time Converter in 28 nm CMOS. IEEE J. Solid State Circuits Sebastian Sievert, Ofir Degani, Assaf Ben Bassat, Rotem Banin, Ashoke Ravi, Wolfgang Thomann, Bernd-Ulrich Klepser, Zdravko Boos, Doris Schmitt-Landsiedel
2016	—	`conf`	A 9-bit, 1.08ps resolution two-step time-to-digital converter in 65 nm CMOS for time-mode ADC. APCCAS Junjie Kong, Stephan Henzler, Doris Schmitt-Landsiedel, Liter Siek
2016	—	`conf`	A novel micropump driver used in environmental sensor applications. IEEE SENSORS Bernadette Kinzel, Detlef Bonfert, Florian Lippert, Frank Vanselow, Erkan Isa, Doris Schmitt-Landsiedel, Linus Maurer
2016	J	`jnl`	Dark silicon management: an integrated and coordinated cross-layer approach. it Inf. Technol. Santiago Pagani, Lars Bauer, Qingqing Chen, Elisabeth Glocker, Frank Hannig, Andreas Herkersdorf, Heba Khdr, Anuj Pathania, Ulf Schlichtmann, Doris Schmitt-Landsiedel, Mark Sagi, Éricles Sousa, Philipp Wagner, Volker Wenzel, Thomas Wild, Jörg Henkel
2016	B	`conf`	In situ measurement of aging-induced performance degradation in digital circuits. ETS Nasim Pour Aryan, Christian Funke, Jens Bargfrede, Cenk Yilmaz, Doris Schmitt-Landsiedel, Georg Georgakos
2016	J	`jnl`	Scanning Microwave Microscopy for Electronic Device Analysis on Nanometre Scale. Microelectron. Reliab. Sören Hommel, Nicole Killat, Andreas Altes, Thomas Schweinböck, Doris Schmitt-Landsiedel, Marco Silvestri, Oliver Haeberlen
2016	—	`conf`	Towards Logic-In-Memory circuits using 3D-integrated Nanomagnetic logic. ICRC Fabrizio Riente, Grazvydas Ziemys, Giovanna Turvani, Doris Schmitt-Landsiedel, Stephan Breitkreutz-v. Gamm, Mariagrazia Graziano
2015	—	`conf`	A 13.56MHz class e power amplifier for inductively coupled DC supply with 95% power added efficiency (PAE). EURFID Franz Johann Stubenrauch, Norbert Seliger, Maximilian Schustek, Alexey Lebedev, Doris Schmitt-Landsiedel
2015	—	`conf`	Emulation of an ASIC power and temperature monitor system for FPGA prototyping. ReCoSoC Elisabeth Glocker, Qingqing Chen, Asheque M. Zaidi, Ulf Schlichtmann, Doris Schmitt-Landsiedel
2015	—	`conf`	Modelling and simulation of nanomagnetic logic with cadence virtuoso using Verilog-A. ESSDERC Grazvydas Ziemys, Andrew Giebfried, Markus Becherer, Irina Eichwald, Doris Schmitt-Landsiedel, Stephan Breitkreutz-v. Gamm
2015	—	`conf`	Slope only sense amplifier with 4.5ns sense delay for 8Mbit memory sector, employing in situ current monitoring with 66% write speed improvement in 40nm embedded flash for automotive. ESSCIRC Mihail Jefremow, Doris Schmitt-Landsiedel, Thomas Kern, Martin Stiftinger, Christoph Roll
2014	J	`jnl`	A compact model for NBTI degradation and recovery under use-profile variations and its application to aging analysis of digital integrated circuits. Microelectron. Reliab. Veit B. Kleeberger, Martin Barke, Christoph Werner, Doris Schmitt-Landsiedel, Ulf Schlichtmann
2014	J	`jnl`	Architectural and Circuit Design Techniques for Power Management of Ultra-Low-Power MCU Systems. IEEE Trans. Very Large Scale Integr. Syst. Michael Lueders, Björn Eversmann, Johannes Gerber, Korbinian Huber, Rüdiger Kuhn, Michael Zwerg, Doris Schmitt-Landsiedel, Ralf Brederlow
2014	J	`jnl`	Emulated ASIC Power and Temperature Monitor System for FPGA Prototyping of an Invasive MPSoC Computing Architecture. CoRR Elisabeth Glocker, Qingqing Chen, Asheque M. Zaidi, Ulf Schlichtmann, Doris Schmitt-Landsiedel
2014	C	`conf`	From an analytic NBTI device model to reliability assessment of complex digital circuits. IOLTS Nasim Pour Aryan, A. Listl, Leonhard Heiß, Cenk Yilmaz, Georg Georgakos, Doris Schmitt-Landsiedel
2014	—	`conf`	Power efficient digital IC design for a medical application with high reliability requirements. PATMOS Nasim Pour Aryan, Nils Heidmann, Martin Wirnshofer, Nico Hellwege, Jonas Pistor, Dagmar Peters-Drolshagen, Georg Georgakos, Steffen Paul, Doris Schmitt-Landsiedel
2014	J	`jnl`	Resilience and yield of flip-flops in future CMOS technologies under process variations and aging. IET Circuits Devices Syst. Christoph Werner, Benedikt Backs, Martin Wirnshofer, Doris Schmitt-Landsiedel
2013	—	`conf`	A 65nm 4MB embedded flash macro for automotive achieving a read throughput of 5.7GB/s and a write throughput of 1.4MB/s. ESSCIRC Mihail Jefremow, Thomas Kern, Ulrich Backhausen, J. Elbs, B. Rousseau, Christoph Roll, L. Castro, T. Roehr, E. Paparisto, K. Herfurth, R. Bartenschlager, Stefanie Thierold, R. Renardy, Stephan Kassenetter, N. Lawal, M. Strasser, W. Trottmann, Doris Schmitt-Landsiedel
2013	—	`conf`	Nanomagnetic logic clocked in the MHz regime. ESSDERC Markus Becherer, Josef Kiermaier, Stephan Breitkreutz, Irina Eichwald, György Csaba, Doris Schmitt-Landsiedel
2013	—	`conf`	Reliability monitoring of digital circuits by in situ timing measurement. PATMOS Nasim Pour Aryan, Georg Georgakos, Doris Schmitt-Landsiedel
2013	—	`conf`	Time-differential sense amplifier for sub-80mV bitline voltage embedded STT-MRAM in 40nm CMOS. ISSCC Mihail Jefremow, Thomas Kern, Wolf Allers, Christian Peters, Jan Otterstedt, Othmane Bahlous, Karl Hofmann, Robert Allinger, Stephan Kassenetter, Doris Schmitt-Landsiedel
2012	C	`conf`	Adaptive voltage scaling by in-situ delay monitoring for an image processing circuit. DDECS Martin Wirnshofer, Leonhard Heiß, Anil Narayan Kakade, Nasim Pour Aryan, Georg Georgakos, Doris Schmitt-Landsiedel
2012	—	`conf`	Bitline-capacitance-cancelation sensing scheme with 11ns read latency and maximum read throughput of 2.9GB/s in 65nm embedded flash for automotive. ISSCC Mihail Jefremow, Thomas Kern, Ulrich Backhausen, Christian Peters, Christoph Parzinger, Christoph Roll, Stephan Kassenetter, Stefanie Thierold, Doris Schmitt-Landsiedel
2012	J	`jnl`	On-Line Supply voltage Scaling Based on J. Circuits Syst. Comput. Martin Wirnshofer, Nasim Pour Aryan, Leonhard Heiß, Doris Schmitt-Landsiedel, Georg Georgakos
2011	C	`conf`	A variation-aware adaptive voltage scaling technique based on in-situ delay monitoring. DDECS Martin Wirnshofer, Leonhard Heiß, Georg Georgakos, Doris Schmitt-Landsiedel
2011	—	`conf`	An aging suppression and calibration approach for differential amplifiers in advanced CMOS technologies. ESSCIRC Florian Chouard, Shailesh More, Michael Fulde, Doris Schmitt-Landsiedel
2011	C	`conf`	An analog perspective on device reliability in 32nm high-κ metal gate technology. DDECS Florian Chouard, Shailesh More, Michael Fulde, Doris Schmitt-Landsiedel
2011	J	`jnl`	DRAM Yield Analysis and Optimization by a Statistical Design Approach. IEEE Trans. Circuits Syst. I Regul. Pap. Yan Li, Helmut Schneider, Florian Schnabel, Roland Thewes, Doris Schmitt-Landsiedel
2011	—	`ch.`	Invasive Computing: An Overview. Multiprocessor System-on-Chip Jürgen Teich, Jörg Henkel, Andreas Herkersdorf, Doris Schmitt-Landsiedel, Wolfgang Schröder-Preikschat, Gregor Snelting
2011	—	`conf`	Reducing impact of degradation on analog circuits by chopper stabilization and autozeroing. ISQED Shailesh More, Michael Fulde, Florian Chouard, Doris Schmitt-Landsiedel
2010	—	`conf`	Reliability assessment of voltage controlled oscillators in 32nm high-κ metal gate technology. ESSCIRC Florian Chouard, Michael Fulde, Doris Schmitt-Landsiedel
2009	C	`conf`	A Robust Synchronized 2N2P LC Oscillator with a Shut-down Mode for Adiabatic Logic Circuits. ISCAS Philip Teichmann, Jürgen Fischer, Doris Schmitt-Landsiedel
2009	—	`conf`	Adaptive circuit block model for power supply noise analysis of low power system-on-chip. SoC Matthias Eireiner, Doris Schmitt-Landsiedel, Paul Wallner, Andreas Schöne, Stephan Henzler, Ulrich Fiedler
2009	C	`conf`	Adder Circuits with Transistors using Independently Controlled Gates. ISCAS Marcus Weis, Andrzej Pfitzner, Dominik Kasprowicz, Rainer Emling, Wojciech Maly, Doris Schmitt-Landsiedel
2009	A*	`conf`	Architectural assessment of design techniques to improve speed and robustness in embedded microprocessors. DAC Thomas Baumann, Doris Schmitt-Landsiedel, Christian Pacha
2009	C	`conf`	Design of Low-Voltage Bandgap Reference Circuits in Multi-Gate CMOS Technologies. ISCAS Michael Fulde, Martin Wirnshofer, Gerhard Knoblinger, Doris Schmitt-Landsiedel
2009	—	`conf`	Fast stability analysis of large-scale SRAM arrays and the impact of NBTI degradation. ESSCIRC Stefan Drapatz, Thomas Fischer, Karl Hofmann, Ettore Amirante, Peter Huber, Martin Ostermayr, Georg Georgakos, Doris Schmitt-Landsiedel
2009	—	`conf`	Field-coupled nanomagnets for interconnect-free nonvolatile computing. ISSCC Markus Becherer, György Csaba, Rainer Emling, Wolfgang Porod, Paolo Lugli, Doris Schmitt-Landsiedel
2008	—	`conf`	90nm 4.7ps-Resolution 0.7-LSB Single-Shot Precision and 19pJ-per-Shot Local Passive Interpolation Time-to-Digital Converter with On-Chip Characterization. ISSCC Stephan Henzler, Siegmar Koeppe, Winfried Kamp, Hans Mulatz, Doris Schmitt-Landsiedel
2008	J	`jnl`	A Configurable High-Side/Low-Side Driver With Fast and Equalized Switching Delay. IEEE J. Solid State Circuits Michael Wendt, Lenz Thoma, Bernhard Wicht, Doris Schmitt-Landsiedel
2008	—	`conf`	A Design Space Comparison of 6T and 8T SRAM Core-Cells. PATMOS Florian Bauer, Georg Georgakos, Doris Schmitt-Landsiedel
2008	J	`jnl`	A Local Passive Time Interpolation Concept for Variation-Tolerant High-Resolution Time-to-Digital Conversion. IEEE J. Solid State Circuits Stephan Henzler, Siegmar Koeppe, Dominik Lorenz, Winfried Kamp, Ronald Kuenemund, Doris Schmitt-Landsiedel
2008	A	`conf`	Efficient High-Speed Interface Verification and Fault Analysis. ITC Thomas Nirmaier, Jose Torres Zaguirre, Eric Liau, Wolfgang Spirkl, Armin Rettenberger, Doris Schmitt-Landsiedel
2008	—	`conf`	Latched CMOS DRAM Sense Amplifier Yield Analysis and Optimization. PATMOS Yan Li, Helmut Schneider, Florian Schnabel, Roland Thewes, Doris Schmitt-Landsiedel
2007	—	`ed.`	33rd European Solid-State Circuits Conference, ESSCIRC 2007, Munich, Germany, 11-13 September 2007 ESSCIRC Doris Schmitt-Landsiedel, Tobias Noll
2007	—	`conf`	A 10GHz Broadband Amplifier with Bootstrapped 2kV ESD Protection. ISSCC Wolfgang Soldner, Moon-Jung Kim, Martin Streibl, Harald Gossner, Thomas H. Lee, Doris Schmitt-Landsiedel
2007	J	`jnl`	A 90-nm CMOS Low-Power GSM/EDGE Multimedia-Enhanced Baseband Processor With 380-MHz ARM926 Core and Mixed-Signal Extensions. IEEE J. Solid State Circuits Thomas Lüftner, Jörg Berthold, Christian Pacha, Georg Georgakos, Guillaume Sauzon, Olaf Hömke, Jurij Beshenar, Peter Mahrla, Knut M. Just, Peter Hober, Stephan Henzler, Doris Schmitt-Landsiedel, Andre Yakovleff, Axel Klein, Richard J. Knight, Pramod Acharya, Andre Bonnardot, Steffen Buch, Matthias Sauer
2007	J	`jnl`	A Complementary Switched MOSFET Architecture for the 1/f Noise Reduction in Linear Analog CMOS ICs. IEEE J. Solid State Circuits Jeongwook Koh, Doris Schmitt-Landsiedel, Roland Thewes, Ralf Brederlow
2007	—	`conf`	A configurable High-Side/ low-Side Driver. ESSCIRC Michael Wendt, Lenz Thoma, Bernhard Wicht, Doris Schmitt-Landsiedel
2007	—	`conf`	Advances in Multi-Gate MOSFET Circuit Design. ICECS Michael Fulde, Klaus von Arnim, Christian Pacha, Florian Bauer, Christian Russ, Domagoj Siprak, Wade Xiong, Andrew Marshall, C. Rinn Cleavelin, Klaus Schruefer, Doris Schmitt-Landsiedel, Gerhard Knoblinger
2007	—	`conf`	An Integrated Gravimetric FBAR Circuit for Operation in Liquids Using a Flip-Chip Extended 0.13μm CMOS Technology. ISSCC Marcin K. Augustyniak, W. Weber, Gottfried Beer, Hans Mulatz, L. Elbrecht, H.-J. Timme, Marc Tiebout, Werner Simbürger, Christian Paulus, Björn Eversmann, Doris Schmitt-Landsiedel, Roland Thewes, Ralf Brederlow
2007	—	`conf`	Analog design challenges and trade-offs using emerging materials and devices. ESSCIRC Michael Fulde, Abdelkarim Mercha, Cedric Gustin, Bertrand Parvais, Vaidyanathan Subramanian, Klaus von Arnim, Florian Bauer, Klaus Schruefer, Doris Schmitt-Landsiedel, Gerhard Knoblinger
2007	J	`jnl`	Computational Intelligence Characterization Method of Semiconductor Device CoRR Eric Liau, Doris Schmitt-Landsiedel
2007	J	`jnl`	In-Situ Delay Characterization and Local Supply Voltage Adjustment for Compensation of Local Parametric Variations. IEEE J. Solid State Circuits Matthias Eireiner, Stephan Henzler, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel
2007	—	`conf`	Layout options for stability tuning of SRAM cells in multi-gate-FET technologies. ESSCIRC Florian Bauer, Klaus von Arnim, Christian Pacha, Thomas Schulz, Michael Fulde, Axel Nackaerts, M. Jurczak, Wade Xiong, K. T. San, C. Rinn Cleavelin, Klaus Schruefer, Georg Georgakos, Doris Schmitt-Landsiedel
2007	—	`conf`	Performance improvement of embedded low-power microprocessor cores by selective flip flop replacement. ESSCIRC Thomas Baumann, Jörg Berthold, T. Niedermeier, Tim Schoenauer, J. Dienstuhl, Doris Schmitt-Landsiedel, Christian Pacha
2007	J	`jnl`	RF ESD protection strategies: Codesign vs. low-C protection. Microelectron. Reliab. Wolfgang Soldner, Martin Streibl, U. Hodel, Marc Tiebout, Harald Gossner, Doris Schmitt-Landsiedel, Jung-Hoon Chun, Choshu Ito, Robert W. Dutton
2007	C	`conf`	Transient Variations in Emerging SOI Technologies: Modeling and Impact on Analog/Mixed-Signal Circuits. ISCAS Michael Fulde, Doris Schmitt-Landsiedel, Gerhard Knoblinger
2007	—	`conf`	Variation tolerant high resolution and low latency time-to-digital converter. ESSCIRC Stephan Henzler, Siegmar Koeppe, Dominik Lorenz, Winfried Kamp, Ronald Kuenemund, Doris Schmitt-Landsiedel
2006	—	`conf`	A 24x16 CMOS-Based Chronocoulometric DNA Microarray. ISSCC Marcin K. Augustyniak, Christian Paulus, Ralf Brederlow, N. Persike, Gerhard Hartwich, Doris Schmitt-Landsiedel, Roland Thewes
2006	—	`conf`	A 90nm CMOS low-power GSM/EDGE multimedia-enhanced baseband processor with 380MHz ARM9 and mixed-signal extensions. ISSCC Thomas Lüftner, Jörg Berthold, Christian Pacha, Georg Georgakos, Guillaume Sauzon, Olaf Hömke, Jurij Beshenar, Peter Mahrla, Knut M. Just, Peter Hober, Stephan Henzler, Doris Schmitt-Landsiedel, Andre Yakovleff, Axel Klein, Richard J. Knight, Pramod Acharya, Hamid Mabrouki, Goulhamid Juhoor, Matthias Sauer
2006	J	`jnl`	Dynamic state-retention flip-flop for fine-grained power gating with small design and power overhead. IEEE J. Solid State Circuits Stephan Henzler, Georg Georgakos, Matthias Eireiner, Thomas Nirschl, Christian Pacha, Jörg Berthold, Doris Schmitt-Landsiedel
2006	A	`conf`	Pattern Pruner: Automatic Pattern Size Reduction Method that Uses Computational Intelligence-Based Testing. ITC Eric Liau Chee Hong, Manfred Menke, Thomas Janik, Doris Schmitt-Landsiedel
2005	—	`conf`	A 0.6V 100dB 5.2MHz transconductance amplifier realized in a multi-V ESSCIRC Agnese Bargagli-Stoffi, Jens Sauerbrey, Roland Thewes, Doris Schmitt-Landsiedel
2005	—	`conf`	CMOS sensor array for electrical imaging of neuronal activity. ISCAS (4) Björn Eversmann, Martin Jenkner, Franz Hofmann, Christian Paulus, Birgit Holzapfl, Roland Thewes, Doris Schmitt-Landsiedel, Armin Lambacher, Alexander Kaul, Ralf Zeitler, Matthias Merz, Alexander Kunze, Peter Fromherz
2005	A	`conf`	Computational Intelligence Characterization Method of Semiconductor Device. DATE Eric Liau, Doris Schmitt-Landsiedel
2005	A	`conf`	Computational intelligence based testing for semiconductor measurement systems. ITC Eric Liau, Doris Schmitt-Landsiedel
2005	—	`conf`	Dynamic state-retention flip flop for fine-grained sleep-transistor scheme. ESSCIRC Stephan Henzler, Thomas Nirschi, Christian Pacha, Peter Spindler, Philip Teichmann, Michael Fulde, Jürgen Fischer, Matthias Eireiner, Thomas Fischer, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel
2005	—	`conf`	Energieoptimierung durch Adiabatische Schaltungstechnik. GI Jahrestagung (1) Jürgen Fischer, Philip Teichmann, Ettore Amirante, Doris Schmitt-Landsiedel
2005	J	`jnl`	High abstraction level permutational ESD concept analysis. Microelectron. Reliab. Martin Streibl, Franz Zängl, Kai Esmark, Robert Schwencker, Wolfgang Stadler, Harald Gossner, S. Drüen, Doris Schmitt-Landsiedel
2005	—	`conf`	Impact of process parameter variations on the energy dissipation in adiabatic logic. ECCTD Jürgen Fischer, Ettore Amirante, Thomas Nirschl, Philip Teichmann, Stephan Henzler, Doris Schmitt-Landsiedel
2005	—	`conf`	Making adiabatic circuits attractive for todays VLSI industry by multi-mode operation-adiabatic mode circuits. Conf. Computing Frontiers Stephan Henzler, Thomas Nirschl, Matthias Eireiner, Ettore Amirante, Doris Schmitt-Landsiedel
2005	—	`conf`	Power-Clock Gating in Adiabatic Logic Circuits. PATMOS Philip Teichmann, Jürgen Fischer, Stephan Henzler, Ettore Amirante, Doris Schmitt-Landsiedel
2005	—	`conf`	Scaling trends in adiabatic logic. Conf. Computing Frontiers Jürgen Fischer, Philip Teichmann, Doris Schmitt-Landsiedel
2004	J	`jnl`	Analysis of PowerMOSFET chips failed in thermal instability. Microelectron. Reliab. Alberto Castellazzi, H. Schwarzbauer, Doris Schmitt-Landsiedel
2004	J	`jnl`	Design of low-voltage MOSFET-only ΣΔ modulators in standard digital CMOS technology. IEEE Trans. Circuits Syst. I Regul. Pap. Thomas Tille, Jens Sauerbrey, Manfred Mauthe, Doris Schmitt-Landsiedel
2004	—	`conf`	Power Supply Net for Adiabatic Circuits. PATMOS Jürgen Fischer, Ettore Amirante, Agnese Bargagli-Stoffi, Philip Teichmann, Dominik Gruber, Doris Schmitt-Landsiedel
2004	—	`conf`	Single Supply Voltage High-Speed Semi-dynamic Level-Converting Flip-Flop with Low Power and Area Consumption. PATMOS Stephan Henzler, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel
2004	—	`conf`	The tunnelling field effect transistors (TFET): the temperature dependence, the simulation model, and its application. ISCAS (3) Thomas Nirschl, Peng-Fei Wang, Walter Hansch, Doris Schmitt-Landsiedel
2004	—	`conf`	Two Level Compact Simulation Methodology for Timing Analysis of Power-Switched Circuits. PATMOS Stephan Henzler, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel
2004	J	`jnl`	Yield and speed optimization of a latch-type voltage sense amplifier. IEEE J. Solid State Circuits Bernhard Wicht, Thomas Nirschl, Doris Schmitt-Landsiedel
2003	—	`conf`	0.65V sigma-delta modulators. ISCAS (1) Jens Sauerbrey, Martin Wittig, Doris Schmitt-Landsiedel, Roland Thewes
2003	J	`jnl`	A 0.5-V 1-μW successive approximation ADC. IEEE J. Solid State Circuits Jens Sauerbrey, Doris Schmitt-Landsiedel, Roland Thewes
2003	J	`jnl`	A 128 × 128 CMOS biosensor array for extracellular recording of neural activity. IEEE J. Solid State Circuits Björn Eversmann, Martin Jenkner, Franz Hofmann, Christian Paulus, Ralf Brederlow, Birgit Holzapfl, Peter Fromherz, Matthias Merz, Markus Brenner, Matthias Schreiter, Reinhard Gabl, Kurt Plehnert, Michael Steinhauser, Gerald Eckstein, Doris Schmitt-Landsiedel, Roland Thewes
2003	—	`conf`	A yield-optimized latch-type SRAM sense amplifier. ESSCIRC Bernhard Wicht, Thomas Nirschl, Doris Schmitt-Landsiedel
2003	—	`conf`	An ultra low-power adiabatic adder embedded in a standard 0.13μm CMOS environment. ESSCIRC Ettore Amirante, Jürgen Fischer, Markus Lang, Agnese Bargagli-Stoffi, Jörg Berthold, Christoph Heer, Doris Schmitt-Landsiedel
2003	—	`conf`	Automatic worst case pattern generation using neural networks & genetic algorithm for estimation of switching noise on power supply lines in CMOS circuits. ETW Eric Liau, Doris Schmitt-Landsiedel
2003	C	`conf`	Design Aspects and Technological Scaling Limits of ZigZag Circuit Block Switch-Off Schemes. VLSI-SOC Stephan Henzler, Markus Koban, Doris Schmitt-Landsiedel, Jörg Berthold, Georg Georgakos
2003	—	`conf`	Design of an integrated potentiostat circuit for CMOS bio sensor chips. ISCAS (5) Alexander Frey, Martin Jenkner, Meinrad Schienle, Christian Paulus, Birgit Holzapfl, Petra Schindler-Bauer, Franz Hofmann, Dirk Kuhlmeier, Jürgen Krause, Jörg Albers, Walter Gumbrecht, Doris Schmitt-Landsiedel, Roland Thewes
2003	—	`conf`	Evolution of automatic semiconductor test equipment: automatic test pattern learning, classification, optimisation and generation for power supply noise. VECIMS Eric Liau, Doris Schmitt-Landsiedel
2003	J	`jnl`	Hot-Spot Meaurements and Analysis of Electro-Thermal Effects in Low-Voltage Power-MOSFET's. Microelectron. Reliab. Alberto Castellazzi, V. Kartal, R. Kraus, Norbert Seliger, Martin Honsberg-Riedl, Doris Schmitt-Landsiedel
2003	—	`conf`	Impact of Gate Leakage on Efficiency of Circuit Block Switch-Off Schemes. VLSI-SoC (Selected Papers) Stephan Henzler, Philip Teichmann, Markus Koban, Jörg Berthold, Georg Georgakos, Doris Schmitt-Landsiedel
2003	—	`conf`	Reduction of the Energy Consumption in Adiabatic Gates by Optimal Transistor Sizing. PATMOS Jürgen Fischer, Ettore Amirante, Francesco Randazzo, Giuseppe Iannaccone, Doris Schmitt-Landsiedel
2002	J	`jnl`	A 0.7-V MOSFET-only switched-opamp ΣΔ modulator in standard digital CMOS technology. IEEE J. Solid State Circuits Jens Sauerbrey, Thomas Tille, Doris Schmitt-Landsiedel, Roland Thewes
2002	J	`jnl`	Reliability analysis of power MOSFET's with the help of compact models and circuit simulation. Microelectron. Reliab. Alberto Castellazzi, R. Kraus, Norbert Seliger, Doris Schmitt-Landsiedel
2001	J	`jnl`	A 1.8-V MOSFET-only ΣΔ modulator using substrate biased depletion-mode MOS capacitors in series compensation. IEEE J. Solid State Circuits Thomas Tille, Jens Sauerbrey, Doris Schmitt-Landsiedel
2001	—	`conf`	A low-voltage MOSFET-only Sigma-Delta modulator for speech band applications using depletion-mode MOS-capacitors in combined series and parallel compensation. ISCAS (1) Thomas Tille, Jens Sauerbrey, Doris Schmitt-Landsiedel
2001	J	`jnl`	Analysis and compensation of the bitline multiplexer in SRAM current sense amplifiers. IEEE J. Solid State Circuits Bernhard Wicht, Steffen Paul, Doris Schmitt-Landsiedel
1997	J	`jnl`	The impact of intra-die device parameter variations on path delays and on the design for yield of low voltage digital circuits. IEEE Trans. Very Large Scale Integr. Syst. M. Eisele, Jörg Berthold, Doris Schmitt-Landsiedel, R. Mahnkopf
1996	A	`conf`	The impact of intra-die device parameter variations on path delays and on the design for yield of low voltage digital circuits. ISLPED M. Eisele, Jörg Berthold, Doris Schmitt-Landsiedel, R. Mahnkopf
1995	A	`conf`	A new algorithm for the design of stable higher order single loop sigma delta analog-to-digital converters. ICCAD S. R. Kadivar, Doris Schmitt-Landsiedel, Heinrich Klar
1995	—	`conf`	AFFCCA: a tool for critical area analysis with circular defects and lithography deformed layout. DFT Igor Bubel, Wojciech Maly, Thomas Waas, Pranab K. Nag, Hans Hartmann, Doris Schmitt-Landsiedel, Susanne Griep
1992	J	`jnl`	Block-decoded sense-amplifier driver for high-speed sensing in DRAM's. IEEE J. Solid State Circuits Heribert Geib, Wolfgang Raab, Doris Schmitt-Landsiedel
1991	J	`jnl`	Optimization and architectural evaluation of regular combinatoric structures. Microprocessing and Microprogramming Veronika Eisele, Doris Schmitt-Landsiedel
1990	J	`jnl`	Optimization of high-speed CMOS logic circuits with analytical models for signal delay, chip area, and dynamic power dissipation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Bernhard Hoppe, Gerd Neuendorf, Doris Schmitt-Landsiedel, J. Will Specks
1990	J	`jnl`	Pipelined architecture for fast CMOS buffer RAMs. IEEE J. Solid State Circuits Doris Schmitt-Landsiedel, Bernhard Hoppe, Gerd Neuendorf, Maria Wurm, Josef Winnerl