Doowon Lee

17 papers A* 2A 2C 1Journal 8Unranked 3
YearRankTypeTitle / Venue / Authors
2026 J jnl
Stress-Engineered SLIM-Cut of Ultra-Thin Silicon Using Saccharin-Modified Electroplated Ni Films.
IEEE Access
Myoungsu Chae, Sang Hee Lee, Eunbin Jo, Ha-Seop Jeong, Seeun Kim, Minsu Jang, Sungjun Hwang, Dong Jun Ji, Hee Joon Lee, Sun Ah Park, Jeong Kim, Doowon Lee
2024 J jnl
Enhancing the Resistive Switching Properties of Transparent HfO2-Based Memristor Devices for Reliable Gasistor Applications.
Sensors
Taegi Kim, Doowon Lee, Myoungsu Chae, Kyeong-Heon Kim, Hee-Dong Kim
2022 J jnl
Bypassing Multicore Memory Bugs With Coarse-Grained Reconfigurable Logic.
IEEE Trans. Computers
Doowon Lee, Valeria Bertacco
2022 J jnl
IZO/ITO Double-Layered Transparent Conductive Oxide for Silicon Heterojunction Solar Cells.
IEEE Access
Doowon Lee, Ahreum Lee, Hee-Dong Kim
2022 J jnl
Improved Electrical and Optical Properties of IGZO Transparent Conductive Oxide Due to Microwave Treatment: Application to Silicon Solar Cells.
IEEE Access
Myoungsu Chae, Doowon Lee, Sungho Kim, Hee-Dong Kim
2022 J jnl
Improved Resistive Switching Observed in Ti/Zr
IEEE Access
Dongjoo Bae, Doowon Lee, Sungho Kim, Hee-Dong Kim
2021 J jnl
Self-Rectifying Characteristics Observed in O-Doped ZrN Resistive Switching Memory Devices Using Schottky Barrier Type Bottom Electrode.
IEEE Access
Jinsu Jung, Doowon Lee, Sungho Kim, Hee-Dong Kim
2018 — —
Decompose and Conquer: Addressing Evasive Errors in Systems on Chip.
Doowon Lee
2018 C conf
Low-Overhead Microarchitectural Patching for Multicore Memory Subsystems.
ICCD
Doowon Lee, Opeoluwa Matthews, Valeria Bertacco
2017 — conf
AGARSoC: Automated test and coverage-model generation for verification of accelerator-rich SoCs.
ASP-DAC
Biruk Mammo, Doowon Lee, Harrison Davis, Yijun Hou, Valeria Bertacco
2017 A* conf
MTraceCheck: Validating Non-Deterministic Behavior of Memory Consistency Models in Post-Silicon Validation.
ISCA
Doowon Lee, Valeria Bertacco
2016 A* conf
Probabilistic bug-masking analysis for post-silicon tests in microprocessor verification.
DAC
Doowon Lee, Tom Kolan, Arkadiy Morgenshtein, Vitali Sokhin, Ronny Morad, Avi Ziv, Valeria Bertacco
2015 — conf
Highly Fault-tolerant NoC Routing with Application-aware Congestion Management.
NOCS
Doowon Lee, Ritesh Parikh, Valeria Bertacco
2015 — conf
NoCVision: A Network-on-Chip Dynamic Visualization Solution.
NoCArc@MICRO
Vaibhav Gogte, Doowon Lee, Ritesh Parikh, Valeria Bertacco
2014 A conf
Brisk and limited-impact NoC routing reconfiguration.
DATE
Doowon Lee, Ritesh Parikh, Valeria Bertacco
2013 A conf
Hybrid checking for microarchitectural validation of microprocessor designs on acceleration platforms.
ICCAD
Debapriya Chatterjee, Biruk Mammo, Doowon Lee, Raviv Gal, Ronny Morad, Amir Nahir, Avi Ziv, Valeria Bertacco
2009 J jnl
VLSI Implementation of a VC-1 Main Profile Decoder for HD Video Applications.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Jinhyun Cho, Doowon Lee, Sang-yong Yoon, Sanggyu Park, Soo-Ik Chae