Dongsuk Jeon - RankMe

77 papers A* 7C 3Misc 3Journal 35Unranked 29

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A Real-Time Deep Reinforcement Learning Processor for Mapless Autonomous Navigation With Unified Actor-Critic Network and Inference-on-Request Scheduling. IEEE J. Solid State Circuits Juyoung Oh, Jie-Xin Liu, Yi-Chen Teng, Hsueh-Cheng Wang, Dongsuk Jeon
2026	J	`jnl`	Design Approaches for Efficient Parallel Pseudo-Random Ternary Sequence Generation. IEEE Trans. Circuits Syst. I Regul. Pap. DongKwon Lee, Hyungil Chae, Jintae Kim, Dongsuk Jeon
2026	J	`jnl`	Weighted Coding Scheme for Noise Reduction in Silicon Interposer of HBM. IEEE Trans. Very Large Scale Integr. Syst. Sangouk Jeon, Seoyoon Jang, Kwanghyun Shin, DongKwon Lee, Hankyu Chi, Wookjin Shin, Changhyun Pyo, Jaeha Kim, Dongsuk Jeon
2025	—	`conf`	A 28-nm Real-Time Reinforcement Learning Processor for Mapless Autonomous Navigation with Unified Actor-Critic Network and Inference-on-Request Scheduling. CICC Juyoung Oh, Jie-Xin Liu, Yi-Chen Teng, Hsueh-Cheng Wang, Dongsuk Jeon
2025	—	`conf`	A 28nm 18.1µJ /Acquisition End-to-End GPS Acquisition Accelerator with Energy-Accuracy-Driven Mixed-Radix IFFT and ROM-Assisted Computing. ISSCC Sangsu Jeong, Sungjin Park, Mingoo Seok, Dongsuk Jeon
2025	J	`jnl`	A Dual Active Quenching Circuit With Temperature Compensation Technique for Breakdown Voltage Shift of Single-Photon Avalanche Diodes. IEEE Trans. Instrum. Meas. Sundo Kim, Jinseok Oh, Dongsuk Jeon, Inyong Kwon
2025	J	`jnl`	A Light Detector Capacitance Compensation Technique Achieving Boosted Active Quenching for Single-Photon Avalanche Diodes. IEEE Trans. Instrum. Meas. Sundo Kim, Jinseok Oh, Dongsuk Jeon, Inyong Kwon
2025	J	`jnl`	A Real-Time Speech Enhancement Processor for Hearing Aids in 28-nm CMOS. IEEE J. Solid State Circuits Sungjin Park, Sunwoo Lee, Jeongwoo Park, Hyeong-Seok Choi, Kyogu Lee, Dongsuk Jeon
2025	—	`conf`	An 83.16-TOPS/W Voltage-Scalable Time-Domain CNN Accelerator with Full-Swing Delay Cell and Gray-Code TDC in 28-nm CMOS. CICC Sangsu Jeong, Huiwon Yun, DongKwon Lee, Sunwoo Lee, Minyoung Kang, Dongsuk Jeon
2025	J	`jnl`	An Energy-Efficient 3D Semantic Segmentation Processor With Offset-Wise Weight Quantization. IEEE Trans. Circuits Syst. II Express Briefs Beomseok Kim, Sunwoo Lee, Byeungseok Yoo, Dongsuk Jeon
2025	J	`jnl`	CLAT: A Clustering-Based Attention Transformer Accelerator for Low-Latency Text Generation in LLMs. IEEE Trans. Circuits Syst. I Regul. Pap. Sunwoo Lee, Beomseok Kim, Jeongwoo Park, Dongsuk Jeon
2025	C	`conf`	Cost-Effective Reconfigurable MCM with Common-Value Elimination and Alignment. ISCAS Kihwan Kim, Xuan Truong Nguyen, Dongsuk Jeon, Hyuk-Jae Lee
2025	—	`conf`	Efficient Key Switching Accelerator for Fully Homomorphic Encryption. ASP-DAC Seoyoon Jang, Sungjin Park, Dongsuk Jeon
2025	J	`jnl`	FDAM: Filter-Dedicated Approximate Multiplier Design for Real-Time CNN Acceleration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kihwan Kim, Xuan Truong Nguyen, Dongsuk Jeon, Hyuk-Jae Lee
2025	C	`conf`	Input-adaptive Mixed-Precision Framework for Efficient Object Detection. ISCAS Isaac Jeong, Ji-Ye Jeon, Kihwan Kim, Dongsuk Jeon, Hyuk-Jae Lee
2025	C	`conf`	LogSimViT: Logarithmic Similar Pattern Skipping for Hardware Acceleration of ViT. ISCAS Isaac Jeong, Kihwan Kim, Seongho Jeong, Dongsuk Jeon, Hyuk-Jae Lee
2025	A*	`conf`	PaCA: Partial Connection Adaptation for Efficient Fine-Tuning. ICLR Sunghyeon Woo, Sol Namkung, Sunwoo Lee, Inho Jeong, Beomseok Kim, Dongsuk Jeon
2025	J	`jnl`	PaCA: Partial Connection Adaptation for Efficient Fine-Tuning. CoRR Sunghyeon Woo, Sol Namkung, Sunwoo Lee, Inho Jeong, Beomseok Kim, Dongsuk Jeon
2025	—	`conf`	WITCH: WeIghTed Coding Scheme for Crosstalk Reduction in High Bandwidth Memory. ASP-DAC Seoyoon Jang, Sangouk Jeon, Kwanghyun Shin, DongKwon Lee, Hankyu Chi, Wookjin Shin, Changhyun Pyo, Jaeha Kim, Dongsuk Jeon
2024	—	`conf`	A 28nm 157TOPS/W 446.9Kb/mm CICC Sangsu Jeong, Juyoung Oh, Dongsuk Jeon
2024	—	`conf`	A 28nm All-Digital Droop Detection and Mitigation Circuit Using a Shared Dual-Mode Delay Line with 14.8% VminReduction and 42.9% Throughput Gain. CICC Minyoung Kang, Sunghoon Kim, Youngmin Park, Sangsu Jeong, Dongsuk Jeon
2024	—	`conf`	A 5.6µW 10-Keyword End-to-End Keyword Spotting System Using Passive-Averaging SAR ADC and Sign-Exponent-Only Layer Fusion with 92.7% Accuracy. VLSI Technology and Circuits Sungjin Park, Kwanghyun Shin, DongKwon Lee, Minyoung Kang, Sunwoo Lee, Youngmin Park, Mingoo Seok, Dongsuk Jeon
2024	A*	`conf`	ALAM: Averaged Low-Precision Activation for Memory-Efficient Training of Transformer Models. ICLR Sunghyeon Woo, Sunwoo Lee, Dongsuk Jeon
2024	A*	`conf`	DropBP: Accelerating Fine-Tuning of Large Language Models by Dropping Backward Propagation. NeurIPS Sunghyeon Woo, Baeseong Park, Byeongwook Kim, Minjung Jo, Se Jung Kwon, Dongsuk Jeon, Dongsoo Lee
2024	J	`jnl`	DropBP: Accelerating Fine-Tuning of Large Language Models by Dropping Backward Propagation. CoRR Sunghyeon Woo, Baeseong Park, Byeongwook Kim, Minjung Jo, Sejung Kwon, Dongsuk Jeon, Dongsoo Lee
2023	—	`conf`	A 4.27TFLOPS/W FP4/FP8 Hybrid-Precision Neural Network Training Processor Using Shift-Add MAC and Reconfigurable PE Array. ESSCIRC Sunwoo Lee, Jeongwoo Park, Dongsuk Jeon
2023	J	`jnl`	A 65 nm 12.92-nJ/Inference Mixed-Signal Neuromorphic Processor for Image Classification. IEEE Trans. Circuits Syst. II Express Briefs Yejun Ko, Sunghoon Kim, Kwanghyun Shin, Youngmin Park, Sundo Kim, Dongsuk Jeon
2023	J	`jnl`	A Real-Time Object Detection Processor With xnor-Based Variable-Precision Computing Unit. IEEE Trans. Very Large Scale Integr. Syst. Wonjae Lee, Kukbyung Kim, Woohyun Ahn, Jinho Kim, Dongsuk Jeon
2023	—	`conf`	A0.81 mm ISSCC Sungjin Park, Sunwoo Lee, Jeongwoo Park, Hyeong-Seok Choi, Dongsuk Jeon
2023	J	`jnl`	Curriculum Reinforcement Learning From Avoiding Collisions to Navigating Among Movable Obstacles in Diverse Environments. IEEE Robotics Autom. Lett. Hsueh-Cheng Wang, Siao-Cing Huang, Po-Jui Huang, Kuo-Lun Wang, Yi-Chen Teng, Yu-Ting Ko, Dongsuk Jeon, I-Chen Wu
2023	A*	`conf`	Learning with Auxiliary Activation for Memory-Efficient Training. ICLR Sunghyeon Woo, Dongsuk Jeon
2022	J	`jnl`	A 270-mA Self-Calibrating-Clocked Output-Capacitor-Free LDO With 0.15-1.15V Output Range and 0.183-fs FoM. IEEE Trans. Very Large Scale Integr. Syst. Youngmin Park, Dongsuk Jeon
2022	—	`conf`	A 28nm 1.644TFLOPS/W Floating-Point Computation SRAM Macro with Variable Precision for Deep Neural Network Inference and Training. ESSCIRC Sangsu Jeong, Jeongwoo Park, Dongsuk Jeon
2022	J	`jnl`	A Neural Network Training Processor With 8-Bit Shared Exponent Bias Floating Point and Multiple-Way Fused Multiply-Add Trees. IEEE J. Solid State Circuits Jeongwoo Park, Sunwoo Lee, Dongsuk Jeon
2022	—	`conf`	A low power neural network training processor with 8-bit floating point with a shared exponent bias and fused multiply add trees. AICAS Jeongwoo Park, Sunwoo Lee, Dongsuk Jeon
2022	J	`jnl`	An Automatic Circuit Design Framework for Level Shifter Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jiwoo Hong, Sunghoon Kim, Dongsuk Jeon
2022	J	`jnl`	An In-Memory Computing SRAM Macro for Memory-Augmented Neural Network. IEEE Trans. Circuits Syst. II Express Briefs Sunghoon Kim, Wonjae Lee, Sundo Kim, Sungjin Park, Dongsuk Jeon
2022	A*	`conf`	Toward Efficient Low-Precision Training: Data Format Optimization and Hysteresis Quantization. ICLR Sunwoo Lee, Jeongwoo Park, Dongsuk Jeon
2021	—	`conf`	A 40nm 4.81TFLOPS/W 8b Floating-Point Training Processor for Non-Sparse Neural Networks Using Shared Exponent Bias and 24-Way Fused Multiply-Add Tree. ISSCC Jeongwoo Park, Sunwoo Lee, Dongsuk Jeon
2021	J	`jnl`	A 65nm 0.6-1.2V Low-Dropout Regulator Using Voltage-Difference-to-Time Converter With Direct Output Feedback. IEEE Trans. Circuits Syst. II Express Briefs Kwanghyun Shin, Dong-Woo Jee, Dongsuk Jeon
2021	J	`jnl`	A Multi-Channel Spike Sorting Processor With Accurate Clustering Algorithm Using Convolutional Autoencoder. IEEE Trans. Biomed. Circuits Syst. Changyu Seong, Wonjae Lee, Dongsuk Jeon
2021	A*	`conf`	Activation Sharing with Asymmetric Paths Solves Weight Transport Problem without Bidirectional Connection. NeurIPS Sunghyeon Woo, Jeongwoo Park, Jiwoo Hong, Dongsuk Jeon
2021	J	`jnl`	Dynamic Block-Wise Local Learning Algorithm for Efficient Neural Network Training. IEEE Trans. Very Large Scale Integr. Syst. Gwangho Lee, Sunwoo Lee, Dongsuk Jeon
2021	—	`conf`	Fast Automatic Circuit Optimization Using Deep Learning. ISOCC Jiwoo Hong, Sunghoon Kim, Jaeha Kim, Dongsuk Jeon
2021	Misc	`conf`	Real-Time Denoising and Dereverberation wtih Tiny Recurrent U-Net. ICASSP Hyeong-Seok Choi, Sungjin Park, Jie Hwan Lee, Hoon Heo, Dongsuk Jeon, Kyogu Lee
2021	J	`jnl`	Real-time Denoising and Dereverberation with Tiny Recurrent U-Net. CoRR Hyeong-Seok Choi, Sungjin Park, Jie Hwan Lee, Hoon Heo, Dongsuk Jeon, Kyogu Lee
2021	—	`conf`	Reducing Refresh Overhead with In-DRAM Error Correction Codes. ISOCC Hanbyeol Kwon, Kwangrae Kim, Dongsuk Jeon, Ki-Seok Chung
2020	J	`jnl`	A 65-nm Neuromorphic Image Classification Processor With Energy-Efficient Training Through Direct Spike-Only Feedback. IEEE J. Solid State Circuits Jeongwoo Park, Juyun Lee, Dongsuk Jeon
2020	J	`jnl`	A Fast Finite Field Multiplier for SIKE. CoRR Yeonsoo Jeon, Dongsuk Jeon
2020	—	`conf`	A Modified Serial Commutator Architecture for Real-Valued Fast Fourier Transform. SiPS Sungjin Park, Dongsuk Jeon
2019	—	`conf`	A 65nm 236.5nJ/Classification Neuromorphic Processor with 7.5% Energy Overhead On-Chip Learning Using Direct Spike-Only Feedback. ISSCC Jeongwoo Park, Juyun Lee, Dongsuk Jeon
2019	J	`jnl`	An Area-Efficient 128-Channel Spike Sorting Processor for Real-Time Neural Recording With 0.175µW/Channel in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. Anh-Tuan Do, Seyed Mohammad Ali Zeinolabedin, Dongsuk Jeon, Dennis Sylvester, Tony Tae-Hyoung Kim
2019	J	`jnl`	Enhancing Reliability of Analog Neural Network Processors. IEEE Trans. Very Large Scale Integr. Syst. Suhong Moon, Kwanghyun Shin, Dongsuk Jeon
2019	J	`jnl`	Improving GPU Multitasking Efficiency Using Dynamic Resource Sharing. IEEE Comput. Archit. Lett. Jiho Kim, Jehee Cha, Jason Jong Kyu Park, Dongsuk Jeon, Yongjun Park
2019	J	`jnl`	Microarchitecture-Aware Code Generation for Deep Learning on Single-ISA Heterogeneous Multi-Core Mobile Processors. IEEE Access Junmo Park, Yongin Kwon, Yongjun Park, Dongsuk Jeon
2019	J	`jnl`	Power-up control techniques for reliable SRAM PUF. IEICE Electron. Express Juyun Lee, Dong-Woo Jee, Dongsuk Jeon
2018	J	`jnl`	A Noise Reconfigurable All-Digital Phase-Locked Loop Using a Switched Capacitor-Based Frequency-Locked Loop and a Noise Detector. IEEE J. Solid State Circuits Tae-Kwang Jang, Seokhyeon Jeong, Dongsuk Jeon, Kyojin David Choo, Dennis Sylvester, David T. Blaauw
2017	—	`conf`	8.4 A 2.5ps 0.8-to-3.2GHz bang-bang phase- and frequency-detector-based all-digital PLL with noise self-adjustment. ISSCC Tae-Kwang Jang, Seokhyeon Jeong, Dongsuk Jeon, Kyojin David Choo, Dennis Sylvester, David T. Blaauw
2017	J	`jnl`	A 23-mW Face Recognition Processor with Mostly-Read 5T Memory in 40-nm CMOS. IEEE J. Solid State Circuits Dongsuk Jeon, Qing Dong, Yejoong Kim, Xiaolong Wang, Shuai Chen, Hao Yu, David T. Blaauw, Dennis Sylvester
2016	—	`conf`	24.1 A 0.6V 8mW 3D vision processor for a navigation device for the visually impaired. ISSCC Dongsuk Jeon, Nathan Ickes, Priyanka Raina, Hsueh-Cheng Wang, Daniela Rus, Anantha P. Chandrakasan
2016	—	`conf`	A 128-channel spike sorting processor featuring 0.175 µW and 0.0033 mm VLSI Circuits Seyed Mohammad Ali Zeinolabedin, Anh-Tuan Do, Dongsuk Jeon, Dennis Sylvester, Tony Tae-Hyoung Kim
2016	—	`conf`	Design techniques for ultra-efficient computing. ISOCC Dongsuk Jeon
2016	—	`conf`	Live demonstration: A 128-channel spike sorting processor featuring 0.175 μW and 0.0033 mm APCCAS Seyed Mohammad Ali Zeinolabedin, Anh-Tuan Do, Dongsuk Jeon, Dennis Sylvester, Tony Tae-Hyoung Kim
2015	—	`conf`	A 120nW 8b sub-ranging SAR ADC with signal-dependent charge recycling for biomedical applications. VLSIC Seokhyeon Jeong, Wanyeong Jung, Dongsuk Jeon, Omer Berenfeld, Hakan Oral, Grant H. Kruger, David T. Blaauw, Dennis Sylvester
2015	—	`conf`	A 23mW face recognition accelerator in 40nm CMOS with mostly-read 5T memory. VLSIC Dongsuk Jeon, Qing Dong, Yejoong Kim, Xiaolong Wang, Shuai Chen, Hao Yu, David T. Blaauw, Dennis Sylvester
2015	J	`jnl`	An Injectable 64 nW ECG Mixed-Signal SoC in 65 nm for Arrhythmia Monitoring. IEEE J. Solid State Circuits Yen-Po Chen, Dongsuk Jeon, Yoonmyung Lee, Yejoong Kim, Zhiyoong Foo, Inhee Lee, Nicholas B. Langhals, Grant H. Kruger, Hakan Oral, Omer Berenfeld, Zhengya Zhang, David T. Blaauw, Dennis Sylvester
2014	—	`conf`	24.3 An implantable 64nW ECG-monitoring mixed-signal SoC for arrhythmia diagnosis. ISSCC Dongsuk Jeon, Yen-Po Chen, Yoonmyung Lee, Yejoong Kim, Zhiyoong Foo, Grant H. Kruger, Hakan Oral, Omer Berenfeld, Zhengya Zhang, David T. Blaauw, Dennis Sylvester
2014	J	`jnl`	An Energy Efficient Full-Frame Feature Extraction Accelerator With Shift-Latch FIFO in 28 nm CMOS. IEEE J. Solid State Circuits Dongsuk Jeon, Michael B. Henry, Yejoong Kim, Inhee Lee, Zhengya Zhang, David T. Blaauw, Dennis Sylvester
2014	—	`conf`	Circuit techniques for miniaturized biomedical sensors. CICC Inhee Lee, Yejoong Kim, Suyoung Bang, Gyouho Kim, Hyunsoo Ha, Yen-Po Chen, Dongsuk Jeon, Seokhyun Jeong, Wanyeong Jung, Mohammad Hassan Ghaed, Zhiyoong Foo, Yoonmyung Lee, Jae-Yoon Sim, Dennis Sylvester, David T. Blaauw
2013	—	`conf`	A 470mV 2.7mW feature extraction-accelerator for micro-autonomous vehicle navigation in 28nm CMOS. ISSCC Dongsuk Jeon, Yejoong Kim, Inhee Lee, Zhengya Zhang, David T. Blaauw, Dennis Sylvester
2013	Misc	`conf`	A low-power VGA full-frame feature extraction processor. ICASSP Dongsuk Jeon, Yejoong Kim, Inhee Lee, Zhengya Zhang, David T. Blaauw, Dennis Sylvester
2012	J	`jnl`	A Super-Pipelined Energy Efficient Subthreshold 240 MS/s FFT Core in 65 nm CMOS. IEEE J. Solid State Circuits Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester
2012	J	`jnl`	Design Methodology for Voltage-Overscaled Ultra-Low-Power Systems. IEEE Trans. Circuits Syst. II Express Briefs Dongsuk Jeon, Mingoo Seok, Zhengya Zhang, David T. Blaauw, Dennis Sylvester
2012	—	`conf`	Extending energy-saving voltage scaling in ultra low voltage integrated circuit designs. ICICDT Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester
2011	—	`conf`	A 0.27V 30MHz 17.7nJ/transform 1024-pt complex FFT core with super-pipelining. ISSCC Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester
2011	Misc	`conf`	Energy-optimized high performance FFT processor. ICASSP Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester
2011	A*	`conf`	Pipeline strategy for improving optimal energy efficiency in ultra-low voltage design. DAC Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester