Dong Jiang

16 papers A 1C 3Misc 1Journal 8Unranked 3
YearRankTypeTitle / Venue / Authors
2026 J jnl
C2-LSM: A Storm-NoC Based Neuromorphic Processor for High-Accuracy Liquid State Machine With Cube-Cluster Topology.
IEEE Trans. Biomed. Circuits Syst.
Enyi Yao, Zhibin Luo, Zongfan Wu, Dong Jiang, Xin Wu, Yongkui Yang
2025 J jnl
A Spin Scale-Aware Self-Adaptive Ising Annealing Processing Architecture for Combinatorial Optimization Problems.
IEEE Trans. Circuits Syst. I Regul. Pap.
Dong Jiang, Xiangrui Wang, Zhanhong Huang, Longyuan Kang, Simei Yang, Enyi Yao
2025 C conf
An SRAM Compute-in-Memory based NTT Accelerator for CRYSTALS-KYBER.
ISCAS
Jinyang Hu, Xinyuan Pang, Dong Jiang, Gaopeng Fan, Enyi Yao
2024 A conf
A Parallel Tempering Processing Architecture with Multi-Spin Update for Fully-Connected Ising Models.
DATE
Yang Zhang, Xiangrui Wang, Dong Jiang, Zhanhong Huang, Gaopeng Fan, Enyi Yao
2024 J jnl
DCAP: A Scalable Decoupled-Clustering Annealing Processor for Large-Scale Traveling Salesman Problems.
IEEE Trans. Circuits Syst. I Regul. Pap.
Zhanhong Huang, Yang Zhang, Xiangrui Wang, Dong Jiang, Enyi Yao
2024 J jnl
Unidirectional and hierarchical on-chip interconnected architecture for large-scale hardware spiking neural networks.
Neurocomputing
Junxiu Liu, Dong Jiang, Qiang Fu, Yuling Luo, Yaohua Deng, Sheng Qin, Shunsheng Zhang
2023 — conf
A Genuine-Equilibrium Monte Carlo Sampling-Based Effective Algorithm for Fully-Connected Ising Models.
ICTA
Xiangrui Wang, Dong Jiang, Yang Zhang, Hongyuan Kang, Enyi Yao
2023 J jnl
A Network-on-Chip-Based Annealing Processing Architecture for Large-Scale Fully Connected Ising Model.
IEEE Trans. Circuits Syst. I Regul. Pap.
Dong Jiang, Xiangrui Wang, Zhanhong Huang, Yongkui Yang, Enyi Yao
2023 C conf
A Scalable Annealing Processing Architecture for Fully-Connected Ising Models.
ISCAS
Dong Jiang, Xiangrui Wang, Zhanhong Huang, Yukang Huang, Enyi Yao
2023 C conf
An Annealing Processor based on 1k-Spin Fully-Connected Ising Model for Combinatorial Optimization Problems.
ISCAS
Zhanhong Huang, Xiangrui Wang, Dong Jiang, Yukang Huang, Enyi Yao
2023 J jnl
An Ising Model-Based Annealing Processor With 1024 Fully Connected Spins for Combinatorial Optimization Problems.
IEEE Trans. Circuits Syst. II Express Briefs
Zhanhong Huang, Dong Jiang, Xiangrui Wang, Enyi Yao
2023 J jnl
Hardware Spiking Neural Networks with Pair-Based STDP Using Stochastic Computing.
Neural Process. Lett.
Junxiu Liu, Yanhu Wang, Yuling Luo, Shunsheng Zhang, Dong Jiang, Yifan Hua, Sheng Qin, Su Yang
2022 — conf
A Fully-Connected and Area-Efficient Ising Model Annealing Accelerator for Combinatorial Optimization Problems.
ICTA
Yukang Huang, Dong Jiang, Yongkui Yang, Enyi Yao
2021 J jnl
Minimally buffered deflection router for spiking neural network hardware implementations.
Neural Comput. Appl.
Junxiu Liu, Dong Jiang, Yuling Luo, Senhui Qiu, Yongchuang Huang
2020 Misc conf
An Energy-aware Spiking Neural Network Hardware Mapping based on Particle Swarm Optimization and Genetic Algorithm.
CODES+ISSS
Junxiu Liu, Xingyue Huang, Dong Jiang, Yuling Luo
2020 — conf
Multi-Ring on-Chip Interconnected Architecture for Spiking Neural Network Hardware Implementations.
HPCC/DSS/SmartCity
Junxiu Liu, Dong Jiang, Yuling Luo, Senhui Qiu