Dong-Young Chang

16 papers Journal 10Unranked 6
YearRankTypeTitle / Venue / Authors
2017 — conf
Session 7 - Data converter techniques.
CICC
Ayman Shabra, Dong-Young Chang
2014 — conf
11.6 A 21mW 15b 48MS/s zero-crossing pipeline ADC in 0.13μm CMOS with 74dB SNDR.
ISSCC
Dong-Young Chang, Carlos E. Muñoz, Denis C. Daly, Soon-Kyun Shin, Kevin Guay, Thomas Thurston, Hae-Seung Lee, Kush Gulati, Matthew Z. Straayer
2014 J jnl
A 12 bit 200 MS/s Zero-Crossing-Based Pipelined ADC With Early Sub-ADC Decision and Output Residue Background Calibration.
IEEE J. Solid State Circuits
Soon-Kyun Shin, Jacques Christophe Rudell, Denis C. Daly, Carlos E. Muñoz, Dong-Young Chang, Kush Gulati, Hae-Seung Lee, Matthew Z. Straayer
2012 — conf
A 12b 200MS/s frequency scalable zero-crossing based pipelined ADC in 55nm CMOS.
CICC
Soon-Kyun Shin, Jacques Christophe Rudell, Denis C. Daly, Carlos E. Muñoz, Dong-Young Chang, Kush Gulati, Hae-Seung Lee, Matthew Z. Straayer
2008 J jnl
A 16-bit 65-MS/s Pipeline ADC With 80-dBFS SNR Using Analog Auto-Calibration in SiGe SOI Complementary BiCMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Alfio Zanchi, Dong-Young Chang
2005 J jnl
A 0.6-V 82-dB delta-sigma audio ADC using switched-RC integrators.
IEEE J. Solid State Circuits
Gil-Cho Ahn, Dong-Young Chang, Matthew E. Brown, Naoto Ozaki, Hiroshi Youra, Ken Yamamura, Koichi Hamashita, Kaoru Takasuka, Gábor C. Temes, Un-Ku Moon
2005 J jnl
A 0.9-V 12-mW 5-MSPS algorithmic ADC with 77-dB SFDR.
IEEE J. Solid State Circuits
Jipeng Li, Gil-Cho Ahn, Dong-Young Chang, Un-Ku Moon
2005 J jnl
A low-Voltage 10-bit CMOS DAC in 0.01-mm
IEEE Trans. Circuits Syst. II Express Briefs
Brandon Greenley, Raymond Veith, Dong-Young Chang, Un-Ku Moon
2005 J jnl
Sub-1-V design techniques for high-linearity multistage/pipelined analog-to-digital converters.
IEEE Trans. Circuits Syst. I Regul. Pap.
Dong-Young Chang, Gil-Cho Ahn, Un-Ku Moon
2004 J jnl
Design techniques for a pipelined ADC without using a front-end sample-and-hold amplifier.
IEEE Trans. Circuits Syst. I Regul. Pap.
Dong-Young Chang
2004 J jnl
Radix-based digital calibration techniques for multi-stage recycling pipelined ADCs.
IEEE Trans. Circuits Syst. I Regul. Pap.
Dong-Young Chang, Jipeng Li, Un-Ku Moon
2003 J jnl
A 1.4-V 10-bit 25-MS/s pipelined ADC using opamp-reset switching technique.
IEEE J. Solid State Circuits
Dong-Young Chang, Un-Ku Moon
2002 — conf
Low-voltage pipelined ADC using opamp-reset switching technique.
CICC
Dong-Young Chang, Lei Wu, Un-Ku Moon
1999 — conf
A Single-Chip CMOS CCD Camera Interface Circuit with Digitally Controlled AGC.
ASP-DAC
Jin-Kug Lee, Dong-Young Chang, Geun-Soon Kang, Seung-Hoon Lee
1999 — conf
A Single-Chip CMOS CCD Camera Interface Circuit with Digitally Controlled AGC.
ASP-DAC
Jin-Kug Lee, Dong-Young Chang, Geun-Soon Kang, Seung-Hoon Lee
1998 J jnl
Design techniques for a low-power low-cost CMOS A/D converter.
IEEE J. Solid State Circuits
Dong-Young Chang, Seung-Hoon Lee